/dragonfly/sys/dev/drm/radeon/ |
H A D | radeon_uvd.c | 917 static unsigned radeon_uvd_calc_upll_post_div(unsigned vco_freq, in radeon_uvd_calc_upll_post_div() argument 922 unsigned post_div = vco_freq / target_freq; in radeon_uvd_calc_upll_post_div() 929 if ((vco_freq / post_div) > target_freq) in radeon_uvd_calc_upll_post_div() 969 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; in radeon_uvd_calc_upll_dividers() local 976 for (vco_freq = vco_min; vco_freq <= vco_max; vco_freq += 100) { in radeon_uvd_calc_upll_dividers() 978 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in radeon_uvd_calc_upll_dividers() 990 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, in radeon_uvd_calc_upll_dividers() 996 dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk, in radeon_uvd_calc_upll_dividers() 1002 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); in radeon_uvd_calc_upll_dividers()
|
H A D | rv6xx_dpm.c | 538 u32 fb_divider = vco_freq / ref_freq; in rv6xx_calculate_spread_spectrum_clk_v() 556 u32 vco_freq, clk_v, clk_s; in rv6xx_program_engine_spread_spectrum() local 566 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv6xx_program_engine_spread_spectrum() 635 u32 *vco_freq) in rv6xx_find_memory_clock_with_highest_vco() argument 646 if (vco_freq_temp > *vco_freq) { in rv6xx_find_memory_clock_with_highest_vco() 648 *vco_freq = vco_freq_temp; in rv6xx_find_memory_clock_with_highest_vco() 659 u32 vco_freq = 0, clk_v, clk_s; in rv6xx_program_mclk_spread_spectrum_parameters() local 668 &vco_freq); in rv6xx_program_mclk_spread_spectrum_parameters() 674 &vco_freq); in rv6xx_program_mclk_spread_spectrum_parameters() 680 &vco_freq); in rv6xx_program_mclk_spread_spectrum_parameters() [all …]
|
H A D | rv740_dpm.c | 161 u32 vco_freq = engine_clock * dividers.post_div; in rv740_populate_sclk_value() local 164 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv740_populate_sclk_value() 248 u32 vco_freq = memory_clock * dividers.post_div; in rv740_populate_mclk_value() local 251 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in rv740_populate_mclk_value()
|
H A D | rv730_dpm.c | 93 u32 vco_freq = engine_clock * post_divider; in rv730_populate_sclk_value() local 96 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv730_populate_sclk_value() 168 u32 vco_freq = memory_clock * post_divider; in rv730_populate_mclk_value() local 171 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in rv730_populate_mclk_value()
|
H A D | radeon_atombios.c | 1121 rdev->clock.vco_freq = in radeon_atombios_get_dentist_vco_freq() 1278 rdev->clock.vco_freq = in radeon_atom_get_clock_info() 1281 rdev->clock.vco_freq = rdev->clock.current_dispclk; in radeon_atom_get_clock_info() 1285 rdev->clock.vco_freq = rdev->clock.current_dispclk; in radeon_atom_get_clock_info() 1287 if (rdev->clock.vco_freq == 0) in radeon_atom_get_clock_info() 1288 rdev->clock.vco_freq = 360000; /* 3.6 GHz */ in radeon_atom_get_clock_info()
|
H A D | radeon_audio.c | 759 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); in radeon_audio_dp_mode_set()
|
H A D | ni_dpm.c | 2040 u32 vco_freq = engine_clock * dividers.post_div; in ni_calculate_sclk_params() local 2043 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in ni_calculate_sclk_params() 2236 u32 vco_freq = memory_clock * dividers.post_div; in ni_populate_mclk_value() local 2239 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in ni_populate_mclk_value()
|
H A D | cypress_dpm.c | 555 u32 vco_freq = memory_clock * dividers.post_div; in cypress_populate_mclk_value() local 558 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in cypress_populate_mclk_value()
|
H A D | rv770_dpm.c | 544 u32 vco_freq = engine_clock * post_divider; in rv770_populate_sclk_value() local 547 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv770_populate_sclk_value()
|
H A D | radeon.h | 283 uint32_t vco_freq; member
|
H A D | ci_dpm.c | 3223 u32 vco_freq = engine_clock * dividers.post_div; in ci_calculate_sclk_params() local 3226 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in ci_calculate_sclk_params()
|
H A D | si_dpm.c | 4823 u32 vco_freq = engine_clock * dividers.post_div; in si_calculate_sclk_params() local 4826 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in si_calculate_sclk_params()
|
/dragonfly/sys/dev/drm/amd/display/dc/inc/ |
H A D | clock_source.h | 110 uint32_t vco_freq; member
|
/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_clock_source.c | 233 pll_settings->vco_freq = in calc_fb_divider_checking_tolerance()
|
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 914 uint32_t vco_freq = clock * dividers.uc_pll_post_div; in fiji_calculate_sclk_params() local 916 vco_freq, &ssInfo)) { in fiji_calculate_sclk_params()
|
H A D | ci_smumgr.c | 341 uint32_t vco_freq = clock * dividers.uc_pll_post_div; in ci_calculate_sclk_params() local 344 vco_freq, &ss_info)) { in ci_calculate_sclk_params()
|
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | si_dpm.c | 5286 u32 vco_freq = engine_clock * dividers.post_div; in si_calculate_sclk_params() local 5289 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in si_calculate_sclk_params()
|
/dragonfly/sys/dev/drm/i915/ |
H A D | intel_display.c | 165 int hpll_freq, vco_freq[] = { 800, 1600, 2000, 2400 }; in vlv_get_hpll_vco() local 173 return vco_freq[hpll_freq] * 1000; in vlv_get_hpll_vco()
|