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Searched refs:vddc_dependency_on_dispclk (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dbtc_dpm.c2581 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in btc_dpm_init()
2583 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in btc_dpm_init()
2587 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in btc_dpm_init()
2588 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in btc_dpm_init()
2589 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in btc_dpm_init()
2590 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in btc_dpm_init()
2591 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 800; in btc_dpm_init()
2592 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; in btc_dpm_init()
2593 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 800; in btc_dpm_init()
2595 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 800; in btc_dpm_init()
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H A Dni_dpm.c4077 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in ni_dpm_init()
4079 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in ni_dpm_init()
4083 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in ni_dpm_init()
4084 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in ni_dpm_init()
4085 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in ni_dpm_init()
4086 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in ni_dpm_init()
4087 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in ni_dpm_init()
4088 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; in ni_dpm_init()
4089 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in ni_dpm_init()
4091 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; in ni_dpm_init()
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H A Dsi_dpm.c5160 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { in si_is_state_ulv_compatible()
5162 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) in si_is_state_ulv_compatible()
6944 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in si_dpm_init()
6946 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in si_dpm_init()
6950 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in si_dpm_init()
6951 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in si_dpm_init()
6952 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in si_dpm_init()
6954 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in si_dpm_init()
6956 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in si_dpm_init()
6958 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; in si_dpm_init()
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H A Dci_dpm.c3820 &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk; in ci_apply_disp_minimum_voltage_request()
5100 &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk); in ci_patch_dependency_tables_with_leakage()
5699 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); in ci_dpm_fini()
5805 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in ci_dpm_init()
5807 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in ci_dpm_init()
5811 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in ci_dpm_init()
5812 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in ci_dpm_init()
5813 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in ci_dpm_init()
5815 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in ci_dpm_init()
5817 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in ci_dpm_init()
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H A Dradeon.h1488 struct radeon_clock_voltage_dependency_table vddc_dependency_on_dispclk; member
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.c5623 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { in si_is_state_ulv_compatible()
5625 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) in si_is_state_ulv_compatible()
7347 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in si_dpm_init()
7351 if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in si_dpm_init()
7355 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in si_dpm_init()
7356 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in si_dpm_init()
7357 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in si_dpm_init()
7359 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in si_dpm_init()
7361 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in si_dpm_init()
7363 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; in si_dpm_init()
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H A Damdgpu_dpm.h198 struct amdgpu_clock_voltage_dependency_table vddc_dependency_on_dispclk; member