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Searched refs:vddc_dependency_on_mclk (Results 1 – 14 of 14) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dprocesspptables.c1240 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1350 &hwmgr->dyn_state.vddc_dependency_on_mclk, table); in init_clock_voltage_dependency()
1361 if (result == 0 && (NULL != hwmgr->dyn_state.vddc_dependency_on_mclk) && in init_clock_voltage_dependency()
1362 (0 != hwmgr->dyn_state.vddc_dependency_on_mclk->count)) in init_clock_voltage_dependency()
1364 hwmgr->dyn_state.vddc_dependency_on_mclk); in init_clock_voltage_dependency()
1680 kfree(hwmgr->dyn_state.vddc_dependency_on_mclk); in pp_tables_uninitialize()
1681 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL; in pp_tables_uninitialize()
H A Dsmu7_hwmgr.c314 hwmgr->dyn_state.vddc_dependency_on_mclk); in smu7_construct_voltage_tables()
672 hwmgr->dyn_state.vddc_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
2410 tmp = smu7_patch_vddc(hwmgr, hwmgr->dyn_state.vddc_dependency_on_mclk); in smu7_patch_dependency_tables_with_leakage()
2463 …clock_voltage_dependency_table *allowed_mclk_vddc_table = hwmgr->dyn_state.vddc_dependency_on_mclk; in smu7_set_private_data_based_on_pptable_v0()
4693 mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk; in smu7_get_mclks()
/dragonfly/sys/dev/drm/radeon/
H A Dr600_dpm.c947 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in r600_parse_extended_power_table()
964 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries); in r600_parse_extended_power_table()
1305 kfree(dyn_state->vddc_dependency_on_mclk.entries); in r600_free_extended_power_table()
H A Dbtc_dpm.c2210 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in btc_apply_state_adjust_rules()
2219 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in btc_apply_state_adjust_rules()
2228 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in btc_apply_state_adjust_rules()
H A Dci_dpm.c2181 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ci_construct_voltage_tables()
2635 for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count; level++) { in ci_populate_smc_initial_state()
2636 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries[level].clk >= in ci_populate_smc_initial_state()
2917 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries) { in ci_populate_single_memory_level()
2919 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ci_populate_single_memory_level()
3481 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk; in ci_setup_default_dpm_tables()
4952 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk; in ci_set_private_data_variables_based_on_pptable()
5098 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in ci_patch_dependency_tables_with_leakage()
H A Dsi_dpm.c3051 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3159 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3975 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_construct_voltage_tables()
5904 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in si_patch_dependency_tables_based_on_leakage()
H A Dni_dpm.c879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
1015 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in ni_patch_dependency_tables_based_on_leakage()
H A Dradeon.h1486 struct radeon_clock_voltage_dependency_table vddc_dependency_on_mclk; member
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_dpm.h196 struct amdgpu_clock_voltage_dependency_table vddc_dependency_on_mclk; member
H A Damdgpu_dpm.c412 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in amdgpu_parse_extended_power_table()
781 kfree(dyn_state->vddc_dependency_on_mclk.entries); in amdgpu_free_extended_power_table()
H A Dsi_dpm.c3510 btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3618 btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
4438 &adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_construct_voltage_tables()
6359 &adev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in si_patch_dependency_tables_based_on_leakage()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Diceland_smumgr.c1240 if (hwmgr->dyn_state.vddc_dependency_on_mclk != NULL) { in iceland_populate_single_memory_level()
1242 hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); in iceland_populate_single_memory_level()
1835 count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count); in iceland_populate_smc_initial_state()
1838 if (hwmgr->dyn_state.vddc_dependency_on_mclk->entries[level].clk in iceland_populate_smc_initial_state()
H A Dci_smumgr.c1185 if (hwmgr->dyn_state.vddc_dependency_on_mclk != NULL) { in ci_populate_single_memory_level()
1187 hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); in ci_populate_single_memory_level()
1867 count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count); in ci_populate_smc_initial_state()
1870 if (hwmgr->dyn_state.vddc_dependency_on_mclk->entries[level].clk in ci_populate_smc_initial_state()
/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dhwmgr.h596 struct phm_clock_voltage_dependency_table *vddc_dependency_on_mclk; member