/dragonfly/contrib/mdocml/ |
H A D | tbl_layout.c | 164 if (cp->vert < 2) in mods() 165 cp->vert++; in mods() 217 if (rp->vert < 2) in cell() 218 rp->vert++; in cell() 302 if (tbl->opts.lvert < tbl->first_row->vert) in tbl_layout() 303 tbl->opts.lvert = tbl->first_row->vert; in tbl_layout() 313 if (tbl->opts.lvert < rp->vert) in tbl_layout() 314 tbl->opts.lvert = rp->vert; in tbl_layout() 317 tbl->opts.rvert < rp->last->vert) in tbl_layout() 318 tbl->opts.rvert = rp->last->vert; in tbl_layout()
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H A D | tbl_term.c | 310 uvert = dvert = sp->layout->vert; in term_tbl() 312 dvert < sp->next->layout->vert) in term_tbl() 313 dvert = sp->next->layout->vert; in term_tbl() 317 uvert = sp->prev->layout->vert; in term_tbl() 359 uvert = dvert = cps->vert; in term_tbl() 372 if (uvert < cpp->vert && in term_tbl() 380 uvert = cpp->vert; in term_tbl() 391 (dvert < cpn->vert && in term_tbl() 393 dvert = cpn->vert; in term_tbl() 639 uw = cpp->vert; in tbl_hrule() [all …]
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H A D | tbl.h | 57 int vert; /* Width of subsequent vertical line. */ member 77 int vert; /* Width of left vertical line. */ member
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H A D | tbl_html.c | 146 switch (sp->layout->vert) { in print_tbl() 228 switch (cp->vert) { in print_tbl()
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/dragonfly/sys/dev/drm/include/drm/ |
H A D | drm_rect.h | 117 static inline void drm_rect_downscale(struct drm_rect *r, int horz, int vert) in drm_rect_downscale() argument 120 r->y1 /= vert; in drm_rect_downscale() 122 r->y2 /= vert; in drm_rect_downscale()
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/dragonfly/stand/boot/efi/loader/arch/x86_64/ |
H A D | framebuffer.c | 275 uint32_t horiz, vert, stride; in efifb_from_uga() local 278 status = uga->GetMode(uga, &horiz, &vert, &depth, &refresh); in efifb_from_uga() 281 efifb->fb_height = vert; in efifb_from_uga() 316 vert = 1050; in efifb_from_uga() 324 vert = 800; in efifb_from_uga() 337 efifb->fb_height == vert && efifb->fb_addr == fbaddr) { in efifb_from_uga()
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_dpp_dscl.c | 183 && data->ratios.vert.value == one in dpp1_dscl_get_dscl_mode() 195 if (data->ratios.horz.value == one && data->ratios.vert.value == one) in dpp1_dscl_get_dscl_mode() 302 uint32_t v_2tap_sharp_factor = scl_data->sharpness.vert; in dpp1_dscl_set_scl_filter() 333 scl_data->taps.v_taps, scl_data->ratios.vert); in dpp1_dscl_set_scl_filter() 479 int ceil_vratio = dc_fixpt_ceil(scl_data->ratios.vert); in dpp1_dscl_find_lb_memory_config() 588 SCL_V_SCALE_RATIO, dc_fixpt_u3d19(data->ratios.vert) << 5); in dpp1_dscl_set_manual_ratio_init()
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H A D | dcn10_dpp.c | 153 scl_data->ratios.vert.value != dc_fixpt_one.value) in dpp_get_optimal_number_of_taps() 166 if (scl_data->ratios.vert.value == (4ll << 32)) in dpp_get_optimal_number_of_taps() 167 scl_data->ratios.vert.value--; in dpp_get_optimal_number_of_taps() 197 if (IDENTITY_RATIO(scl_data->ratios.vert)) in dpp_get_optimal_number_of_taps()
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H A D | dcn10_hw_sequencer.c | 2606 .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert, in dcn10_set_cursor_position()
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/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/ |
H A D | transform.h | 143 struct fixed31_32 vert; member 150 int vert; member
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/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_transform.c | 261 dc_fixpt_u2d19(data->ratios.vert) << 5; in calculate_inits() 275 data->ratios.vert, in calculate_inits() 352 coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert); in dce_transform_set_scaler() 923 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); in dce_transform_get_optimal_number_of_taps() 927 if (!IDENTITY_RATIO(scl_data->ratios.vert)) { in dce_transform_get_optimal_number_of_taps()
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/dragonfly/sys/dev/drm/amd/display/dc/core/ |
H A D | dc_resource.c | 670 pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction( in calculate_scaling_ratios() 677 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2; in calculate_scaling_ratios() 679 pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64( in calculate_scaling_ratios() 680 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h); in calculate_scaling_ratios() 694 pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_truncate( in calculate_scaling_ratios() 695 pipe_ctx->plane_res.scl_data.ratios.vert, 19); in calculate_scaling_ratios() 893 dc_fixpt_sub(data->inits.v, data->ratios.vert)); in calculate_inits_and_adj_vp() 913 data->ratios.vert, data->recout.y - recout_full->y)); in calculate_inits_and_adj_vp() 954 dc_fixpt_sub(data->inits.v, data->ratios.vert)); in calculate_inits_and_adj_vp() 980 data->ratios.vert, data->recout.y - recout_full->y)); in calculate_inits_and_adj_vp() [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/dce110/ |
H A D | dce110_transform_v.c | 378 dc_fixpt_u2d19(data->ratios.vert) << 5; in calculate_inits() 560 coeffs_v = get_filter_coeffs_64p(data->taps.v_taps, data->ratios.vert); in dce110_xfmv_set_scaler()
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H A D | dce110_hw_sequencer.c | 2839 .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert, in dce110_set_cursor_position()
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/dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
H A D | dcn_calcs.c | 376 input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params() 904 ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value in dcn_validate_bandwidth() 909 ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value in dcn_validate_bandwidth()
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H A D | dce_calcs.c | 2802 …ale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value); in populate_initial_data() 2859 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); in populate_initial_data() 2900 …ale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.vert.value); in populate_initial_data()
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/dragonfly/contrib/file/magic/Magdir/ |
H A D | images | 1438 0 string pM86 Atari ST STAD bitmap image data (vert)
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/dragonfly/share/dict/ |
H A D | web2a | 36768 nether vert 62441 tapis vert 69948 vert russe
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H A D | web2 | 228163 vert
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