Home
last modified time | relevance | path

Searched refs:visland_clk_info (Results 1 – 1 of 1) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.c3324 const ATOM_PPLIB_CI_CLOCK_INFO *visland_clk_info = clock_info; in smu7_get_pp_table_entry_callback_func_v0() local
3329 engine_clock = visland_clk_info->ucEngineClockHigh << 16 | visland_clk_info->usEngineClockLow; in smu7_get_pp_table_entry_callback_func_v0()
3330 memory_clock = visland_clk_info->ucMemoryClockHigh << 16 | visland_clk_info->usMemoryClockLow; in smu7_get_pp_table_entry_callback_func_v0()
3353 pcie_gen_from_bios = visland_clk_info->ucPCIEGen; in smu7_get_pp_table_entry_callback_func_v0()
3356 …performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap, visland_clk_info->usPCIE… in smu7_get_pp_table_entry_callback_func_v0()