Home
last modified time | relevance | path

Searched refs:vstartup_start (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_optc.c67 if (optc->dlg_otg_param.vstartup_start == 0) { in optc1_program_global_sync()
73 VSTARTUP_START, optc->dlg_otg_param.vstartup_start); in optc1_program_global_sync()
126 vertical_line_start = asic_blank_end - optc->dlg_otg_param.vstartup_start + 1; in get_start_vline()
291 vertical_line_start = asic_blank_end - optc->dlg_otg_param.vstartup_start + 1; in optc1_program_timing()
315 if (optc->dlg_otg_param.vstartup_start > asic_blank_end) in optc1_program_timing()
316 v_fp2 = optc->dlg_otg_param.vstartup_start > asic_blank_end; in optc1_program_timing()
323 if ((optc->dlg_otg_param.vstartup_start/2)*2 > asic_blank_end) in optc1_program_timing()
H A Ddcn10_hw_sequencer.c658 pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start; in dcn10_enable_stream_timing()
2210 pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start; in program_all_pipe_in_tree()
H A Ddcn10_hubp.c123 if ((pipe_dest->vstartup_start - 2*(pipe_dest->vready_offset+pipe_dest->vupdate_width in hubp1_vready_workaround()
/dragonfly/sys/dev/drm/amd/display/dc/dml/
H A Ddml1_display_rq_dlg_calc.c1049 unsigned int vstartup_start; in dml1_rq_dlg_get_dlg_params() local
1234 vstartup_start = e2e_pipe_param.pipe.dest.vstartup_start; in dml1_rq_dlg_get_dlg_params()
1237 vstartup_start = vstartup_start / 2; in dml1_rq_dlg_get_dlg_params()
1239 if (vstartup_start >= min_vblank) { in dml1_rq_dlg_get_dlg_params()
1248 vstartup_start, in dml1_rq_dlg_get_dlg_params()
1250 min_vblank = vstartup_start + 1; in dml1_rq_dlg_get_dlg_params()
1254 vstartup_start, in dml1_rq_dlg_get_dlg_params()
H A Ddisplay_mode_structs.h297 unsigned int vstartup_start; member
/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/
H A Dtiming_generator.h74 int vstartup_start; member
/dragonfly/sys/dev/drm/amd/display/dc/calcs/
H A Ddcn_calcs.c421 input->dest.vstartup_start = pipe->pipe_dlg_param.vstartup_start; in pipe_ctx_to_e2e_pipe_params()
1095 pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; in dcn_validate_bandwidth()
1136 hsplit_pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; in dcn_validate_bandwidth()