Searched refs:vsync_start (Results 1 – 16 of 16) sorted by relevance
285 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()317 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()593 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; in drm_display_mode_from_videomode()594 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; in drm_display_mode_from_videomode()634 vm->vsync_len = dmode->vsync_end - dmode->vsync_start; in drm_display_mode_to_videomode()843 p->crtc_vsync_start = p->vsync_start; in drm_mode_set_crtcinfo()1011 mode1->vsync_start == mode2->vsync_start && in drm_mode_equal_no_clocks_no_stereo()1046 mode->vsync_start < mode->vdisplay || in drm_mode_validate_basic()1047 mode->vsync_end < mode->vsync_start || in drm_mode_validate_basic()1542 out->vsync_start = in->vsync_start; in drm_mode_convert_to_umode()[all …]
1837 (mode->vsync_start - mode->vdisplay == 3); in mode_is_rb()2178 mode->vsync_start *= 2; in drm_mode_do_interlace_quirk()2256 mode->vsync_start = mode->vdisplay + vsync_offset; in drm_mode_detailed()2257 mode->vsync_end = mode->vsync_start + vsync_pulse_width; in drm_mode_detailed()2907 mode->vsync_start++; in cea_mode_alternate_timings()4569 mode->vsync_start = mode->vdisplay + vsync; in drm_mode_displayid_detailed()4570 mode->vsync_end = mode->vsync_start + vsync_width; in drm_mode_displayid_detailed()
155 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in amdgpu_panel_mode_fixup()157 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in amdgpu_panel_mode_fixup()170 adjusted_mode->vsync_start = native_mode->vdisplay + vover; in amdgpu_panel_mode_fixup()171 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; in amdgpu_panel_mode_fixup()
2104 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()2106 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in amdgpu_atombios_encoder_get_lcd_info()
141 .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \283 int vsync_start; member426 (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \
322 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in radeon_panel_mode_fixup()324 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()339 adjusted_mode->vsync_start = native_mode->vdisplay + vover; in radeon_panel_mode_fixup()340 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; in radeon_panel_mode_fixup()
1267 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_combios_get_lvds_info()1269 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_combios_get_lvds_info()
1655 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()1657 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()
1120 .vsync_start = 1027,1382 mode_ptr->vsync_start = vactive_s + 1; in intel_tv_get_modes()1384 if (mode_ptr->vsync_end <= mode_ptr->vsync_start) in intel_tv_get_modes()1385 mode_ptr->vsync_end = mode_ptr->vsync_start + 1; in intel_tv_get_modes()
825 v_sync_len = mode->vsync_end - mode->vsync_start; in intel_sdvo_get_dtd_from_mode()828 v_sync_offset = mode->vsync_start - mode->vdisplay; in intel_sdvo_get_dtd_from_mode()878 mode.vsync_start = mode.vdisplay; in intel_sdvo_get_mode_from_dtd()879 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; in intel_sdvo_get_mode_from_dtd()880 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; in intel_sdvo_get_mode_from_dtd()881 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; in intel_sdvo_get_mode_from_dtd()882 mode.vsync_end = mode.vsync_start + in intel_sdvo_get_mode_from_dtd()
671 uint32_t vsync_start = (vsync & 0xffff) + 1; in intel_crt_load_detect() local673 vblank_start = vsync_start; in intel_crt_load_detect()
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + in fill_detail_timing_data()126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + in fill_detail_timing_data()
82 scan->vsync_start == fixed_mode->vsync_start && in intel_find_panel_downclock()
1620 m1->vsync_start == m2->vsync_start && in intel_edp_compare_alt_mode()
7074 mode->vsync_start = pipe_config->base.adjusted_mode.crtc_vsync_start; in intel_mode_from_pipe_config()
237 __u16 vsync_start; member