Searched refs:wm_mask (Results 1 – 3 of 3) sorted by relevance
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | dce_v10_0.c | 1021 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; in dce_v10_0_program_watermarks() local 1111 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_program_watermarks() 1112 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v10_0_program_watermarks() 1119 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v10_0_program_watermarks() 1126 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v10_0_program_watermarks()
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H A D | dce_v11_0.c | 1047 u32 tmp, wm_mask, lb_vblank_lead_lines = 0; in dce_v11_0_program_watermarks() local 1137 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_program_watermarks() 1138 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 1); in dce_v11_0_program_watermarks() 1145 tmp = REG_SET_FIELD(wm_mask, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, 2); in dce_v11_0_program_watermarks() 1152 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v11_0_program_watermarks()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | cik.c | 9224 u32 tmp, wm_mask; in dce8_program_watermarks() local 9318 wm_mask = RREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset); in dce8_program_watermarks() 9319 tmp = wm_mask; in dce8_program_watermarks() 9335 WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask); in dce8_program_watermarks()
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