| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 205 Type *AmtVT = Amt->getType(); in simplifyX86immShift() local
213 assert(AmtVT->isIntegerTy(32) && "Unexpected shift-by-immediate type"); in simplifyX86immShift()
232 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
233 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
235 unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements(); in simplifyX86immShift()
259 assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 && in simplifyX86immShift()
260 cast<VectorType>(AmtVT)->getElementType() == SVT && in simplifyX86immShift()
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| H A D | X86ISelLowering.cpp | 25026 MVT AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode() local
25035 ShAmt = DAG.getVectorShuffle(AmtVT, dl, ShAmt, DAG.getUNDEF(AmtVT), Mask); in getTargetVShiftNode()
25039 if (AmtVT.getScalarSizeInBits() == 64 && in getTargetVShiftNode()
25045 AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode()
25052 if (AmtVT.getScalarSizeInBits() < 64) { in getTargetVShiftNode()
25060 AmtVT = MVT::v4i32; in getTargetVShiftNode()
25067 AmtVT.getVectorNumElements(), in getTargetVShiftNode()
25080 if (AmtVT.getSizeInBits() > 128) { in getTargetVShiftNode()
25082 AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode()
25087 if (!IsMasked && AmtVT.getScalarSizeInBits() < 64) { in getTargetVShiftNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 351 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
352 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
353 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
358 EVT AmtVT = Amt.getValueType(); in LowerShifts() local
359 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, in LowerShifts()
360 DAG.getConstant(VT.getSizeInBits() - 1, dl, AmtVT)); in LowerShifts()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1391 EVT AmtVT = Amt.getValueType(); in PromoteIntRes_FunnelShift() local
1402 Amt = DAG.getNode(ISD::UREM, DL, AmtVT, Amt, in PromoteIntRes_FunnelShift()
1403 DAG.getConstant(OldBits, DL, AmtVT)); in PromoteIntRes_FunnelShift()
1423 SDValue ShiftOffset = DAG.getConstant(NewBits - OldBits, DL, AmtVT); in PromoteIntRes_FunnelShift()
1429 Amt = DAG.getNode(ISD::ADD, DL, AmtVT, Amt, ShiftOffset); in PromoteIntRes_FunnelShift()
1443 EVT AmtVT = Amt.getValueType(); in PromoteIntRes_VPFunnelShift() local
1454 Amt = DAG.getNode(ISD::VP_UREM, DL, AmtVT, Amt, in PromoteIntRes_VPFunnelShift()
1455 DAG.getConstant(OldBits, DL, AmtVT), Mask, EVL); in PromoteIntRes_VPFunnelShift()
1477 SDValue ShiftOffset = DAG.getConstant(NewBits - OldBits, DL, AmtVT); in PromoteIntRes_VPFunnelShift()
1483 Amt = DAG.getNode(ISD::VP_ADD, DL, AmtVT, Amt, ShiftOffset, Mask, EVL); in PromoteIntRes_VPFunnelShift()
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| H A D | DAGCombiner.cpp | 9790 EVT AmtVT = N1.getValueType(); in visitRotate() local
9791 SDValue Bits = DAG.getConstant(Bitsize, dl, AmtVT); in visitRotate()
9793 DAG.FoldConstantArithmetic(ISD::UREM, dl, AmtVT, {N1, Bits})) in visitRotate()
14772 EVT AmtVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in visitTRUNCATE() local
14775 if (AmtVT != Amt.getValueType()) { in visitTRUNCATE()
14776 Amt = DAG.getZExtOrTrunc(Amt, SL, AmtVT); in visitTRUNCATE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8987 EVT AmtVT = Amt.getValueType(); in LowerSHL_PARTS() local
8989 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS()
8994 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS()
9016 EVT AmtVT = Amt.getValueType(); in LowerSRL_PARTS() local
9018 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS()
9023 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS()
9044 EVT AmtVT = Amt.getValueType(); in LowerSRA_PARTS() local
9046 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS()
9071 EVT AmtVT = Z.getValueType(); in LowerFunnelShift() local
9077 Z = DAG.getNode(ISD::AND, dl, AmtVT, Z, in LowerFunnelShift()
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