Searched refs:BNXT_GRC_BASE_MASK (Results 1 – 3 of 3) sorted by relevance
970 #define BNXT_GRC_BASE_MASK 0xfffff000 macro
1568 writel_fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4, 0, reg_off & BNXT_GRC_BASE_MASK); in bnxt_fw_reset_writel()1646 …fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + BNXT_FW_HEALTH_WIN_MAP_OFF, 0, reg & BNXT_GRC_BASE_MASK); in __bnxt_map_fw_health_reg()1664 reg_base = reg & BNXT_GRC_BASE_MASK; in bnxt_map_fw_health_regs()1665 if ((reg & BNXT_GRC_BASE_MASK) != reg_base) in bnxt_map_fw_health_regs()
665 rdev->chip_ctx->dbr_aeq_arm_reg & BNXT_GRC_BASE_MASK); in bnxt_re_handle_dbr_nq_pacing_notification()3333 rdev->chip_ctx->dbr_stat_db_fifo & BNXT_GRC_BASE_MASK); in bnxt_re_initialize_dbr_pacing()3399 rdev->chip_ctx->dbr_aeq_arm_reg & BNXT_GRC_BASE_MASK); in bnxt_re_enable_dbr_pacing()