Searched refs:CHELSIO_T4 (Results 1 – 8 of 8) sorted by relevance
37 #define CHELSIO_T4 0x4 macro55 T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),56 T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),72 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4); in is_t4()
79 return dev->chip_version == CHELSIO_T4; in dev_is_t4()
151 case CHELSIO_T4: in c4iw_alloc_context()
215 MPASS(chip_id(sc) >= CHELSIO_T4); in act_open_cpl_size()216 idx = min(chip_id(sc) - CHELSIO_T4, 2); in act_open_cpl_size()315 case CHELSIO_T4: in t4_connect()352 case CHELSIO_T4: in t4_connect()
417 #define CHELSIO_T4 0x4 macro527 return adap->params.chipid == CHELSIO_T4; in is_t4()
249 if (chip_id(adap) > CHELSIO_T4) in t4_port_reg()795 case CHELSIO_T4: in t4_get_regs_len()2652 case CHELSIO_T4: in t4_get_regs()5006 if (chip_id(adap) > CHELSIO_T4) { in mps_intr_handler()5149 if (chip_id(adap) > CHELSIO_T4) in ma_intr_handler()7340 case CHELSIO_T4: in t4_sge_decode_idma_state()9256 chipid -= CHELSIO_T4; in t4_get_chip_params()9285 adapter->params.chipid = CHELSIO_T4; in t4_prep_adapter()9678 if (chip_id(adap) > CHELSIO_T4) { in read_filter_mode_and_ingress_config()
1612 MPASS(chip_id(sc) >= CHELSIO_T4); in act_open_cpl_len16()1613 idx = min(chip_id(sc) - CHELSIO_T4, 2); in act_open_cpl_len16()
1086 if (id >= CHELSIO_T4 && id - CHELSIO_T4 < nitems(devnames)) in t4_init_devnames()1087 sc->names = &devnames[id - CHELSIO_T4]; in t4_init_devnames()4471 .chip = CHELSIO_T4,5419 MPASS(chip_id(sc) > CHELSIO_T4); in get_params__post_init()7512 if (chip_id(sc) > CHELSIO_T4) { in t4_sysctls()