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Searched refs:DIV_ROUND_UP (Results 1 – 25 of 106) sorted by relevance

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/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmmio.c44 __iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
46 __iowrite32_copy((u8 *)dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
54 __ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
56 __ioread32_copy(data, (u8 *)dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
H A Dutil.c53 for (i = 0; i < DIV_ROUND_UP(size, 32); i++) { in mt76_wcid_alloc()
/freebsd/sys/contrib/openzfs/lib/libspl/include/os/linux/sys/
H A Dsysmacros.h45 #ifndef DIV_ROUND_UP
46 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
/freebsd/contrib/ofed/libcxgb4/
H A Dqp.c202 *len16 = DIV_ROUND_UP(size, 16); in build_rdma_send()
243 *len16 = DIV_ROUND_UP(size, 16); in build_rdma_write()
271 *len16 = DIV_ROUND_UP(sizeof wqe->read, 16); in build_rdma_read()
283 *len16 = DIV_ROUND_UP(sizeof wqe->recv + in build_rdma_recv()
401 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in c4iw_post_send()
470 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in c4iw_post_receive()
H A Dt4.h55 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) macro
388 wq->rq.wq_pidx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in t4_rq_produce()
431 wq->sq.wq_pidx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in t4_sq_produce()
/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dnet_dim.h365 curr_stats->ppms = DIV_ROUND_UP(npkts * USEC_PER_MSEC, delta_us); in net_dim_calc_stats()
366 curr_stats->bpms = DIV_ROUND_UP(nbytes * USEC_PER_MSEC, delta_us); in net_dim_calc_stats()
367 curr_stats->epms = DIV_ROUND_UP(NET_DIM_NEVENTS * USEC_PER_MSEC, in net_dim_calc_stats()
/freebsd/sys/dev/wg/
H A Dwg_crypto.c21 #ifndef DIV_ROUND_UP
22 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) macro
185 const size_t nblocks = DIV_ROUND_UP(inlen, BLAKE2S_BLOCK_SIZE); in blake2s_update()
/freebsd/sys/dev/cxgbe/
H A Doffload.h39 (w)->wr_mid = htonl(V_FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
50 (w)->wr.wr_mid = htonl(V_FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
H A Dosdep.h90 #define DIV_ROUND_UP(x, y) howmany(x, y) macro
/freebsd/sys/contrib/openzfs/include/os/linux/spl/sys/
H A Dsysmacros.h149 #ifndef DIV_ROUND_UP
150 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Deeprom.h71 return DIV_ROUND_UP(channel - 29, 32); in mt7996_get_channel_group_6g()
/freebsd/sys/dev/mlx4/mlx4_en/
H A Dmlx4_en_tx.c260 dseg += DIV_ROUND_UP(4 + len, DS_SIZE_ALIGNMENT); in mlx4_en_store_inline_lso_data()
562 dseg += DIV_ROUND_UP(4 + MIN_PKT_LEN, DS_SIZE_ALIGNMENT); in mlx4_en_store_inline_data()
565 dseg += DIV_ROUND_UP(4 + len, DS_SIZE_ALIGNMENT); in mlx4_en_store_inline_data()
569 dseg += DIV_ROUND_UP(8 + len, DS_SIZE_ALIGNMENT); in mlx4_en_store_inline_data()
751 num_pkts = DIV_ROUND_UP(payload_len, mss); in mlx4_en_xmit()
814 pad = DIV_ROUND_UP(ds_cnt, DS_FACT); in mlx4_en_xmit()
846 tx_info->nr_txbb = DIV_ROUND_UP(ds_cnt, DS_FACT); in mlx4_en_xmit()
/freebsd/sys/dev/mlx5/mlx5_en/
H A Dmlx5_en_hw_tls_rx.c139 const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_umr_wqe) + in mlx5e_tls_rx_send_static_parameters()
172 iq->data[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_rx_send_static_parameters()
211 const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_psv_wqe), in mlx5e_tls_rx_send_progress_parameters_sync()
239 iq->data[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_rx_send_progress_parameters_sync()
336 const u32 ds_cnt = DIV_ROUND_UP(sizeof(*wqe), MLX5_SEND_WQE_DS); in mlx5e_tls_rx_receive_progress_parameters()
368 iq->data[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_rx_receive_progress_parameters()
H A Dmlx5_en_hw_tls.c499 const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_umr_wqe) + in mlx5e_tls_send_static_parameters()
532 sq->mbuf[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_send_static_parameters()
544 const u32 ds_cnt = DIV_ROUND_UP(sizeof(struct mlx5e_tx_psv_wqe), in mlx5e_tls_send_progress_parameters()
570 sq->mbuf[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_send_progress_parameters()
600 sq->mbuf[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_tls_send_nop()
H A Dmlx5_en_tx.c73 sq->mbuf[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_send_nop()
544 CTASSERT(DIV_ROUND_UP(2, MLX5_SEND_WQEBB_NUM_DS) == 1);
777 num_pkts = DIV_ROUND_UP(payload_len, mss); in mlx5e_sq_xmit()
811 num_pkts = DIV_ROUND_UP(payload_len, mss); in mlx5e_sq_xmit()
936 ds_cnt += DIV_ROUND_UP(args.ihs - sizeof(wqe->eth.inline_hdr_start), in mlx5e_sq_xmit()
996 sq->mbuf[pi].num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS); in mlx5e_sq_xmit()
/freebsd/sys/dev/cxgbe/iw_cxgbe/
H A Dmem.c85 ulpmc->wr.wr_mid = cpu_to_be32(V_FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16))); in _c4iw_write_mem_dma_aligned()
90 ulpmc->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(ulpmc->wr), 16)); in _c4iw_write_mem_dma_aligned()
125 num_wqe = DIV_ROUND_UP(len, C4IW_MAX_INLINE_SIZE); in _c4iw_write_mem_inline()
149 V_FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16))); in _c4iw_write_mem_inline()
153 DIV_ROUND_UP(copy_len, T4_ULPTX_MIN_IO))); in _c4iw_write_mem_inline()
154 ulpmc->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(ulpmc->wr), in _c4iw_write_mem_inline()
H A Dqp.c467 *len16 = DIV_ROUND_UP(size, 16); in build_rdma_send()
510 *len16 = DIV_ROUND_UP(size, 16); in build_rdma_write()
541 *len16 = DIV_ROUND_UP(sizeof wqe->read, 16); in build_rdma_read()
555 *len16 = DIV_ROUND_UP(sizeof wqe->recv + in build_rdma_recv()
565 *len16 = DIV_ROUND_UP(sizeof wqe->inv, 16); in build_inv_stag()
699 *len16 = DIV_ROUND_UP(sizeof(*fr), 16); in build_tpte_memreg()
903 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in c4iw_post_send()
965 idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE); in c4iw_post_receive()
1135 V_FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); in post_terminate()
1267 V_FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); in rdma_fini()
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/freebsd/sys/contrib/openzfs/include/os/freebsd/spl/sys/
H A Dsysmacros.h71 #ifndef DIV_ROUND_UP
72 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
H A Dccompile.h181 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
/freebsd/contrib/ofed/libmlx5/
H A Dbitmap.h57 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_LONG)
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Deeprom.h140 return DIV_ROUND_UP(channel - 29, 32); in mt7915_get_channel_group_6g()
/freebsd/sys/contrib/openzfs/module/zfs/
H A Dspa_log_spacemap.c324 return ((steps > 0) ? DIV_ROUND_UP(sum, steps) : 0); in spa_estimate_incoming_log_blocks()
396 if (e->lse_txgcount >= DIV_ROUND_UP(zfs_unflushed_log_txg_max, in summary_entry_is_full()
400 DIV_ROUND_UP(spa_log_sm_blocklimit(spa), in summary_entry_is_full()
724 DIV_ROUND_UP(total_flushes, txgs_in_future)); in spa_estimate_metaslabs_to_flush()
/freebsd/sys/dev/mlx5/mlx5_ib/
H A Dmlx5_ib_mem.c86 *ncont = DIV_ROUND_UP(i, (1 << m)); in mlx5_ib_cont_pages()
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dinit.c196 chan->orig_mpwr = DIV_ROUND_UP(chan->orig_mpwr, 2); in mt76x2_init_txpower()
/freebsd/sys/contrib/ena-com/
H A Dena_eth_com.h167 num_entries_needed += DIV_ROUND_UP(descs_after_first_entry, in ena_com_is_doorbell_needed()

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