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Searched refs:DispatchPtr (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUArgumentUsageInfo.cpp68 << " DispatchPtr: " << FI.second.DispatchPtr in print()
133 return std::tuple(DispatchPtr ? &DispatchPtr : nullptr, in getPreloadedValue()
156 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); in fixedABILayout()
H A DSIMachineFunctionInfo.cpp198 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
201 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr()
644 Any |= convertArg(AI.DispatchPtr, ArgInfo.DispatchPtr); in convertArgumentInfo()
H A DAMDGPUArgumentUsageInfo.h131 ArgDescriptor DispatchPtr; member
H A DAMDGPUPromoteAlloca.cpp945 CallInst *DispatchPtr = Builder.CreateCall(DispatchPtrFn, {}); in getLocalSizeYZ() local
946 DispatchPtr->addRetAttr(Attribute::NoAlias); in getLocalSizeYZ()
947 DispatchPtr->addRetAttr(Attribute::NonNull); in getLocalSizeYZ()
951 DispatchPtr->addDereferenceableRetAttr(64); in getLocalSizeYZ()
955 DispatchPtr, PointerType::get(I32Ty, AMDGPUAS::CONSTANT_ADDRESS)); in getLocalSizeYZ()
H A DGCNSubtarget.h1491 bool hasDispatchPtr() const { return DispatchPtr; } in hasDispatchPtr()
1555 bool DispatchPtr = false; variable
H A DSIMachineFunctionInfo.h161 std::optional<SIArgument> DispatchPtr;
186 YamlIO.mapOptional("dispatchPtr", AI.DispatchPtr);
H A DAMDGPUTargetMachine.cpp1624 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr, in parseMachineFunctionInfo()
1625 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchPtr, in parseMachineFunctionInfo()
H A DAMDGPUSubtarget.cpp1060 DispatchPtr = true; in GCNUserSGPRUsageInfo()
H A DSIISelLowering.cpp2344 allocateSGPR64Input(CCInfo, ArgInfo.DispatchPtr); in allocateSpecialInputSGPRs()