1 //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This header contains common, non-processor-specific data structures and
10 // constants for the ELF file format.
11 //
12 // The details of the ELF32 bits in this file are largely based on the Tool
13 // Interface Standard (TIS) Executable and Linking Format (ELF) Specification
14 // Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format
15 // Version 1.5, Draft 2, May 1998 as well as OpenBSD header files.
16 //
17 //===----------------------------------------------------------------------===//
18
19 #ifndef LLVM_BINARYFORMAT_ELF_H
20 #define LLVM_BINARYFORMAT_ELF_H
21
22 #include "llvm/ADT/StringRef.h"
23 #include <cstdint>
24 #include <cstring>
25
26 namespace llvm {
27 namespace ELF {
28
29 using Elf32_Addr = uint32_t; // Program address
30 using Elf32_Off = uint32_t; // File offset
31 using Elf32_Half = uint16_t;
32 using Elf32_Word = uint32_t;
33 using Elf32_Sword = int32_t;
34
35 using Elf64_Addr = uint64_t;
36 using Elf64_Off = uint64_t;
37 using Elf64_Half = uint16_t;
38 using Elf64_Word = uint32_t;
39 using Elf64_Sword = int32_t;
40 using Elf64_Xword = uint64_t;
41 using Elf64_Sxword = int64_t;
42
43 // Object file magic string.
44 static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'};
45
46 // e_ident size and indices.
47 enum {
48 EI_MAG0 = 0, // File identification index.
49 EI_MAG1 = 1, // File identification index.
50 EI_MAG2 = 2, // File identification index.
51 EI_MAG3 = 3, // File identification index.
52 EI_CLASS = 4, // File class.
53 EI_DATA = 5, // Data encoding.
54 EI_VERSION = 6, // File version.
55 EI_OSABI = 7, // OS/ABI identification.
56 EI_ABIVERSION = 8, // ABI version.
57 EI_PAD = 9, // Start of padding bytes.
58 EI_NIDENT = 16 // Number of bytes in e_ident.
59 };
60
61 struct Elf32_Ehdr {
62 unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes
63 Elf32_Half e_type; // Type of file (see ET_* below)
64 Elf32_Half e_machine; // Required architecture for this file (see EM_*)
65 Elf32_Word e_version; // Must be equal to 1
66 Elf32_Addr e_entry; // Address to jump to in order to start program
67 Elf32_Off e_phoff; // Program header table's file offset, in bytes
68 Elf32_Off e_shoff; // Section header table's file offset, in bytes
69 Elf32_Word e_flags; // Processor-specific flags
70 Elf32_Half e_ehsize; // Size of ELF header, in bytes
71 Elf32_Half e_phentsize; // Size of an entry in the program header table
72 Elf32_Half e_phnum; // Number of entries in the program header table
73 Elf32_Half e_shentsize; // Size of an entry in the section header table
74 Elf32_Half e_shnum; // Number of entries in the section header table
75 Elf32_Half e_shstrndx; // Sect hdr table index of sect name string table
76
checkMagicElf32_Ehdr77 bool checkMagic() const {
78 return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
79 }
80
getFileClassElf32_Ehdr81 unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
getDataEncodingElf32_Ehdr82 unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
83 };
84
85 // 64-bit ELF header. Fields are the same as for ELF32, but with different
86 // types (see above).
87 struct Elf64_Ehdr {
88 unsigned char e_ident[EI_NIDENT];
89 Elf64_Half e_type;
90 Elf64_Half e_machine;
91 Elf64_Word e_version;
92 Elf64_Addr e_entry;
93 Elf64_Off e_phoff;
94 Elf64_Off e_shoff;
95 Elf64_Word e_flags;
96 Elf64_Half e_ehsize;
97 Elf64_Half e_phentsize;
98 Elf64_Half e_phnum;
99 Elf64_Half e_shentsize;
100 Elf64_Half e_shnum;
101 Elf64_Half e_shstrndx;
102
checkMagicElf64_Ehdr103 bool checkMagic() const {
104 return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
105 }
106
getFileClassElf64_Ehdr107 unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
getDataEncodingElf64_Ehdr108 unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
109 };
110
111 // File types.
112 // See current registered ELF types at:
113 // http://www.sco.com/developers/gabi/latest/ch4.eheader.html
114 enum {
115 ET_NONE = 0, // No file type
116 ET_REL = 1, // Relocatable file
117 ET_EXEC = 2, // Executable file
118 ET_DYN = 3, // Shared object file
119 ET_CORE = 4, // Core file
120 ET_LOOS = 0xfe00, // Beginning of operating system-specific codes
121 ET_HIOS = 0xfeff, // Operating system-specific
122 ET_LOPROC = 0xff00, // Beginning of processor-specific codes
123 ET_HIPROC = 0xffff // Processor-specific
124 };
125
126 // Versioning
127 enum { EV_NONE = 0, EV_CURRENT = 1 };
128
129 // Machine architectures
130 // See current registered ELF machine architectures at:
131 // http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
132 enum {
133 EM_NONE = 0, // No machine
134 EM_M32 = 1, // AT&T WE 32100
135 EM_SPARC = 2, // SPARC
136 EM_386 = 3, // Intel 386
137 EM_68K = 4, // Motorola 68000
138 EM_88K = 5, // Motorola 88000
139 EM_IAMCU = 6, // Intel MCU
140 EM_860 = 7, // Intel 80860
141 EM_MIPS = 8, // MIPS R3000
142 EM_S370 = 9, // IBM System/370
143 EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian
144 EM_PARISC = 15, // Hewlett-Packard PA-RISC
145 EM_VPP500 = 17, // Fujitsu VPP500
146 EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC
147 EM_960 = 19, // Intel 80960
148 EM_PPC = 20, // PowerPC
149 EM_PPC64 = 21, // PowerPC64
150 EM_S390 = 22, // IBM System/390
151 EM_SPU = 23, // IBM SPU/SPC
152 EM_V800 = 36, // NEC V800
153 EM_FR20 = 37, // Fujitsu FR20
154 EM_RH32 = 38, // TRW RH-32
155 EM_RCE = 39, // Motorola RCE
156 EM_ARM = 40, // ARM
157 EM_ALPHA = 41, // DEC Alpha
158 EM_SH = 42, // Hitachi SH
159 EM_SPARCV9 = 43, // SPARC V9
160 EM_TRICORE = 44, // Siemens TriCore
161 EM_ARC = 45, // Argonaut RISC Core
162 EM_H8_300 = 46, // Hitachi H8/300
163 EM_H8_300H = 47, // Hitachi H8/300H
164 EM_H8S = 48, // Hitachi H8S
165 EM_H8_500 = 49, // Hitachi H8/500
166 EM_IA_64 = 50, // Intel IA-64 processor architecture
167 EM_MIPS_X = 51, // Stanford MIPS-X
168 EM_COLDFIRE = 52, // Motorola ColdFire
169 EM_68HC12 = 53, // Motorola M68HC12
170 EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator
171 EM_PCP = 55, // Siemens PCP
172 EM_NCPU = 56, // Sony nCPU embedded RISC processor
173 EM_NDR1 = 57, // Denso NDR1 microprocessor
174 EM_STARCORE = 58, // Motorola Star*Core processor
175 EM_ME16 = 59, // Toyota ME16 processor
176 EM_ST100 = 60, // STMicroelectronics ST100 processor
177 EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family
178 EM_X86_64 = 62, // AMD x86-64 architecture
179 EM_PDSP = 63, // Sony DSP Processor
180 EM_PDP10 = 64, // Digital Equipment Corp. PDP-10
181 EM_PDP11 = 65, // Digital Equipment Corp. PDP-11
182 EM_FX66 = 66, // Siemens FX66 microcontroller
183 EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller
184 EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller
185 EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller
186 EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller
187 EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller
188 EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller
189 EM_SVX = 73, // Silicon Graphics SVx
190 EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller
191 EM_VAX = 75, // Digital VAX
192 EM_CRIS = 76, // Axis Communications 32-bit embedded processor
193 EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor
194 EM_FIREPATH = 78, // Element 14 64-bit DSP Processor
195 EM_ZSP = 79, // LSI Logic 16-bit DSP Processor
196 EM_MMIX = 80, // Donald Knuth's educational 64-bit processor
197 EM_HUANY = 81, // Harvard University machine-independent object files
198 EM_PRISM = 82, // SiTera Prism
199 EM_AVR = 83, // Atmel AVR 8-bit microcontroller
200 EM_FR30 = 84, // Fujitsu FR30
201 EM_D10V = 85, // Mitsubishi D10V
202 EM_D30V = 86, // Mitsubishi D30V
203 EM_V850 = 87, // NEC v850
204 EM_M32R = 88, // Mitsubishi M32R
205 EM_MN10300 = 89, // Matsushita MN10300
206 EM_MN10200 = 90, // Matsushita MN10200
207 EM_PJ = 91, // picoJava
208 EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor
209 EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old
210 // spelling/synonym: EM_ARC_A5)
211 EM_XTENSA = 94, // Tensilica Xtensa Architecture
212 EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor
213 EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor
214 EM_NS32K = 97, // National Semiconductor 32000 series
215 EM_TPC = 98, // Tenor Network TPC processor
216 EM_SNP1K = 99, // Trebia SNP 1000 processor
217 EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200
218 EM_IP2K = 101, // Ubicom IP2xxx microcontroller family
219 EM_MAX = 102, // MAX Processor
220 EM_CR = 103, // National Semiconductor CompactRISC microprocessor
221 EM_F2MC16 = 104, // Fujitsu F2MC16
222 EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430
223 EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor
224 EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors
225 EM_SEP = 108, // Sharp embedded microprocessor
226 EM_ARCA = 109, // Arca RISC Microprocessor
227 EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC
228 // of Peking University
229 EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU
230 EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor
231 EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor
232 EM_CRX = 114, // National Semiconductor CompactRISC CRX
233 EM_XGATE = 115, // Motorola XGATE embedded processor
234 EM_C166 = 116, // Infineon C16x/XC16x processor
235 EM_M16C = 117, // Renesas M16C series microprocessors
236 EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal
237 // Controller
238 EM_CE = 119, // Freescale Communication Engine RISC core
239 EM_M32C = 120, // Renesas M32C series microprocessors
240 EM_TSK3000 = 131, // Altium TSK3000 core
241 EM_RS08 = 132, // Freescale RS08 embedded processor
242 EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP
243 // processors
244 EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor
245 EM_SCORE7 = 135, // Sunplus S+core7 RISC processor
246 EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor
247 EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor
248 EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture
249 EM_SE_C17 = 139, // Seiko Epson C17 family
250 EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family
251 EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family
252 EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family
253 EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor
254 EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor
255 EM_R32C = 162, // Renesas R32C series microprocessors
256 EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family
257 EM_HEXAGON = 164, // Qualcomm Hexagon processor
258 EM_8051 = 165, // Intel 8051 and variants
259 EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable
260 // and extensible RISC processors
261 EM_NDS32 = 167, // Andes Technology compact code size embedded RISC
262 // processor family
263 EM_ECOG1 = 168, // Cyan Technology eCOG1X family
264 EM_ECOG1X = 168, // Cyan Technology eCOG1X family
265 EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers
266 EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor
267 EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor
268 EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture
269 EM_RX = 173, // Renesas RX family
270 EM_METAG = 174, // Imagination Technologies META processor
271 // architecture
272 EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture
273 EM_ECOG16 = 176, // Cyan Technology eCOG16 family
274 EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit
275 // microprocessor
276 EM_ETPU = 178, // Freescale Extended Time Processing Unit
277 EM_SLE9X = 179, // Infineon Technologies SLE9X core
278 EM_L10M = 180, // Intel L10M
279 EM_K10M = 181, // Intel K10M
280 EM_AARCH64 = 183, // ARM AArch64
281 EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family
282 EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller
283 EM_TILE64 = 187, // Tilera TILE64 multicore architecture family
284 EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family
285 EM_MICROBLAZE = 189, // Xilinx MicroBlaze 32-bit RISC soft processor core
286 EM_CUDA = 190, // NVIDIA CUDA architecture
287 EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family
288 EM_CLOUDSHIELD = 192, // CloudShield architecture family
289 EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family
290 EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family
291 EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2
292 EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core
293 EM_RL78 = 197, // Renesas RL78 family
294 EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor
295 EM_78KOR = 199, // Renesas 78KOR family
296 EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC)
297 EM_BA1 = 201, // Beyond BA1 CPU architecture
298 EM_BA2 = 202, // Beyond BA2 CPU architecture
299 EM_XCORE = 203, // XMOS xCORE processor family
300 EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family
301 EM_INTEL205 = 205, // Reserved by Intel
302 EM_INTEL206 = 206, // Reserved by Intel
303 EM_INTEL207 = 207, // Reserved by Intel
304 EM_INTEL208 = 208, // Reserved by Intel
305 EM_INTEL209 = 209, // Reserved by Intel
306 EM_KM32 = 210, // KM211 KM32 32-bit processor
307 EM_KMX32 = 211, // KM211 KMX32 32-bit processor
308 EM_KMX16 = 212, // KM211 KMX16 16-bit processor
309 EM_KMX8 = 213, // KM211 KMX8 8-bit processor
310 EM_KVARC = 214, // KM211 KVARC processor
311 EM_CDP = 215, // Paneve CDP architecture family
312 EM_COGE = 216, // Cognitive Smart Memory Processor
313 EM_COOL = 217, // iCelero CoolEngine
314 EM_NORC = 218, // Nanoradio Optimized RISC
315 EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family
316 EM_AMDGPU = 224, // AMD GPU architecture
317 EM_RISCV = 243, // RISC-V
318 EM_LANAI = 244, // Lanai 32-bit processor
319 EM_BPF = 247, // Linux kernel bpf virtual machine
320 EM_VE = 251, // NEC SX-Aurora VE
321 EM_CSKY = 252, // C-SKY 32-bit processor
322 EM_LOONGARCH = 258, // LoongArch
323 };
324
325 // Object file classes.
326 enum {
327 ELFCLASSNONE = 0,
328 ELFCLASS32 = 1, // 32-bit object file
329 ELFCLASS64 = 2 // 64-bit object file
330 };
331
332 // Object file byte orderings.
333 enum {
334 ELFDATANONE = 0, // Invalid data encoding.
335 ELFDATA2LSB = 1, // Little-endian object file
336 ELFDATA2MSB = 2 // Big-endian object file
337 };
338
339 // OS ABI identification.
340 enum {
341 ELFOSABI_NONE = 0, // UNIX System V ABI
342 ELFOSABI_HPUX = 1, // HP-UX operating system
343 ELFOSABI_NETBSD = 2, // NetBSD
344 ELFOSABI_GNU = 3, // GNU/Linux
345 ELFOSABI_LINUX = 3, // Historical alias for ELFOSABI_GNU.
346 ELFOSABI_HURD = 4, // GNU/Hurd
347 ELFOSABI_SOLARIS = 6, // Solaris
348 ELFOSABI_AIX = 7, // AIX
349 ELFOSABI_IRIX = 8, // IRIX
350 ELFOSABI_FREEBSD = 9, // FreeBSD
351 ELFOSABI_TRU64 = 10, // TRU64 UNIX
352 ELFOSABI_MODESTO = 11, // Novell Modesto
353 ELFOSABI_OPENBSD = 12, // OpenBSD
354 ELFOSABI_OPENVMS = 13, // OpenVMS
355 ELFOSABI_NSK = 14, // Hewlett-Packard Non-Stop Kernel
356 ELFOSABI_AROS = 15, // AROS
357 ELFOSABI_FENIXOS = 16, // FenixOS
358 ELFOSABI_CLOUDABI = 17, // Nuxi CloudABI
359 ELFOSABI_CUDA = 51, // NVIDIA CUDA architecture.
360 ELFOSABI_FIRST_ARCH = 64, // First architecture-specific OS ABI
361 ELFOSABI_AMDGPU_HSA = 64, // AMD HSA runtime
362 ELFOSABI_AMDGPU_PAL = 65, // AMD PAL runtime
363 ELFOSABI_AMDGPU_MESA3D = 66, // AMD GCN GPUs (GFX6+) for MESA runtime
364 ELFOSABI_ARM = 97, // ARM
365 ELFOSABI_C6000_ELFABI = 64, // Bare-metal TMS320C6000
366 ELFOSABI_C6000_LINUX = 65, // Linux TMS320C6000
367 ELFOSABI_STANDALONE = 255, // Standalone (embedded) application
368 ELFOSABI_LAST_ARCH = 255 // Last Architecture-specific OS ABI
369 };
370
371 // AMDGPU OS ABI Version identification.
372 enum {
373 // ELFABIVERSION_AMDGPU_HSA_V1 does not exist because OS ABI identification
374 // was never defined for V1.
375 ELFABIVERSION_AMDGPU_HSA_V2 = 0,
376 ELFABIVERSION_AMDGPU_HSA_V3 = 1,
377 ELFABIVERSION_AMDGPU_HSA_V4 = 2,
378 ELFABIVERSION_AMDGPU_HSA_V5 = 3
379 };
380
381 #define ELF_RELOC(name, value) name = value,
382
383 // X86_64 relocations.
384 enum {
385 #include "ELFRelocs/x86_64.def"
386 };
387
388 // i386 relocations.
389 enum {
390 #include "ELFRelocs/i386.def"
391 };
392
393 // ELF Relocation types for PPC32
394 enum {
395 #include "ELFRelocs/PowerPC.def"
396 };
397
398 // Specific e_flags for PPC64
399 enum {
400 // e_flags bits specifying ABI:
401 // 1 for original ABI using function descriptors,
402 // 2 for revised ABI without function descriptors,
403 // 0 for unspecified or not using any features affected by the differences.
404 EF_PPC64_ABI = 3
405 };
406
407 // Special values for the st_other field in the symbol table entry for PPC64.
408 enum {
409 STO_PPC64_LOCAL_BIT = 5,
410 STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT)
411 };
decodePPC64LocalEntryOffset(unsigned Other)412 static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
413 unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
414 return ((1 << Val) >> 2) << 2;
415 }
416
417 // ELF Relocation types for PPC64
418 enum {
419 #include "ELFRelocs/PowerPC64.def"
420 };
421
422 // ELF Relocation types for AArch64
423 enum {
424 #include "ELFRelocs/AArch64.def"
425 };
426
427 // Special values for the st_other field in the symbol table entry for AArch64.
428 enum {
429 // Symbol may follow different calling convention than base PCS.
430 STO_AARCH64_VARIANT_PCS = 0x80
431 };
432
433 // ARM Specific e_flags
434 enum : unsigned {
435 EF_ARM_SOFT_FLOAT = 0x00000200U, // Legacy pre EABI_VER5
436 EF_ARM_ABI_FLOAT_SOFT = 0x00000200U, // EABI_VER5
437 EF_ARM_VFP_FLOAT = 0x00000400U, // Legacy pre EABI_VER5
438 EF_ARM_ABI_FLOAT_HARD = 0x00000400U, // EABI_VER5
439 EF_ARM_BE8 = 0x00800000U,
440 EF_ARM_EABI_UNKNOWN = 0x00000000U,
441 EF_ARM_EABI_VER1 = 0x01000000U,
442 EF_ARM_EABI_VER2 = 0x02000000U,
443 EF_ARM_EABI_VER3 = 0x03000000U,
444 EF_ARM_EABI_VER4 = 0x04000000U,
445 EF_ARM_EABI_VER5 = 0x05000000U,
446 EF_ARM_EABIMASK = 0xFF000000U
447 };
448
449 // ELF Relocation types for ARM
450 enum {
451 #include "ELFRelocs/ARM.def"
452 };
453
454 // ARC Specific e_flags
455 enum : unsigned {
456 EF_ARC_MACH_MSK = 0x000000ff,
457 EF_ARC_OSABI_MSK = 0x00000f00,
458 E_ARC_MACH_ARC600 = 0x00000002,
459 E_ARC_MACH_ARC601 = 0x00000004,
460 E_ARC_MACH_ARC700 = 0x00000003,
461 EF_ARC_CPU_ARCV2EM = 0x00000005,
462 EF_ARC_CPU_ARCV2HS = 0x00000006,
463 E_ARC_OSABI_ORIG = 0x00000000,
464 E_ARC_OSABI_V2 = 0x00000200,
465 E_ARC_OSABI_V3 = 0x00000300,
466 E_ARC_OSABI_V4 = 0x00000400,
467 EF_ARC_PIC = 0x00000100
468 };
469
470 // ELF Relocation types for ARC
471 enum {
472 #include "ELFRelocs/ARC.def"
473 };
474
475 // AVR specific e_flags
476 enum : unsigned {
477 EF_AVR_ARCH_AVR1 = 1,
478 EF_AVR_ARCH_AVR2 = 2,
479 EF_AVR_ARCH_AVR25 = 25,
480 EF_AVR_ARCH_AVR3 = 3,
481 EF_AVR_ARCH_AVR31 = 31,
482 EF_AVR_ARCH_AVR35 = 35,
483 EF_AVR_ARCH_AVR4 = 4,
484 EF_AVR_ARCH_AVR5 = 5,
485 EF_AVR_ARCH_AVR51 = 51,
486 EF_AVR_ARCH_AVR6 = 6,
487 EF_AVR_ARCH_AVRTINY = 100,
488 EF_AVR_ARCH_XMEGA1 = 101,
489 EF_AVR_ARCH_XMEGA2 = 102,
490 EF_AVR_ARCH_XMEGA3 = 103,
491 EF_AVR_ARCH_XMEGA4 = 104,
492 EF_AVR_ARCH_XMEGA5 = 105,
493 EF_AVR_ARCH_XMEGA6 = 106,
494 EF_AVR_ARCH_XMEGA7 = 107,
495
496 EF_AVR_ARCH_MASK = 0x7f, // EF_AVR_ARCH_xxx selection mask
497
498 EF_AVR_LINKRELAX_PREPARED = 0x80, // The file is prepared for linker
499 // relaxation to be applied
500 };
501
502 // ELF Relocation types for AVR
503 enum {
504 #include "ELFRelocs/AVR.def"
505 };
506
507 // Mips Specific e_flags
508 enum : unsigned {
509 EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions
510 EF_MIPS_PIC = 0x00000002, // Position independent code
511 EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code
512 EF_MIPS_ABI2 = 0x00000020, // File uses N32 ABI
513 EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine
514 // in 32-bit mode
515 EF_MIPS_FP64 = 0x00000200, // Code compiled for a 32-bit machine
516 // but uses 64-bit FP registers
517 EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding
518
519 // ABI flags
520 EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
521 EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture.
522 EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode.
523 EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
524 EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant.
525
526 // MIPS machine variant
527 EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation.
528 EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900
529 EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010
530 EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100
531 EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650
532 EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120
533 EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181
534 EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1
535 EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon
536 EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr
537 EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2
538 EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3
539 EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400
540 EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900
541 EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500
542 EF_MIPS_MACH_9000 = 0x00990000, // Unknown
543 EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E
544 EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F
545 EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A
546 EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask
547
548 // ARCH_ASE
549 EF_MIPS_MICROMIPS = 0x02000000, // microMIPS
550 EF_MIPS_ARCH_ASE_M16 = 0x04000000, // Has Mips-16 ISA extensions
551 EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions
552 EF_MIPS_ARCH_ASE = 0x0f000000, // Mask for EF_MIPS_ARCH_ASE_xxx flags
553
554 // ARCH
555 EF_MIPS_ARCH_1 = 0x00000000, // MIPS1 instruction set
556 EF_MIPS_ARCH_2 = 0x10000000, // MIPS2 instruction set
557 EF_MIPS_ARCH_3 = 0x20000000, // MIPS3 instruction set
558 EF_MIPS_ARCH_4 = 0x30000000, // MIPS4 instruction set
559 EF_MIPS_ARCH_5 = 0x40000000, // MIPS5 instruction set
560 EF_MIPS_ARCH_32 = 0x50000000, // MIPS32 instruction set per linux not elf.h
561 EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h
562 EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5
563 EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5
564 EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6
565 EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6
566 EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant
567 };
568
569 // MIPS-specific section indexes
570 enum {
571 SHN_MIPS_ACOMMON = 0xff00, // Common symbols which are defined and allocated
572 SHN_MIPS_TEXT = 0xff01, // Not ABI compliant
573 SHN_MIPS_DATA = 0xff02, // Not ABI compliant
574 SHN_MIPS_SCOMMON = 0xff03, // Common symbols for global data area
575 SHN_MIPS_SUNDEFINED = 0xff04 // Undefined symbols for global data area
576 };
577
578 // ELF Relocation types for Mips
579 enum {
580 #include "ELFRelocs/Mips.def"
581 };
582
583 // Special values for the st_other field in the symbol table entry for MIPS.
584 enum {
585 STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional
586 STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record
587 STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC
588 STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips
589 STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16
590 };
591
592 // .MIPS.options section descriptor kinds
593 enum {
594 ODK_NULL = 0, // Undefined
595 ODK_REGINFO = 1, // Register usage information
596 ODK_EXCEPTIONS = 2, // Exception processing options
597 ODK_PAD = 3, // Section padding options
598 ODK_HWPATCH = 4, // Hardware patches applied
599 ODK_FILL = 5, // Linker fill value
600 ODK_TAGS = 6, // Space for tool identification
601 ODK_HWAND = 7, // Hardware AND patches applied
602 ODK_HWOR = 8, // Hardware OR patches applied
603 ODK_GP_GROUP = 9, // GP group to use for text/data sections
604 ODK_IDENT = 10, // ID information
605 ODK_PAGESIZE = 11 // Page size information
606 };
607
608 // Hexagon-specific e_flags
609 enum {
610 // Object processor version flags, bits[11:0]
611 EF_HEXAGON_MACH_V2 = 0x00000001, // Hexagon V2
612 EF_HEXAGON_MACH_V3 = 0x00000002, // Hexagon V3
613 EF_HEXAGON_MACH_V4 = 0x00000003, // Hexagon V4
614 EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5
615 EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55
616 EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60
617 EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62
618 EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65
619 EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66
620 EF_HEXAGON_MACH_V67 = 0x00000067, // Hexagon V67
621 EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T
622 EF_HEXAGON_MACH_V68 = 0x00000068, // Hexagon V68
623 EF_HEXAGON_MACH_V69 = 0x00000069, // Hexagon V69
624 EF_HEXAGON_MACH_V71 = 0x00000071, // Hexagon V71
625 EF_HEXAGON_MACH_V71T = 0x00008071, // Hexagon V71T
626 EF_HEXAGON_MACH_V73 = 0x00000073, // Hexagon V73
627 EF_HEXAGON_MACH = 0x000003ff, // Hexagon V..
628
629 // Highest ISA version flags
630 EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
631 // of e_flags
632 EF_HEXAGON_ISA_V2 = 0x00000010, // Hexagon V2 ISA
633 EF_HEXAGON_ISA_V3 = 0x00000020, // Hexagon V3 ISA
634 EF_HEXAGON_ISA_V4 = 0x00000030, // Hexagon V4 ISA
635 EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA
636 EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA
637 EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA
638 EF_HEXAGON_ISA_V62 = 0x00000062, // Hexagon V62 ISA
639 EF_HEXAGON_ISA_V65 = 0x00000065, // Hexagon V65 ISA
640 EF_HEXAGON_ISA_V66 = 0x00000066, // Hexagon V66 ISA
641 EF_HEXAGON_ISA_V67 = 0x00000067, // Hexagon V67 ISA
642 EF_HEXAGON_ISA_V68 = 0x00000068, // Hexagon V68 ISA
643 EF_HEXAGON_ISA_V69 = 0x00000069, // Hexagon V69 ISA
644 EF_HEXAGON_ISA_V71 = 0x00000071, // Hexagon V71 ISA
645 EF_HEXAGON_ISA_V73 = 0x00000073, // Hexagon V73 ISA
646 EF_HEXAGON_ISA_V75 = 0x00000075, // Hexagon V75 ISA
647 EF_HEXAGON_ISA = 0x000003ff, // Hexagon V.. ISA
648 };
649
650 // Hexagon-specific section indexes for common small data
651 enum {
652 SHN_HEXAGON_SCOMMON = 0xff00, // Other access sizes
653 SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access
654 SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access
655 SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access
656 SHN_HEXAGON_SCOMMON_8 = 0xff04 // Double-word-size access
657 };
658
659 // ELF Relocation types for Hexagon
660 enum {
661 #include "ELFRelocs/Hexagon.def"
662 };
663
664 // ELF Relocation type for Lanai.
665 enum {
666 #include "ELFRelocs/Lanai.def"
667 };
668
669 // RISCV Specific e_flags
670 enum : unsigned {
671 EF_RISCV_RVC = 0x0001,
672 EF_RISCV_FLOAT_ABI = 0x0006,
673 EF_RISCV_FLOAT_ABI_SOFT = 0x0000,
674 EF_RISCV_FLOAT_ABI_SINGLE = 0x0002,
675 EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004,
676 EF_RISCV_FLOAT_ABI_QUAD = 0x0006,
677 EF_RISCV_RVE = 0x0008,
678 EF_RISCV_TSO = 0x0010,
679 };
680
681 // ELF Relocation types for RISC-V
682 enum {
683 #include "ELFRelocs/RISCV.def"
684 };
685
686 enum {
687 // Symbol may follow different calling convention than the standard calling
688 // convention.
689 STO_RISCV_VARIANT_CC = 0x80
690 };
691
692 // ELF Relocation types for S390/zSeries
693 enum {
694 #include "ELFRelocs/SystemZ.def"
695 };
696
697 // ELF Relocation type for Sparc.
698 enum {
699 #include "ELFRelocs/Sparc.def"
700 };
701
702 // AMDGPU specific e_flags.
703 enum : unsigned {
704 // Processor selection mask for EF_AMDGPU_MACH_* values.
705 EF_AMDGPU_MACH = 0x0ff,
706
707 // Not specified processor.
708 EF_AMDGPU_MACH_NONE = 0x000,
709
710 // R600-based processors.
711
712 // Radeon HD 2000/3000 Series (R600).
713 EF_AMDGPU_MACH_R600_R600 = 0x001,
714 EF_AMDGPU_MACH_R600_R630 = 0x002,
715 EF_AMDGPU_MACH_R600_RS880 = 0x003,
716 EF_AMDGPU_MACH_R600_RV670 = 0x004,
717 // Radeon HD 4000 Series (R700).
718 EF_AMDGPU_MACH_R600_RV710 = 0x005,
719 EF_AMDGPU_MACH_R600_RV730 = 0x006,
720 EF_AMDGPU_MACH_R600_RV770 = 0x007,
721 // Radeon HD 5000 Series (Evergreen).
722 EF_AMDGPU_MACH_R600_CEDAR = 0x008,
723 EF_AMDGPU_MACH_R600_CYPRESS = 0x009,
724 EF_AMDGPU_MACH_R600_JUNIPER = 0x00a,
725 EF_AMDGPU_MACH_R600_REDWOOD = 0x00b,
726 EF_AMDGPU_MACH_R600_SUMO = 0x00c,
727 // Radeon HD 6000 Series (Northern Islands).
728 EF_AMDGPU_MACH_R600_BARTS = 0x00d,
729 EF_AMDGPU_MACH_R600_CAICOS = 0x00e,
730 EF_AMDGPU_MACH_R600_CAYMAN = 0x00f,
731 EF_AMDGPU_MACH_R600_TURKS = 0x010,
732
733 // Reserved for R600-based processors.
734 EF_AMDGPU_MACH_R600_RESERVED_FIRST = 0x011,
735 EF_AMDGPU_MACH_R600_RESERVED_LAST = 0x01f,
736
737 // First/last R600-based processors.
738 EF_AMDGPU_MACH_R600_FIRST = EF_AMDGPU_MACH_R600_R600,
739 EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS,
740
741 // AMDGCN-based processors.
742 // clang-format off
743 EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
744 EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021,
745 EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
746 EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
747 EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
748 EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
749 EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
750 EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027,
751 EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
752 EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
753 EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
754 EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
755 EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
756 EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
757 EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
758 EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
759 EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
760 EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
761 EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032,
762 EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
763 EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
764 EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
765 EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
766 EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
767 EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
768 EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039,
769 EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a,
770 EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b,
771 EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c,
772 EF_AMDGPU_MACH_AMDGCN_GFX1035 = 0x03d,
773 EF_AMDGPU_MACH_AMDGCN_GFX1034 = 0x03e,
774 EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
775 EF_AMDGPU_MACH_AMDGCN_GFX940 = 0x040,
776 EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041,
777 EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042,
778 EF_AMDGPU_MACH_AMDGCN_GFX1150 = 0x043,
779 EF_AMDGPU_MACH_AMDGCN_GFX1103 = 0x044,
780 EF_AMDGPU_MACH_AMDGCN_GFX1036 = 0x045,
781 EF_AMDGPU_MACH_AMDGCN_GFX1101 = 0x046,
782 EF_AMDGPU_MACH_AMDGCN_GFX1102 = 0x047,
783 EF_AMDGPU_MACH_AMDGCN_GFX1200 = 0x048,
784 EF_AMDGPU_MACH_AMDGCN_RESERVED_0X49 = 0x049,
785 EF_AMDGPU_MACH_AMDGCN_GFX1151 = 0x04a,
786 EF_AMDGPU_MACH_AMDGCN_GFX941 = 0x04b,
787 EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c,
788 EF_AMDGPU_MACH_AMDGCN_RESERVED_0X4D = 0x04d,
789 EF_AMDGPU_MACH_AMDGCN_GFX1201 = 0x04e,
790 EF_AMDGPU_MACH_AMDGCN_RESERVED_0X4F = 0x04f,
791 EF_AMDGPU_MACH_AMDGCN_RESERVED_0X50 = 0x050,
792 // clang-format on
793
794 // First/last AMDGCN-based processors.
795 EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
796 EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1201,
797
798 // Indicates if the "xnack" target feature is enabled for all code contained
799 // in the object.
800 //
801 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
802 EF_AMDGPU_FEATURE_XNACK_V2 = 0x01,
803 // Indicates if the trap handler is enabled for all code contained
804 // in the object.
805 //
806 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
807 EF_AMDGPU_FEATURE_TRAP_HANDLER_V2 = 0x02,
808
809 // Indicates if the "xnack" target feature is enabled for all code contained
810 // in the object.
811 //
812 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
813 EF_AMDGPU_FEATURE_XNACK_V3 = 0x100,
814 // Indicates if the "sramecc" target feature is enabled for all code
815 // contained in the object.
816 //
817 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
818 EF_AMDGPU_FEATURE_SRAMECC_V3 = 0x200,
819
820 // XNACK selection mask for EF_AMDGPU_FEATURE_XNACK_* values.
821 //
822 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
823 EF_AMDGPU_FEATURE_XNACK_V4 = 0x300,
824 // XNACK is not supported.
825 EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 = 0x000,
826 // XNACK is any/default/unspecified.
827 EF_AMDGPU_FEATURE_XNACK_ANY_V4 = 0x100,
828 // XNACK is off.
829 EF_AMDGPU_FEATURE_XNACK_OFF_V4 = 0x200,
830 // XNACK is on.
831 EF_AMDGPU_FEATURE_XNACK_ON_V4 = 0x300,
832
833 // SRAMECC selection mask for EF_AMDGPU_FEATURE_SRAMECC_* values.
834 //
835 // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
836 EF_AMDGPU_FEATURE_SRAMECC_V4 = 0xc00,
837 // SRAMECC is not supported.
838 EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 = 0x000,
839 // SRAMECC is any/default/unspecified.
840 EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 = 0x400,
841 // SRAMECC is off.
842 EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800,
843 // SRAMECC is on.
844 EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00,
845 };
846
847 // ELF Relocation types for AMDGPU
848 enum {
849 #include "ELFRelocs/AMDGPU.def"
850 };
851
852 // NVPTX specific e_flags.
853 enum : unsigned {
854 // Processor selection mask for EF_CUDA_SM* values.
855 EF_CUDA_SM = 0xff,
856
857 // SM based processor values.
858 EF_CUDA_SM20 = 0x14,
859 EF_CUDA_SM21 = 0x15,
860 EF_CUDA_SM30 = 0x1e,
861 EF_CUDA_SM32 = 0x20,
862 EF_CUDA_SM35 = 0x23,
863 EF_CUDA_SM37 = 0x25,
864 EF_CUDA_SM50 = 0x32,
865 EF_CUDA_SM52 = 0x34,
866 EF_CUDA_SM53 = 0x35,
867 EF_CUDA_SM60 = 0x3c,
868 EF_CUDA_SM61 = 0x3d,
869 EF_CUDA_SM62 = 0x3e,
870 EF_CUDA_SM70 = 0x46,
871 EF_CUDA_SM72 = 0x48,
872 EF_CUDA_SM75 = 0x4b,
873 EF_CUDA_SM80 = 0x50,
874 EF_CUDA_SM86 = 0x56,
875 EF_CUDA_SM87 = 0x57,
876 EF_CUDA_SM89 = 0x59,
877 // The sm_90a variant uses the same machine flag.
878 EF_CUDA_SM90 = 0x5a,
879
880 // Unified texture binding is enabled.
881 EF_CUDA_TEXMODE_UNIFIED = 0x100,
882 // Independent texture binding is enabled.
883 EF_CUDA_TEXMODE_INDEPENDANT = 0x200,
884 // The target is using 64-bit addressing.
885 EF_CUDA_64BIT_ADDRESS = 0x400,
886 // Set when using the sm_90a processor.
887 EF_CUDA_ACCELERATORS = 0x800,
888 // Undocumented software feature.
889 EF_CUDA_SW_FLAG_V2 = 0x1000,
890
891 // Virtual processor selection mask for EF_CUDA_VIRTUAL_SM* values.
892 EF_CUDA_VIRTUAL_SM = 0xff0000,
893 };
894
895 // ELF Relocation types for BPF
896 enum {
897 #include "ELFRelocs/BPF.def"
898 };
899
900 // ELF Relocation types for M68k
901 enum {
902 #include "ELFRelocs/M68k.def"
903 };
904
905 // MSP430 specific e_flags
906 enum : unsigned {
907 EF_MSP430_MACH_MSP430x11 = 11,
908 EF_MSP430_MACH_MSP430x11x1 = 110,
909 EF_MSP430_MACH_MSP430x12 = 12,
910 EF_MSP430_MACH_MSP430x13 = 13,
911 EF_MSP430_MACH_MSP430x14 = 14,
912 EF_MSP430_MACH_MSP430x15 = 15,
913 EF_MSP430_MACH_MSP430x16 = 16,
914 EF_MSP430_MACH_MSP430x20 = 20,
915 EF_MSP430_MACH_MSP430x22 = 22,
916 EF_MSP430_MACH_MSP430x23 = 23,
917 EF_MSP430_MACH_MSP430x24 = 24,
918 EF_MSP430_MACH_MSP430x26 = 26,
919 EF_MSP430_MACH_MSP430x31 = 31,
920 EF_MSP430_MACH_MSP430x32 = 32,
921 EF_MSP430_MACH_MSP430x33 = 33,
922 EF_MSP430_MACH_MSP430x41 = 41,
923 EF_MSP430_MACH_MSP430x42 = 42,
924 EF_MSP430_MACH_MSP430x43 = 43,
925 EF_MSP430_MACH_MSP430x44 = 44,
926 EF_MSP430_MACH_MSP430X = 45,
927 EF_MSP430_MACH_MSP430x46 = 46,
928 EF_MSP430_MACH_MSP430x47 = 47,
929 EF_MSP430_MACH_MSP430x54 = 54,
930 };
931
932 // ELF Relocation types for MSP430
933 enum {
934 #include "ELFRelocs/MSP430.def"
935 };
936
937 // ELF Relocation type for VE.
938 enum {
939 #include "ELFRelocs/VE.def"
940 };
941
942 // CSKY Specific e_flags
943 enum : unsigned {
944 EF_CSKY_801 = 0xa,
945 EF_CSKY_802 = 0x10,
946 EF_CSKY_803 = 0x9,
947 EF_CSKY_805 = 0x11,
948 EF_CSKY_807 = 0x6,
949 EF_CSKY_810 = 0x8,
950 EF_CSKY_860 = 0xb,
951 EF_CSKY_800 = 0x1f,
952 EF_CSKY_FLOAT = 0x2000,
953 EF_CSKY_DSP = 0x4000,
954 EF_CSKY_ABIV2 = 0x20000000,
955 EF_CSKY_EFV1 = 0x1000000,
956 EF_CSKY_EFV2 = 0x2000000,
957 EF_CSKY_EFV3 = 0x3000000
958 };
959
960 // ELF Relocation types for CSKY
961 enum {
962 #include "ELFRelocs/CSKY.def"
963 };
964
965 // LoongArch Specific e_flags
966 enum : unsigned {
967 // Definitions from LoongArch ELF psABI v2.01.
968 // Reference: https://github.com/loongson/LoongArch-Documentation
969 // (commit hash 296de4def055c871809068e0816325a4ac04eb12)
970
971 // Base ABI Modifiers
972 EF_LOONGARCH_ABI_SOFT_FLOAT = 0x1,
973 EF_LOONGARCH_ABI_SINGLE_FLOAT = 0x2,
974 EF_LOONGARCH_ABI_DOUBLE_FLOAT = 0x3,
975 EF_LOONGARCH_ABI_MODIFIER_MASK = 0x7,
976
977 // Object file ABI versions
978 EF_LOONGARCH_OBJABI_V0 = 0x0,
979 EF_LOONGARCH_OBJABI_V1 = 0x40,
980 EF_LOONGARCH_OBJABI_MASK = 0xC0,
981 };
982
983 // ELF Relocation types for LoongArch
984 enum {
985 #include "ELFRelocs/LoongArch.def"
986 };
987
988 // Xtensa specific e_flags
989 enum : unsigned {
990 // Four-bit Xtensa machine type mask.
991 EF_XTENSA_MACH = 0x0000000f,
992 // Various CPU types.
993 EF_XTENSA_MACH_NONE = 0x00000000, // A base Xtensa implementation
994 EF_XTENSA_XT_INSN = 0x00000100,
995 EF_XTENSA_XT_LIT = 0x00000200,
996 };
997
998 // ELF Relocation types for Xtensa
999 enum {
1000 #include "ELFRelocs/Xtensa.def"
1001 };
1002
1003 #undef ELF_RELOC
1004
1005 // Section header.
1006 struct Elf32_Shdr {
1007 Elf32_Word sh_name; // Section name (index into string table)
1008 Elf32_Word sh_type; // Section type (SHT_*)
1009 Elf32_Word sh_flags; // Section flags (SHF_*)
1010 Elf32_Addr sh_addr; // Address where section is to be loaded
1011 Elf32_Off sh_offset; // File offset of section data, in bytes
1012 Elf32_Word sh_size; // Size of section, in bytes
1013 Elf32_Word sh_link; // Section type-specific header table index link
1014 Elf32_Word sh_info; // Section type-specific extra information
1015 Elf32_Word sh_addralign; // Section address alignment
1016 Elf32_Word sh_entsize; // Size of records contained within the section
1017 };
1018
1019 // Section header for ELF64 - same fields as ELF32, different types.
1020 struct Elf64_Shdr {
1021 Elf64_Word sh_name;
1022 Elf64_Word sh_type;
1023 Elf64_Xword sh_flags;
1024 Elf64_Addr sh_addr;
1025 Elf64_Off sh_offset;
1026 Elf64_Xword sh_size;
1027 Elf64_Word sh_link;
1028 Elf64_Word sh_info;
1029 Elf64_Xword sh_addralign;
1030 Elf64_Xword sh_entsize;
1031 };
1032
1033 // Special section indices.
1034 enum {
1035 SHN_UNDEF = 0, // Undefined, missing, irrelevant, or meaningless
1036 SHN_LORESERVE = 0xff00, // Lowest reserved index
1037 SHN_LOPROC = 0xff00, // Lowest processor-specific index
1038 SHN_HIPROC = 0xff1f, // Highest processor-specific index
1039 SHN_LOOS = 0xff20, // Lowest operating system-specific index
1040 SHN_HIOS = 0xff3f, // Highest operating system-specific index
1041 SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation
1042 SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables
1043 SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE
1044 SHN_HIRESERVE = 0xffff // Highest reserved index
1045 };
1046
1047 // Section types.
1048 enum : unsigned {
1049 SHT_NULL = 0, // No associated section (inactive entry).
1050 SHT_PROGBITS = 1, // Program-defined contents.
1051 SHT_SYMTAB = 2, // Symbol table.
1052 SHT_STRTAB = 3, // String table.
1053 SHT_RELA = 4, // Relocation entries; explicit addends.
1054 SHT_HASH = 5, // Symbol hash table.
1055 SHT_DYNAMIC = 6, // Information for dynamic linking.
1056 SHT_NOTE = 7, // Information about the file.
1057 SHT_NOBITS = 8, // Data occupies no space in the file.
1058 SHT_REL = 9, // Relocation entries; no explicit addends.
1059 SHT_SHLIB = 10, // Reserved.
1060 SHT_DYNSYM = 11, // Symbol table.
1061 SHT_INIT_ARRAY = 14, // Pointers to initialization functions.
1062 SHT_FINI_ARRAY = 15, // Pointers to termination functions.
1063 SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions.
1064 SHT_GROUP = 17, // Section group.
1065 SHT_SYMTAB_SHNDX = 18, // Indices for SHN_XINDEX entries.
1066 // Experimental support for SHT_RELR sections. For details, see proposal
1067 // at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
1068 SHT_RELR = 19, // Relocation entries; only offsets.
1069 SHT_LOOS = 0x60000000, // Lowest operating system-specific type.
1070 // Android packed relocation section types.
1071 // https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37
1072 SHT_ANDROID_REL = 0x60000001,
1073 SHT_ANDROID_RELA = 0x60000002,
1074 SHT_LLVM_ODRTAB = 0x6fff4c00, // LLVM ODR table.
1075 SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options.
1076 SHT_LLVM_ADDRSIG = 0x6fff4c03, // List of address-significant symbols
1077 // for safe ICF.
1078 SHT_LLVM_DEPENDENT_LIBRARIES =
1079 0x6fff4c04, // LLVM Dependent Library Specifiers.
1080 SHT_LLVM_SYMPART = 0x6fff4c05, // Symbol partition specification.
1081 SHT_LLVM_PART_EHDR = 0x6fff4c06, // ELF header for loadable partition.
1082 SHT_LLVM_PART_PHDR = 0x6fff4c07, // Phdrs for loadable partition.
1083 SHT_LLVM_BB_ADDR_MAP_V0 =
1084 0x6fff4c08, // LLVM Basic Block Address Map (old version kept for
1085 // backward-compatibility).
1086 SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c09, // LLVM Call Graph Profile.
1087 SHT_LLVM_BB_ADDR_MAP = 0x6fff4c0a, // LLVM Basic Block Address Map.
1088 SHT_LLVM_OFFLOADING = 0x6fff4c0b, // LLVM device offloading data.
1089 SHT_LLVM_LTO = 0x6fff4c0c, // .llvm.lto for fat LTO.
1090 // Android's experimental support for SHT_RELR sections.
1091 // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512
1092 SHT_ANDROID_RELR = 0x6fffff00, // Relocation entries; only offsets.
1093 SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes.
1094 SHT_GNU_HASH = 0x6ffffff6, // GNU-style hash table.
1095 SHT_GNU_verdef = 0x6ffffffd, // GNU version definitions.
1096 SHT_GNU_verneed = 0x6ffffffe, // GNU version references.
1097 SHT_GNU_versym = 0x6fffffff, // GNU symbol versions table.
1098 SHT_HIOS = 0x6fffffff, // Highest operating system-specific type.
1099 SHT_LOPROC = 0x70000000, // Lowest processor arch-specific type.
1100 // Fixme: All this is duplicated in MCSectionELF. Why??
1101 // Exception Index table
1102 SHT_ARM_EXIDX = 0x70000001U,
1103 // BPABI DLL dynamic linking pre-emption map
1104 SHT_ARM_PREEMPTMAP = 0x70000002U,
1105 // Object file compatibility attributes
1106 SHT_ARM_ATTRIBUTES = 0x70000003U,
1107 SHT_ARM_DEBUGOVERLAY = 0x70000004U,
1108 SHT_ARM_OVERLAYSECTION = 0x70000005U,
1109 // Special aarch64-specific section for MTE support, as described in:
1110 // https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#section-types
1111 SHT_AARCH64_AUTH_RELR = 0x70000004U,
1112 // Special aarch64-specific sections for MTE support, as described in:
1113 // https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#7section-types
1114 SHT_AARCH64_MEMTAG_GLOBALS_STATIC = 0x70000007U,
1115 SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC = 0x70000008U,
1116 SHT_HEX_ORDERED = 0x70000000, // Link editor is to sort the entries in
1117 // this section based on their sizes
1118 SHT_X86_64_UNWIND = 0x70000001, // Unwind information
1119
1120 SHT_MIPS_REGINFO = 0x70000006, // Register usage information
1121 SHT_MIPS_OPTIONS = 0x7000000d, // General options
1122 SHT_MIPS_DWARF = 0x7000001e, // DWARF debugging section.
1123 SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information.
1124
1125 SHT_MSP430_ATTRIBUTES = 0x70000003U,
1126
1127 SHT_RISCV_ATTRIBUTES = 0x70000003U,
1128
1129 SHT_CSKY_ATTRIBUTES = 0x70000001U,
1130
1131 SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type.
1132 SHT_LOUSER = 0x80000000, // Lowest type reserved for applications.
1133 SHT_HIUSER = 0xffffffff // Highest type reserved for applications.
1134 };
1135
1136 // Section flags.
1137 enum : unsigned {
1138 // Section data should be writable during execution.
1139 SHF_WRITE = 0x1,
1140
1141 // Section occupies memory during program execution.
1142 SHF_ALLOC = 0x2,
1143
1144 // Section contains executable machine instructions.
1145 SHF_EXECINSTR = 0x4,
1146
1147 // The data in this section may be merged.
1148 SHF_MERGE = 0x10,
1149
1150 // The data in this section is null-terminated strings.
1151 SHF_STRINGS = 0x20,
1152
1153 // A field in this section holds a section header table index.
1154 SHF_INFO_LINK = 0x40U,
1155
1156 // Adds special ordering requirements for link editors.
1157 SHF_LINK_ORDER = 0x80U,
1158
1159 // This section requires special OS-specific processing to avoid incorrect
1160 // behavior.
1161 SHF_OS_NONCONFORMING = 0x100U,
1162
1163 // This section is a member of a section group.
1164 SHF_GROUP = 0x200U,
1165
1166 // This section holds Thread-Local Storage.
1167 SHF_TLS = 0x400U,
1168
1169 // Identifies a section containing compressed data.
1170 SHF_COMPRESSED = 0x800U,
1171
1172 // This section should not be garbage collected by the linker.
1173 SHF_GNU_RETAIN = 0x200000,
1174
1175 // This section is excluded from the final executable or shared library.
1176 SHF_EXCLUDE = 0x80000000U,
1177
1178 // Start of target-specific flags.
1179
1180 SHF_MASKOS = 0x0ff00000,
1181
1182 // Solaris equivalent of SHF_GNU_RETAIN.
1183 SHF_SUNW_NODISCARD = 0x00100000,
1184
1185 // Bits indicating processor-specific flags.
1186 SHF_MASKPROC = 0xf0000000,
1187
1188 /// All sections with the "d" flag are grouped together by the linker to form
1189 /// the data section and the dp register is set to the start of the section by
1190 /// the boot code.
1191 XCORE_SHF_DP_SECTION = 0x10000000,
1192
1193 /// All sections with the "c" flag are grouped together by the linker to form
1194 /// the constant pool and the cp register is set to the start of the constant
1195 /// pool by the boot code.
1196 XCORE_SHF_CP_SECTION = 0x20000000,
1197
1198 // If an object file section does not have this flag set, then it may not hold
1199 // more than 2GB and can be freely referred to in objects using smaller code
1200 // models. Otherwise, only objects using larger code models can refer to them.
1201 // For example, a medium code model object can refer to data in a section that
1202 // sets this flag besides being able to refer to data in a section that does
1203 // not set it; likewise, a small code model object can refer only to code in a
1204 // section that does not set this flag.
1205 SHF_X86_64_LARGE = 0x10000000,
1206
1207 // All sections with the GPREL flag are grouped into a global data area
1208 // for faster accesses
1209 SHF_HEX_GPREL = 0x10000000,
1210
1211 // Section contains text/data which may be replicated in other sections.
1212 // Linker must retain only one copy.
1213 SHF_MIPS_NODUPES = 0x01000000,
1214
1215 // Linker must generate implicit hidden weak names.
1216 SHF_MIPS_NAMES = 0x02000000,
1217
1218 // Section data local to process.
1219 SHF_MIPS_LOCAL = 0x04000000,
1220
1221 // Do not strip this section.
1222 SHF_MIPS_NOSTRIP = 0x08000000,
1223
1224 // Section must be part of global data area.
1225 SHF_MIPS_GPREL = 0x10000000,
1226
1227 // This section should be merged.
1228 SHF_MIPS_MERGE = 0x20000000,
1229
1230 // Address size to be inferred from section entry size.
1231 SHF_MIPS_ADDR = 0x40000000,
1232
1233 // Section data is string data by default.
1234 SHF_MIPS_STRING = 0x80000000,
1235
1236 // Make code section unreadable when in execute-only mode
1237 SHF_ARM_PURECODE = 0x20000000
1238 };
1239
1240 // Section Group Flags
1241 enum : unsigned {
1242 GRP_COMDAT = 0x1,
1243 GRP_MASKOS = 0x0ff00000,
1244 GRP_MASKPROC = 0xf0000000
1245 };
1246
1247 // Symbol table entries for ELF32.
1248 struct Elf32_Sym {
1249 Elf32_Word st_name; // Symbol name (index into string table)
1250 Elf32_Addr st_value; // Value or address associated with the symbol
1251 Elf32_Word st_size; // Size of the symbol
1252 unsigned char st_info; // Symbol's type and binding attributes
1253 unsigned char st_other; // Must be zero; reserved
1254 Elf32_Half st_shndx; // Which section (header table index) it's defined in
1255
1256 // These accessors and mutators correspond to the ELF32_ST_BIND,
1257 // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
getBindingElf32_Sym1258 unsigned char getBinding() const { return st_info >> 4; }
getTypeElf32_Sym1259 unsigned char getType() const { return st_info & 0x0f; }
setBindingElf32_Sym1260 void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
setTypeElf32_Sym1261 void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
setBindingAndTypeElf32_Sym1262 void setBindingAndType(unsigned char b, unsigned char t) {
1263 st_info = (b << 4) + (t & 0x0f);
1264 }
1265 };
1266
1267 // Symbol table entries for ELF64.
1268 struct Elf64_Sym {
1269 Elf64_Word st_name; // Symbol name (index into string table)
1270 unsigned char st_info; // Symbol's type and binding attributes
1271 unsigned char st_other; // Must be zero; reserved
1272 Elf64_Half st_shndx; // Which section (header tbl index) it's defined in
1273 Elf64_Addr st_value; // Value or address associated with the symbol
1274 Elf64_Xword st_size; // Size of the symbol
1275
1276 // These accessors and mutators are identical to those defined for ELF32
1277 // symbol table entries.
getBindingElf64_Sym1278 unsigned char getBinding() const { return st_info >> 4; }
getTypeElf64_Sym1279 unsigned char getType() const { return st_info & 0x0f; }
setBindingElf64_Sym1280 void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
setTypeElf64_Sym1281 void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
setBindingAndTypeElf64_Sym1282 void setBindingAndType(unsigned char b, unsigned char t) {
1283 st_info = (b << 4) + (t & 0x0f);
1284 }
1285 };
1286
1287 // The size (in bytes) of symbol table entries.
1288 enum {
1289 SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size
1290 SYMENTRY_SIZE64 = 24 // 64-bit symbol entry size.
1291 };
1292
1293 // Symbol bindings.
1294 enum {
1295 STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def
1296 STB_GLOBAL = 1, // Global symbol, visible to all object files being combined
1297 STB_WEAK = 2, // Weak symbol, like global but lower-precedence
1298 STB_GNU_UNIQUE = 10,
1299 STB_LOOS = 10, // Lowest operating system-specific binding type
1300 STB_HIOS = 12, // Highest operating system-specific binding type
1301 STB_LOPROC = 13, // Lowest processor-specific binding type
1302 STB_HIPROC = 15 // Highest processor-specific binding type
1303 };
1304
1305 // Symbol types.
1306 enum {
1307 STT_NOTYPE = 0, // Symbol's type is not specified
1308 STT_OBJECT = 1, // Symbol is a data object (variable, array, etc.)
1309 STT_FUNC = 2, // Symbol is executable code (function, etc.)
1310 STT_SECTION = 3, // Symbol refers to a section
1311 STT_FILE = 4, // Local, absolute symbol that refers to a file
1312 STT_COMMON = 5, // An uninitialized common block
1313 STT_TLS = 6, // Thread local data object
1314 STT_GNU_IFUNC = 10, // GNU indirect function
1315 STT_LOOS = 10, // Lowest operating system-specific symbol type
1316 STT_HIOS = 12, // Highest operating system-specific symbol type
1317 STT_LOPROC = 13, // Lowest processor-specific symbol type
1318 STT_HIPROC = 15, // Highest processor-specific symbol type
1319
1320 // AMDGPU symbol types
1321 STT_AMDGPU_HSA_KERNEL = 10
1322 };
1323
1324 enum {
1325 STV_DEFAULT = 0, // Visibility is specified by binding type
1326 STV_INTERNAL = 1, // Defined by processor supplements
1327 STV_HIDDEN = 2, // Not visible to other components
1328 STV_PROTECTED = 3 // Visible in other components but not preemptable
1329 };
1330
1331 // Symbol number.
1332 enum { STN_UNDEF = 0 };
1333
1334 // Special relocation symbols used in the MIPS64 ELF relocation entries
1335 enum {
1336 RSS_UNDEF = 0, // None
1337 RSS_GP = 1, // Value of gp
1338 RSS_GP0 = 2, // Value of gp used to create object being relocated
1339 RSS_LOC = 3 // Address of location being relocated
1340 };
1341
1342 // Relocation entry, without explicit addend.
1343 struct Elf32_Rel {
1344 Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
1345 Elf32_Word r_info; // Symbol table index and type of relocation to apply
1346
1347 // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1348 // and ELF32_R_INFO macros defined in the ELF specification:
getSymbolElf32_Rel1349 Elf32_Word getSymbol() const { return (r_info >> 8); }
getTypeElf32_Rel1350 unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
setSymbolElf32_Rel1351 void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
setTypeElf32_Rel1352 void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf32_Rel1353 void setSymbolAndType(Elf32_Word s, unsigned char t) {
1354 r_info = (s << 8) + t;
1355 }
1356 };
1357
1358 // Relocation entry with explicit addend.
1359 struct Elf32_Rela {
1360 Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
1361 Elf32_Word r_info; // Symbol table index and type of relocation to apply
1362 Elf32_Sword r_addend; // Compute value for relocatable field by adding this
1363
1364 // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1365 // and ELF32_R_INFO macros defined in the ELF specification:
getSymbolElf32_Rela1366 Elf32_Word getSymbol() const { return (r_info >> 8); }
getTypeElf32_Rela1367 unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
setSymbolElf32_Rela1368 void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
setTypeElf32_Rela1369 void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf32_Rela1370 void setSymbolAndType(Elf32_Word s, unsigned char t) {
1371 r_info = (s << 8) + t;
1372 }
1373 };
1374
1375 // Relocation entry without explicit addend or info (relative relocations only).
1376 typedef Elf32_Word Elf32_Relr; // offset/bitmap for relative relocations
1377
1378 // Relocation entry, without explicit addend.
1379 struct Elf64_Rel {
1380 Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1381 Elf64_Xword r_info; // Symbol table index and type of relocation to apply.
1382
1383 // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1384 // and ELF64_R_INFO macros defined in the ELF specification:
getSymbolElf64_Rel1385 Elf64_Word getSymbol() const { return (r_info >> 32); }
getTypeElf64_Rel1386 Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
setSymbolElf64_Rel1387 void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
setTypeElf64_Rel1388 void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf64_Rel1389 void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1390 r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1391 }
1392 };
1393
1394 // Relocation entry with explicit addend.
1395 struct Elf64_Rela {
1396 Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1397 Elf64_Xword r_info; // Symbol table index and type of relocation to apply.
1398 Elf64_Sxword r_addend; // Compute value for relocatable field by adding this.
1399
1400 // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1401 // and ELF64_R_INFO macros defined in the ELF specification:
getSymbolElf64_Rela1402 Elf64_Word getSymbol() const { return (r_info >> 32); }
getTypeElf64_Rela1403 Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
setSymbolElf64_Rela1404 void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
setTypeElf64_Rela1405 void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf64_Rela1406 void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1407 r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1408 }
1409 };
1410
1411 // Relocation entry without explicit addend or info (relative relocations only).
1412 typedef Elf64_Xword Elf64_Relr; // offset/bitmap for relative relocations
1413
1414 // Program header for ELF32.
1415 struct Elf32_Phdr {
1416 Elf32_Word p_type; // Type of segment
1417 Elf32_Off p_offset; // File offset where segment is located, in bytes
1418 Elf32_Addr p_vaddr; // Virtual address of beginning of segment
1419 Elf32_Addr p_paddr; // Physical address of beginning of segment (OS-specific)
1420 Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero)
1421 Elf32_Word p_memsz; // Num. of bytes in mem image of segment (may be zero)
1422 Elf32_Word p_flags; // Segment flags
1423 Elf32_Word p_align; // Segment alignment constraint
1424 };
1425
1426 // Program header for ELF64.
1427 struct Elf64_Phdr {
1428 Elf64_Word p_type; // Type of segment
1429 Elf64_Word p_flags; // Segment flags
1430 Elf64_Off p_offset; // File offset where segment is located, in bytes
1431 Elf64_Addr p_vaddr; // Virtual address of beginning of segment
1432 Elf64_Addr p_paddr; // Physical addr of beginning of segment (OS-specific)
1433 Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero)
1434 Elf64_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero)
1435 Elf64_Xword p_align; // Segment alignment constraint
1436 };
1437
1438 // Segment types.
1439 enum {
1440 PT_NULL = 0, // Unused segment.
1441 PT_LOAD = 1, // Loadable segment.
1442 PT_DYNAMIC = 2, // Dynamic linking information.
1443 PT_INTERP = 3, // Interpreter pathname.
1444 PT_NOTE = 4, // Auxiliary information.
1445 PT_SHLIB = 5, // Reserved.
1446 PT_PHDR = 6, // The program header table itself.
1447 PT_TLS = 7, // The thread-local storage template.
1448 PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type.
1449 PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type.
1450 PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type.
1451 PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type.
1452
1453 // x86-64 program header types.
1454 // These all contain stack unwind tables.
1455 PT_GNU_EH_FRAME = 0x6474e550,
1456 PT_SUNW_EH_FRAME = 0x6474e550,
1457 PT_SUNW_UNWIND = 0x6464e550,
1458
1459 PT_GNU_STACK = 0x6474e551, // Indicates stack executability.
1460 PT_GNU_RELRO = 0x6474e552, // Read-only after relocation.
1461 PT_GNU_PROPERTY = 0x6474e553, // .note.gnu.property notes sections.
1462
1463 PT_OPENBSD_MUTABLE = 0x65a3dbe5, // Like bss, but not immutable.
1464 PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
1465 PT_OPENBSD_WXNEEDED = 0x65a3dbe7, // Program does W^X violations.
1466 PT_OPENBSD_NOBTCFI = 0x65a3dbe8, // Do not enforce branch target CFI.
1467 PT_OPENBSD_SYSCALLS = 0x65a3dbe9, // System call sites.
1468 PT_OPENBSD_BOOTDATA = 0x65a41be6, // Section for boot arguments.
1469
1470 // ARM program header types.
1471 PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info
1472 // These all contain stack unwind tables.
1473 PT_ARM_EXIDX = 0x70000001,
1474 PT_ARM_UNWIND = 0x70000001,
1475 // MTE memory tag segment type
1476 PT_AARCH64_MEMTAG_MTE = 0x70000002,
1477
1478 // MIPS program header types.
1479 PT_MIPS_REGINFO = 0x70000000, // Register usage information.
1480 PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table.
1481 PT_MIPS_OPTIONS = 0x70000002, // Options segment.
1482 PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment.
1483
1484 // RISCV program header types.
1485 PT_RISCV_ATTRIBUTES = 0x70000003,
1486 };
1487
1488 // Segment flag bits.
1489 enum : unsigned {
1490 PF_X = 1, // Execute
1491 PF_W = 2, // Write
1492 PF_R = 4, // Read
1493 PF_MASKOS = 0x0ff00000, // Bits for operating system-specific semantics.
1494 PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics.
1495 };
1496
1497 // Dynamic table entry for ELF32.
1498 struct Elf32_Dyn {
1499 Elf32_Sword d_tag; // Type of dynamic table entry.
1500 union {
1501 Elf32_Word d_val; // Integer value of entry.
1502 Elf32_Addr d_ptr; // Pointer value of entry.
1503 } d_un;
1504 };
1505
1506 // Dynamic table entry for ELF64.
1507 struct Elf64_Dyn {
1508 Elf64_Sxword d_tag; // Type of dynamic table entry.
1509 union {
1510 Elf64_Xword d_val; // Integer value of entry.
1511 Elf64_Addr d_ptr; // Pointer value of entry.
1512 } d_un;
1513 };
1514
1515 // Dynamic table entry tags.
1516 enum {
1517 #define DYNAMIC_TAG(name, value) DT_##name = value,
1518 #include "DynamicTags.def"
1519 #undef DYNAMIC_TAG
1520 };
1521
1522 // DT_FLAGS values.
1523 enum {
1524 DF_ORIGIN = 0x01, // The object may reference $ORIGIN.
1525 DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe.
1526 DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment.
1527 DF_BIND_NOW = 0x08, // Process all relocations on load.
1528 DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically.
1529 };
1530
1531 // State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry.
1532 enum {
1533 DF_1_NOW = 0x00000001, // Set RTLD_NOW for this object.
1534 DF_1_GLOBAL = 0x00000002, // Set RTLD_GLOBAL for this object.
1535 DF_1_GROUP = 0x00000004, // Set RTLD_GROUP for this object.
1536 DF_1_NODELETE = 0x00000008, // Set RTLD_NODELETE for this object.
1537 DF_1_LOADFLTR = 0x00000010, // Trigger filtee loading at runtime.
1538 DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object.
1539 DF_1_NOOPEN = 0x00000040, // Set RTLD_NOOPEN for this object.
1540 DF_1_ORIGIN = 0x00000080, // $ORIGIN must be handled.
1541 DF_1_DIRECT = 0x00000100, // Direct binding enabled.
1542 DF_1_TRANS = 0x00000200,
1543 DF_1_INTERPOSE = 0x00000400, // Object is used to interpose.
1544 DF_1_NODEFLIB = 0x00000800, // Ignore default lib search path.
1545 DF_1_NODUMP = 0x00001000, // Object can't be dldump'ed.
1546 DF_1_CONFALT = 0x00002000, // Configuration alternative created.
1547 DF_1_ENDFILTEE = 0x00004000, // Filtee terminates filters search.
1548 DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time.
1549 DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time.
1550 DF_1_NODIRECT = 0x00020000, // Object has no-direct binding.
1551 DF_1_IGNMULDEF = 0x00040000,
1552 DF_1_NOKSYMS = 0x00080000,
1553 DF_1_NOHDR = 0x00100000,
1554 DF_1_EDITED = 0x00200000, // Object is modified after built.
1555 DF_1_NORELOC = 0x00400000,
1556 DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers.
1557 DF_1_GLOBAUDIT = 0x01000000, // Global auditing required.
1558 DF_1_SINGLETON = 0x02000000, // Singleton symbols are used.
1559 DF_1_PIE = 0x08000000, // Object is a position-independent executable.
1560 };
1561
1562 // DT_MIPS_FLAGS values.
1563 enum {
1564 RHF_NONE = 0x00000000, // No flags.
1565 RHF_QUICKSTART = 0x00000001, // Uses shortcut pointers.
1566 RHF_NOTPOT = 0x00000002, // Hash size is not a power of two.
1567 RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH.
1568 RHF_NO_MOVE = 0x00000008, // DSO address may not be relocated.
1569 RHF_SGI_ONLY = 0x00000010, // SGI specific features.
1570 RHF_GUARANTEE_INIT = 0x00000020, // Guarantee that .init will finish
1571 // executing before any non-init
1572 // code in DSO is called.
1573 RHF_DELTA_C_PLUS_PLUS = 0x00000040, // Contains Delta C++ code.
1574 RHF_GUARANTEE_START_INIT = 0x00000080, // Guarantee that .init will start
1575 // executing before any non-init
1576 // code in DSO is called.
1577 RHF_PIXIE = 0x00000100, // Generated by pixie.
1578 RHF_DEFAULT_DELAY_LOAD = 0x00000200, // Delay-load DSO by default.
1579 RHF_REQUICKSTART = 0x00000400, // Object may be requickstarted
1580 RHF_REQUICKSTARTED = 0x00000800, // Object has been requickstarted
1581 RHF_CORD = 0x00001000, // Generated by cord.
1582 RHF_NO_UNRES_UNDEF = 0x00002000, // Object contains no unresolved
1583 // undef symbols.
1584 RHF_RLD_ORDER_SAFE = 0x00004000 // Symbol table is in a safe order.
1585 };
1586
1587 // ElfXX_VerDef structure version (GNU versioning)
1588 enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 };
1589
1590 // VerDef Flags (ElfXX_VerDef::vd_flags)
1591 enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 };
1592
1593 // Special constants for the version table. (SHT_GNU_versym/.gnu.version)
1594 enum {
1595 VER_NDX_LOCAL = 0, // Unversioned local symbol
1596 VER_NDX_GLOBAL = 1, // Unversioned global symbol
1597 VERSYM_VERSION = 0x7fff, // Version Index mask
1598 VERSYM_HIDDEN = 0x8000 // Hidden bit (non-default version)
1599 };
1600
1601 // ElfXX_VerNeed structure version (GNU versioning)
1602 enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 };
1603
1604 // SHT_NOTE section types.
1605
1606 // Generic note types.
1607 enum : unsigned {
1608 NT_VERSION = 1,
1609 NT_ARCH = 2,
1610 NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100,
1611 NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101,
1612 };
1613
1614 // Core note types.
1615 enum : unsigned {
1616 NT_PRSTATUS = 1,
1617 NT_FPREGSET = 2,
1618 NT_PRPSINFO = 3,
1619 NT_TASKSTRUCT = 4,
1620 NT_AUXV = 6,
1621 NT_PSTATUS = 10,
1622 NT_FPREGS = 12,
1623 NT_PSINFO = 13,
1624 NT_LWPSTATUS = 16,
1625 NT_LWPSINFO = 17,
1626 NT_WIN32PSTATUS = 18,
1627
1628 NT_PPC_VMX = 0x100,
1629 NT_PPC_VSX = 0x102,
1630 NT_PPC_TAR = 0x103,
1631 NT_PPC_PPR = 0x104,
1632 NT_PPC_DSCR = 0x105,
1633 NT_PPC_EBB = 0x106,
1634 NT_PPC_PMU = 0x107,
1635 NT_PPC_TM_CGPR = 0x108,
1636 NT_PPC_TM_CFPR = 0x109,
1637 NT_PPC_TM_CVMX = 0x10a,
1638 NT_PPC_TM_CVSX = 0x10b,
1639 NT_PPC_TM_SPR = 0x10c,
1640 NT_PPC_TM_CTAR = 0x10d,
1641 NT_PPC_TM_CPPR = 0x10e,
1642 NT_PPC_TM_CDSCR = 0x10f,
1643
1644 NT_386_TLS = 0x200,
1645 NT_386_IOPERM = 0x201,
1646 NT_X86_XSTATE = 0x202,
1647
1648 NT_S390_HIGH_GPRS = 0x300,
1649 NT_S390_TIMER = 0x301,
1650 NT_S390_TODCMP = 0x302,
1651 NT_S390_TODPREG = 0x303,
1652 NT_S390_CTRS = 0x304,
1653 NT_S390_PREFIX = 0x305,
1654 NT_S390_LAST_BREAK = 0x306,
1655 NT_S390_SYSTEM_CALL = 0x307,
1656 NT_S390_TDB = 0x308,
1657 NT_S390_VXRS_LOW = 0x309,
1658 NT_S390_VXRS_HIGH = 0x30a,
1659 NT_S390_GS_CB = 0x30b,
1660 NT_S390_GS_BC = 0x30c,
1661
1662 NT_ARM_VFP = 0x400,
1663 NT_ARM_TLS = 0x401,
1664 NT_ARM_HW_BREAK = 0x402,
1665 NT_ARM_HW_WATCH = 0x403,
1666 NT_ARM_SVE = 0x405,
1667 NT_ARM_PAC_MASK = 0x406,
1668 NT_ARM_TAGGED_ADDR_CTRL = 0x409,
1669 NT_ARM_SSVE = 0x40b,
1670 NT_ARM_ZA = 0x40c,
1671 NT_ARM_ZT = 0x40d,
1672
1673 NT_FILE = 0x46494c45,
1674 NT_PRXFPREG = 0x46e62b7f,
1675 NT_SIGINFO = 0x53494749,
1676 };
1677
1678 // LLVM-specific notes.
1679 enum {
1680 NT_LLVM_HWASAN_GLOBALS = 3,
1681 };
1682
1683 // GNU note types.
1684 enum {
1685 NT_GNU_ABI_TAG = 1,
1686 NT_GNU_HWCAP = 2,
1687 NT_GNU_BUILD_ID = 3,
1688 NT_GNU_GOLD_VERSION = 4,
1689 NT_GNU_PROPERTY_TYPE_0 = 5,
1690 FDO_PACKAGING_METADATA = 0xcafe1a7e,
1691 };
1692
1693 // Android note types.
1694 enum {
1695 NT_ANDROID_TYPE_IDENT = 1,
1696 NT_ANDROID_TYPE_KUSER = 3,
1697 NT_ANDROID_TYPE_MEMTAG = 4,
1698 };
1699
1700 // ARM note types.
1701 enum {
1702 NT_ARM_TYPE_PAUTH_ABI_TAG = 1,
1703 };
1704
1705 // Memory tagging values used in NT_ANDROID_TYPE_MEMTAG notes.
1706 enum {
1707 // Enumeration to determine the tagging mode. In Android-land, 'SYNC' means
1708 // running all threads in MTE Synchronous mode, and 'ASYNC' means to use the
1709 // kernels auto-upgrade feature to allow for either MTE Asynchronous,
1710 // Asymmetric, or Synchronous mode. This allows silicon vendors to specify, on
1711 // a per-cpu basis what 'ASYNC' should mean. Generally, the expectation is
1712 // "pick the most precise mode that's very fast".
1713 NT_MEMTAG_LEVEL_NONE = 0,
1714 NT_MEMTAG_LEVEL_ASYNC = 1,
1715 NT_MEMTAG_LEVEL_SYNC = 2,
1716 NT_MEMTAG_LEVEL_MASK = 3,
1717 // Bits indicating whether the loader should prepare for MTE to be enabled on
1718 // the heap and/or stack.
1719 NT_MEMTAG_HEAP = 4,
1720 NT_MEMTAG_STACK = 8,
1721 };
1722
1723 // Property types used in GNU_PROPERTY_TYPE_0 notes.
1724 enum : unsigned {
1725 GNU_PROPERTY_STACK_SIZE = 1,
1726 GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
1727 GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000,
1728 GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
1729
1730 GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000,
1731 GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1,
1732 GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2,
1733
1734 GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000,
1735 GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1,
1736 GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2,
1737 };
1738
1739 // aarch64 processor feature bits.
1740 enum : unsigned {
1741 GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0,
1742 GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1,
1743 GNU_PROPERTY_AARCH64_FEATURE_1_GCS = 1 << 2,
1744 };
1745
1746 // x86 processor feature bits.
1747 enum : unsigned {
1748 GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0,
1749 GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1,
1750
1751 GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0,
1752 GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1,
1753 GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2,
1754 GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3,
1755 GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4,
1756 GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5,
1757 GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6,
1758 GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7,
1759 GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8,
1760 GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9,
1761
1762 GNU_PROPERTY_X86_ISA_1_BASELINE = 1 << 0,
1763 GNU_PROPERTY_X86_ISA_1_V2 = 1 << 1,
1764 GNU_PROPERTY_X86_ISA_1_V3 = 1 << 2,
1765 GNU_PROPERTY_X86_ISA_1_V4 = 1 << 3,
1766 };
1767
1768 // FreeBSD note types.
1769 enum {
1770 NT_FREEBSD_ABI_TAG = 1,
1771 NT_FREEBSD_NOINIT_TAG = 2,
1772 NT_FREEBSD_ARCH_TAG = 3,
1773 NT_FREEBSD_FEATURE_CTL = 4,
1774 };
1775
1776 // NT_FREEBSD_FEATURE_CTL values (see FreeBSD's sys/sys/elf_common.h).
1777 enum {
1778 NT_FREEBSD_FCTL_ASLR_DISABLE = 0x00000001,
1779 NT_FREEBSD_FCTL_PROTMAX_DISABLE = 0x00000002,
1780 NT_FREEBSD_FCTL_STKGAP_DISABLE = 0x00000004,
1781 NT_FREEBSD_FCTL_WXNEEDED = 0x00000008,
1782 NT_FREEBSD_FCTL_LA48 = 0x00000010,
1783 NT_FREEBSD_FCTL_ASG_DISABLE = 0x00000020,
1784 };
1785
1786 // FreeBSD core note types.
1787 enum {
1788 NT_FREEBSD_THRMISC = 7,
1789 NT_FREEBSD_PROCSTAT_PROC = 8,
1790 NT_FREEBSD_PROCSTAT_FILES = 9,
1791 NT_FREEBSD_PROCSTAT_VMMAP = 10,
1792 NT_FREEBSD_PROCSTAT_GROUPS = 11,
1793 NT_FREEBSD_PROCSTAT_UMASK = 12,
1794 NT_FREEBSD_PROCSTAT_RLIMIT = 13,
1795 NT_FREEBSD_PROCSTAT_OSREL = 14,
1796 NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
1797 NT_FREEBSD_PROCSTAT_AUXV = 16,
1798 };
1799
1800 // NetBSD core note types.
1801 enum {
1802 NT_NETBSDCORE_PROCINFO = 1,
1803 NT_NETBSDCORE_AUXV = 2,
1804 NT_NETBSDCORE_LWPSTATUS = 24,
1805 };
1806
1807 // OpenBSD core note types.
1808 enum {
1809 NT_OPENBSD_PROCINFO = 10,
1810 NT_OPENBSD_AUXV = 11,
1811 NT_OPENBSD_REGS = 20,
1812 NT_OPENBSD_FPREGS = 21,
1813 NT_OPENBSD_XFPREGS = 22,
1814 NT_OPENBSD_WCOOKIE = 23,
1815 };
1816
1817 // AMDGPU-specific section indices.
1818 enum {
1819 SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON
1820 };
1821
1822 // AMD vendor specific notes. (Code Object V2)
1823 enum {
1824 NT_AMD_HSA_CODE_OBJECT_VERSION = 1,
1825 NT_AMD_HSA_HSAIL = 2,
1826 NT_AMD_HSA_ISA_VERSION = 3,
1827 // Note types with values between 4 and 9 (inclusive) are reserved.
1828 NT_AMD_HSA_METADATA = 10,
1829 NT_AMD_HSA_ISA_NAME = 11,
1830 NT_AMD_PAL_METADATA = 12
1831 };
1832
1833 // AMDGPU vendor specific notes. (Code Object V3)
1834 enum {
1835 // Note types with values between 0 and 31 (inclusive) are reserved.
1836 NT_AMDGPU_METADATA = 32
1837 };
1838
1839 // LLVMOMPOFFLOAD specific notes.
1840 enum : unsigned {
1841 NT_LLVM_OPENMP_OFFLOAD_VERSION = 1,
1842 NT_LLVM_OPENMP_OFFLOAD_PRODUCER = 2,
1843 NT_LLVM_OPENMP_OFFLOAD_PRODUCER_VERSION = 3
1844 };
1845
1846 enum {
1847 GNU_ABI_TAG_LINUX = 0,
1848 GNU_ABI_TAG_HURD = 1,
1849 GNU_ABI_TAG_SOLARIS = 2,
1850 GNU_ABI_TAG_FREEBSD = 3,
1851 GNU_ABI_TAG_NETBSD = 4,
1852 GNU_ABI_TAG_SYLLABLE = 5,
1853 GNU_ABI_TAG_NACL = 6,
1854 };
1855
1856 constexpr const char *ELF_NOTE_GNU = "GNU";
1857
1858 // Android packed relocation group flags.
1859 enum {
1860 RELOCATION_GROUPED_BY_INFO_FLAG = 1,
1861 RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG = 2,
1862 RELOCATION_GROUPED_BY_ADDEND_FLAG = 4,
1863 RELOCATION_GROUP_HAS_ADDEND_FLAG = 8,
1864 };
1865
1866 // Compressed section header for ELF32.
1867 struct Elf32_Chdr {
1868 Elf32_Word ch_type;
1869 Elf32_Word ch_size;
1870 Elf32_Word ch_addralign;
1871 };
1872
1873 // Compressed section header for ELF64.
1874 struct Elf64_Chdr {
1875 Elf64_Word ch_type;
1876 Elf64_Word ch_reserved;
1877 Elf64_Xword ch_size;
1878 Elf64_Xword ch_addralign;
1879 };
1880
1881 // Note header for ELF32.
1882 struct Elf32_Nhdr {
1883 Elf32_Word n_namesz;
1884 Elf32_Word n_descsz;
1885 Elf32_Word n_type;
1886 };
1887
1888 // Note header for ELF64.
1889 struct Elf64_Nhdr {
1890 Elf64_Word n_namesz;
1891 Elf64_Word n_descsz;
1892 Elf64_Word n_type;
1893 };
1894
1895 // Legal values for ch_type field of compressed section header.
1896 enum {
1897 ELFCOMPRESS_ZLIB = 1, // ZLIB/DEFLATE algorithm.
1898 ELFCOMPRESS_ZSTD = 2, // Zstandard algorithm
1899 ELFCOMPRESS_LOOS = 0x60000000, // Start of OS-specific.
1900 ELFCOMPRESS_HIOS = 0x6fffffff, // End of OS-specific.
1901 ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific.
1902 ELFCOMPRESS_HIPROC = 0x7fffffff // End of processor-specific.
1903 };
1904
1905 /// Convert an architecture name into ELF's e_machine value.
1906 uint16_t convertArchNameToEMachine(StringRef Arch);
1907
1908 /// Convert an ELF's e_machine value into an architecture name.
1909 StringRef convertEMachineToArchName(uint16_t EMachine);
1910
1911 } // end namespace ELF
1912 } // end namespace llvm
1913
1914 #endif // LLVM_BINARYFORMAT_ELF_H
1915