Home
last modified time | relevance | path

Searched refs:FCVT_WU_RV64 (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h112 FCVT_WU_RV64, enumerator
H A DRISCVInstrInfoF.td48 : SDNode<"RISCVISD::FCVT_WU_RV64", SDT_RISCVFCVT_W_RV64>;
H A DRISCVISelLowering.cpp2757 Opc = IsSigned ? RISCVISD::FCVT_W_RV64 : RISCVISD::FCVT_WU_RV64; in lowerFP_TO_INT_SAT()
2767 if (Opc == RISCVISD::FCVT_WU_RV64) in lowerFP_TO_INT_SAT()
11429 unsigned Opc = IsSigned ? RISCVISD::FCVT_W_RV64 : RISCVISD::FCVT_WU_RV64; in ReplaceNodeResults()
13930 Opc = IsSigned ? RISCVISD::FCVT_W_RV64 : RISCVISD::FCVT_WU_RV64; in performFP_TO_INTCombine()
13983 Opc = IsSigned ? RISCVISD::FCVT_W_RV64 : RISCVISD::FCVT_WU_RV64; in performFP_TO_INT_SATCombine()
13996 if (Opc == RISCVISD::FCVT_WU_RV64) in performFP_TO_INT_SATCombine()
16448 case RISCVISD::FCVT_WU_RV64: in ComputeNumSignBitsForTargetNode()
18834 NODE_NAME_CASE(FCVT_WU_RV64) in getTargetNodeName()