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Searched refs:GICR_ICENABLER0 (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/arm64/arm64/
H A Dgic_v3_reg.h255 #define GICR_ICENABLER0 (0x0180) macro
H A Dgic_v3.c1493 gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICR_ICENABLER0, in gic_v3_redist_init()
/freebsd/sys/arm64/vmm/io/
H A Dvgic_v3.c397 VGIC_REGISTER(GICR_ICENABLER0, 4, VGIC_32_BIT, redist_ienabler0_read,