/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 233 (STLRX GPR64:$val, GPR64sp:$ptr)>; 241 (STRXroX GPR64:$val, GPR64sp:$Rn, GPR64:$Rm, ro_Xextend64:$extend)>; 398 def : Pat<(stxr_1 GPR64:$val, GPR64sp:$addr), 400 def : Pat<(stxr_2 GPR64:$val, GPR64sp:$addr), 402 def : Pat<(stxr_4 GPR64:$val, GPR64sp:$addr), 404 def : Pat<(stxr_8 GPR64:$val, GPR64sp:$addr), 405 (STXRX GPR64:$val, GPR64sp:$addr)>; 452 def : Pat<(stlxr_1 GPR64:$val, GPR64sp:$addr), 509 (ins GPR64:$addr, GPR64:$desired, GPR64:$new), []>, 517 (ins GPR64:$addr, GPR64:$desiredLo, GPR64:$desiredHi, [all …]
|
H A D | AArch64InstrInfo.td | 2035 def : Pat<(sub GPR64:$Rn, GPR64:$Rm), 2098 def : Pat<(int_aarch64_udiv GPR64:$Rn, GPR64:$Rm), (UDIVXr GPR64:$Rn, GPR64:$Rm)>; 2100 def : Pat<(int_aarch64_sdiv GPR64:$Rn, GPR64:$Rm), (SDIVXr GPR64:$Rn, GPR64:$Rm)>; 2200 def : Pat<(i64 (add (smullwithsignbits GPR64:$Rn, GPR64:$Rm), GPR64:$Ra)), 2210 def : Pat<(i64 (sub GPR64:$Ra, (smullwithsignbits GPR64:$Rn, GPR64:$Rm))), 2554 (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift)>; 2753 (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc)>; 9220 def : Pat<(i64x8 (LS64_BUILD GPR64:$x0, GPR64:$x1, GPR64:$x2, GPR64:$x3, 9221 GPR64:$x4, GPR64:$x5, GPR64:$x6, GPR64:$x7)), 9239 …: Pat<(intrinsic GPR64sp:$addr, GPR64:$x0, GPR64:$x1, GPR64:$x2, GPR64:$x3, GPR64:$x4, GPR64:$x5, … [all …]
|
H A D | AArch64InstrGISel.td | 349 def : Pat<(atomic_cmp_swap_8 GPR64:$addr, GPR32:$desired, GPR32:$new), 350 (CMP_SWAP_8 GPR64:$addr, GPR32:$desired, GPR32:$new)>; 353 (CMP_SWAP_16 GPR64:$addr, GPR32:$desired, GPR32:$new)>; 356 (CMP_SWAP_32 GPR64:$addr, GPR32:$desired, GPR32:$new)>; 358 def : Pat<(atomic_cmp_swap_64 GPR64:$addr, GPR64:$desired, GPR64:$new), 359 (CMP_SWAP_64 GPR64:$addr, GPR64:$desired, GPR64:$new)>; 362 def : Pat<(int_aarch64_stlxp GPR64:$lo, GPR64:$hi, GPR64:$addr), 363 (STLXPX GPR64:$lo, GPR64:$hi, GPR64:$addr)>; 364 def : Pat<(int_aarch64_stxp GPR64:$lo, GPR64:$hi, GPR64:$addr), 365 (STXPX GPR64:$lo, GPR64:$hi, GPR64:$addr)>; [all …]
|
H A D | AArch64SVEInstrInfo.td | 1622 (RegRegInst sve_prfop:$prfop, PPR_3b:$gp, GPR64:$base, GPR64:$index)>; 2131 GPR64:$Op1))>; 2465 def : Pat<(vt1 (op PPR:$gp, (AddrCP GPR64:$base, GPR64:$idx))), 2689 (RegRegInst PPR:$gp, GPR64:$base, GPR64:$offset)>; 2735 … def _reg_reg : Pat<(Store (Ty ZPR:$vec), (AddrCP GPR64:$base, GPR64:$offset), (PredTy PPR:$gp)), 2736 (RegRegInst ZPR:$vec, PPR:$gp, GPR64:$base, GPR64:$offset)>; 2910 def : Pat<(Ty (Load (PredTy PPR:$gp), (AddrCP GPR64:$base, GPR64:$offset), MemVT)), 2998 def : Pat<(Ty (Load (PredTy PPR:$gp), (AddrCP GPR64:$base, GPR64:$offset), MemVT)), 3042 def : Pat<(Store (Ty ZPR:$vec), (AddrCP GPR64:$base, GPR64:$offset), (PredTy PPR:$gp), MemVT), 3142 def : Pat<(nxv2i64 (vector_insert (nxv2i64 ZPR:$vec), GPR64:$src, GPR64:$index)), [all …]
|
H A D | AArch64InstrFormats.td | 2335 [(set GPR64:$dst, (op GPR64:$Rd, opcode, (i64 0)))]>, 2347 : I<(outs GPR64:$Rd), (ins GPR64:$Rn, GPR64sp:$Rm), 2349 [(set GPR64:$Rd, (OpNode GPR64:$Rn, GPR64sp:$Rm))]>, 2633 [(set GPR64:$Rd, (AccNode GPR64:$Ra, 2640 : I<(outs GPR64:$Rd), (ins GPR64:$Rn, GPR64:$Rm), 2642 [(set GPR64:$Rd, (OpNode GPR64:$Rn, GPR64:$Rm))]>, 2664 (inst GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR)>; 2967 GPR64, GPR64, GPR64, 0>; 3064 XZR, GPR64:$src1, GPR64:$src2, 0), 5>; 3074 GPR64, GPR64, GPR64, 0>; [all …]
|
H A D | AArch64RegisterInfo.td | 151 // GPR64/GPR64sp for use by the coalescer. 167 let AltOrders = [(rotl GPR64, 8)]; 195 // GPR32/GPR64 but with zero-register substitution enabled. 196 // TODO: Roll this out to GPR32/GPR64/GPR32all/GPR64all. 200 def GPR64z : RegisterOperand<GPR64> { 238 def GPR64pi1 : RegisterOperand<GPR64, "printPostIncOperand<1>">; 239 def GPR64pi2 : RegisterOperand<GPR64, "printPostIncOperand<2>">; 240 def GPR64pi3 : RegisterOperand<GPR64, "printPostIncOperand<3>">; 241 def GPR64pi4 : RegisterOperand<GPR64, "printPostIncOperand<4>">; 242 def GPR64pi6 : RegisterOperand<GPR64, "printPostIncOperand<6>">; [all …]
|
H A D | SVEInstrFormats.td | 930 def : Pat<(i64 (op GPR64:$Rn, (nxv8i1 PPRAny:$Pg))), 932 def : Pat<(i64 (op GPR64:$Rn, (nxv4i1 PPRAny:$Pg))), 934 def : Pat<(i64 (op GPR64:$Rn, (nxv2i1 PPRAny:$Pg))), 1037 : I<(outs GPR64:$Rd), (ins PPRAny:$Pg, pprty:$Pn), 1152 : I<(outs GPR64:$Rdn), (ins GPR64:$_Rdn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4), 2868 : I<(outs GPR64:$Rd), (ins simm6_32b:$imm6), 5405 : I<(outs pprty:$Pd), (ins GPR64:$Rn, GPR64:$Rm), 5838 (!cast<Instruction>(NAME # "_D") GPR64:$Rn, GPR64:$Rm)>; 9677 : I<(outs GPR64:$Rd), 9713 : I<(outs pnrty:$PNd), (ins GPR64:$Rn, GPR64:$Rm, sve_vec_len_specifier_enum:$vl), [all …]
|
H A D | AArch64SMEInstrInfo.td | 154 (ins GPR64:$tpidr2_el0, GPR64sp:$tpidr2obj, i64imm:$restore_routine, variable_ops), []>, 158 (i64 GPR64:$tpidr2_el0), (i64 GPR64sp:$tpidr2obj), (i64 texternalsym:$restore_routine)), 159 (RestoreZAPseudo GPR64:$tpidr2_el0, GPR64sp:$tpidr2obj, texternalsym:$restore_routine)>; 191 (MSR 0xde85, GPR64:$val)>; 233 …(ins svcr_op:$pstatefield, timm0_1:$imm, GPR64:$rtpstate, timm0_1:$expected_pstate, variable_ops),… 238 def : Pat<(AArch64_smstart (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_pst… 239 (MSRpstatePseudo svcr_op:$pstate, 0b1, GPR64:$rtpstate, timm0_1:$expected_pstate)>; 240 def : Pat<(AArch64_smstop (i32 svcr_op:$pstate), (i64 GPR64:$rtpstate), (i64 timm0_1:$expected_psta… 241 (MSRpstatePseudo svcr_op:$pstate, 0b0, GPR64:$rtpstate, timm0_1:$expected_pstate)>;
|
H A D | SMEInstrFormats.td | 538 def : Pat<(Load PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), 547 i32imm:$imm, PPR3bAny:$pg, GPR64sp:$base, GPR64:$offset), []>, 685 def : Pat<(Store PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset), 3174 : I<(outs GPR64:$Rt), (ins ZTR:$ZTt, uimm3s8:$imm3), 3186 : I<(outs ZTR:$ZTt), (ins uimm3s8:$imm3, GPR64:$Rt),
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips64InstrInfo.td | 420 def SLL64_64 : FR<0x0, 0x00, (outs GPR64:$rd), (ins GPR64:$rt), 821 def : MipsPat<(shl GPR64:$rt, (i32 (trunc GPR64:$rs))), 822 (DSLLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>, 824 def : MipsPat<(srl GPR64:$rt, (i32 (trunc GPR64:$rs))), 825 (DSRLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>, 827 def : MipsPat<(sra GPR64:$rt, (i32 (trunc GPR64:$rs))), 828 (DSRAV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>, 830 def : MipsPat<(rotr GPR64:$rt, (i32 (trunc GPR64:$rs))), 860 def : MipsPat<(subc GPR64:$lhs, GPR64:$rhs), 861 (DSUBu GPR64:$lhs, GPR64:$rhs)>, ISA_MIPS3, GPR_64; [all …]
|
H A D | MipsCondMov.td | 208 defm : MovzPats0<GPR64, GPR64, MOVZ_I_I64, SLT64, SLTu64, SLTi64, SLTiu64>, 210 defm : MovzPats1<GPR32, GPR64, MOVZ_I_I64, XOR>, 212 defm : MovzPats1<GPR64, GPR32, MOVZ_I64_I, XOR64>, 214 defm : MovzPats1<GPR64, GPR64, MOVZ_I64_I64, XOR64>, 216 defm : MovzPats2<GPR32, GPR64, MOVZ_I_I64, XORi>, 218 defm : MovzPats2<GPR64, GPR32, MOVZ_I64_I, XORi64>, 220 defm : MovzPats2<GPR64, GPR64, MOVZ_I64_I64, XORi64>, 229 defm : MovnPats<GPR64, GPR64, MOVN_I64_I64, XOR64>, 239 defm : MovzPats1<GPR64, FGR32, MOVZ_I64_S, XOR64>, 257 defm : MovzPats1<GPR64, FGR64, MOVZ_I64_D64, XOR64>, [all …]
|
H A D | MipsRegisterInfo.td | 354 def GPR64 : RegisterClass<"Mips", [i64], 64, (add 648 def GPR64Opnd : RegisterOperand<GPR64> {
|
H A D | MipsInstrInfo.td | 2334 def MIPSeh_return64 : MipsPseudo<(outs), (ins GPR64:$spoff, GPR64:$dst), 2335 [(MIPSehret GPR64:$spoff, GPR64:$dst)]>;
|
H A D | MipsMSAInstrInfo.td | 3930 GPR64), [HasMSA, IsGP64bit]>; 3951 GPR64), [HasMSA, IsGP64bit]>; 3999 GPR64), [HasMSA, IsGP64bit]>; 4036 GPR64),
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/X86/ |
H A D | ABIX86.cpp | 168 #define GPR64(n) \ macro 200 GPR64(8), GPR64(9), GPR64(10), GPR64(11), in makeBaseRegMap() 201 GPR64(12), GPR64(13), GPR64(14), GPR64(15), in makeBaseRegMap()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.td | 67 class GPR64<bits<16> num, string n, GPR32 low, GPR32 high> 75 class GPR128<bits<16> num, string n, GPR64 low, GPR64 high> 86 def R#I#D : GPR64<I, "r"#I, !cast<GPR32>("R"#I#"L"), !cast<GPR32>("R"#I#"H")>, 91 def R#I#Q : GPR128<I, "r"#I, !cast<GPR64>("R"#!add(I, 1)#"D"), 92 !cast<GPR64>("R"#I#"D")>;
|
H A D | SystemZFrameLowering.cpp | 314 unsigned GPR64, bool IsImplicit) { in addSavedGPR() argument 317 Register GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32); in addSavedGPR() 318 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32); in addSavedGPR() 320 MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive)); in addSavedGPR() 322 MBB.addLiveIn(GPR64); in addSavedGPR()
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterContextFreeBSD_powerpc.cpp | 55 } GPR64; typedef 221 return sizeof(GPR64); in GetGPRSize()
|
H A D | RegisterInfos_powerpc.h | 188 #define GPR GPR64 200 #define GPR GPR64
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallingConv.td | 131 // __mmask64 (v64i1) --> GPR64 (for x64) or 2 x GPR32 (for IA32) 210 // __mmask64 (v64i1) --> GPR64 (for x64) or 2 x GPR32 (for IA32)
|