| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEInfo.cpp | 142 assert(InstrMapping.count(UMI->MI) == 0 && in insertNode()
144 InstrMapping[UMI->MI] = MaybeNewNode; in insertNode()
191 auto *UMI = InstrMapping.lookup(MI); in handleRecordedInst()
196 InstrMapping.erase(MI); in handleRecordedInst()
212 if (auto *UMI = InstrMapping.lookup(MI)) { in handleRemoveInst()
214 InstrMapping.erase(MI); in handleRemoveInst()
259 InstrMapping.clear(); in releaseMemory()
284 for (auto &It : InstrMapping) { in verify()
300 if (!InstrMapping.count(UMI.MI)) in verify()
305 if (InstrMapping[UMI.MI] != &UMI) in verify()
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| H A D | RegBankSelect.cpp | 443 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in computeMapping() argument
448 if (!InstrMapping.isValid()) in computeMapping()
454 bool Saturated = Cost.addLocalCost(InstrMapping.getCost()); in computeMapping()
457 LLVM_DEBUG(dbgs() << "With: " << InstrMapping << '\n'); in computeMapping()
469 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping()
483 InstrMapping.getOperandMapping(OpIdx); in computeMapping()
588 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in applyMapping() argument
591 RegisterBankInfo::OperandsMapper OpdMapper(MI, InstrMapping, *MRI); in applyMapping()
603 InstrMapping.getOperandMapping(OpIdx); in applyMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | Hexagon.td | 192 def getPredOpcode : InstrMapping {
208 def getFalsePredOpcode : InstrMapping {
220 def getTruePredOpcode : InstrMapping {
232 def getPredNewOpcode : InstrMapping {
244 def getPredOldOpcode : InstrMapping {
256 def getNewValueOpcode : InstrMapping {
268 def getNonNVStore : InstrMapping {
294 def changeAddrMode_io_rr: InstrMapping {
302 def changeAddrMode_rr_io: InstrMapping {
342 def getRegForm : InstrMapping {
[all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 297 const InstructionMapping &InstrMapping; variable
324 OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
333 const InstructionMapping &getInstrMapping() const { return InstrMapping; } in getInstrMapping()
779 const RegisterBankInfo::InstructionMapping &InstrMapping) {
780 InstrMapping.print(OS);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 401 auto &InstrMapping = MapOfInstructionMappings[Hash]; in getInstructionMappingImpl() local
402 InstrMapping = std::make_unique<InstructionMapping>( in getInstructionMappingImpl()
404 return *InstrMapping; in getInstructionMappingImpl()
666 MachineInstr &MI, const InstructionMapping &InstrMapping, in OperandsMapper() argument
668 : MRI(MRI), MI(MI), InstrMapping(InstrMapping) { in OperandsMapper()
669 unsigned NumOpds = InstrMapping.getNumOperands(); in OperandsMapper()
671 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.h | 594 const RegisterBankInfo::InstructionMapping &InstrMapping,
615 const RegisterBankInfo::InstructionMapping &InstrMapping,
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| H A D | CSEInfo.h | 82 DenseMap<const MachineInstr *, UniqueMachineInstr *> InstrMapping; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 2665 def getVOPe64 : InstrMapping {
2674 def getVOPe32 : InstrMapping {
2683 def getSDWAOp : InstrMapping {
2701 def getDPPOp32 : InstrMapping {
2709 def getDPPOp64 : InstrMapping {
2718 def getCommuteOrig : InstrMapping {
2727 def getCommuteRev : InstrMapping {
2735 def getMCOpcodeGen : InstrMapping {
2760 def getSOPKOp : InstrMapping {
2768 def getAddr64Inst : InstrMapping {
[all …]
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| H A D | R600Instructions.td | 1783 def getLDSNoRetOp : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 228 def getStackOpcode : InstrMapping {
241 def getRegisterOpcode : InstrMapping {
254 def getWasm64Opcode : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPC.td | 490 def getRecordFormOpcode : InstrMapping {
503 def getNonRecordFormOpcode : InstrMapping {
516 def getAltVSXFMAOpcode : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDSPInstrFormats.td | 11 def Dsp2MicroMips : InstrMapping {
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| H A D | MipsInstrFormats.td | 40 def Std2MicroMips : InstrMapping {
54 def Std2MicroMipsR6 : InstrMapping {
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| H A D | Mips32r6InstrFormats.td | 15 def MipsR62MicroMipsR6 : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | Target.td | 1772 // InstrMapping - This class is used to create mapping tables to relate
1776 class InstrMapping {
1778 // define the relationship modeled by this InstrMapping record.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.td | 261 def splsIdempotent : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 1022 def getPostIncOpcode : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFormats.td | 121 def getDisp12Opcode : InstrMapping {
130 def getDisp20Opcode : InstrMapping {
140 def getMemOpcode : InstrMapping {
149 def getTargetMemOpcode : InstrMapping {
158 def getTwoOperandOpcode : InstrMapping {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 662 def getSVEPseudoMap : InstrMapping {
676 def getSVERevInstr : InstrMapping {
685 def getSVENonRevInstr : InstrMapping {
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| H A D | SMEInstrFormats.td | 47 def getSMEPseudoMap : InstrMapping {
|