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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Daspeed-lpc.txt16 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
18 APB-to-LPC bridging amonst other functions.
21 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
46 LPC memory region.
72 LPC Host Interface Controller
76 LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
98 be exposed over the LPC to AHB mapping
110 LPC Host Controller
113 The Aspeed LPC Host Controller configures the Low Pin Count (LPC) bus behaviour
116 the LPC host controller node.
[all …]
H A Daspeed-lpc.yaml8 title: Aspeed Low Pin Count (LPC) Bus Controller
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
21 The LPC controller is represented as a multi-function device to account for the
26 * An LPC Host Interface Controller manages functions exposed to the host such
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
34 Additionally the state of the LPC controller influences the pinmux
66 LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART management
127 bytes written by the Host to the targeted LPC I/O pots.
145 description: The LPC I/O ports to snoop
[all …]
H A Dcros-ec.txt6 The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the
36 Required properties (LPC):
76 Example for LPC is not supplied as it is not yet implemented.
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dst,stih407-lpc1 STMicroelectronics Low Power Controller (LPC) - Clocksource
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Drtc-st-lpc.txt1 STMicroelectronics Low Power Controller (LPC) - RTC
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dst_lpc_wdt.txt1 STMicroelectronics Low Power Controller (LPC) - Watchdog
4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/
H A Dhisilicon-low-pin-count.txt2 Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
6 LPC device node.
14 - reg: base memory range where the LPC register set is mapped.
H A Dlow-pin-count.yaml13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
17 LPC device node.
/freebsd/sys/contrib/device-tree/Bindings/ipmi/
H A Daspeed,ast2400-kcs-bmc.yaml14 interfaces on the LPC bus for in-band IPMI communication with their host.
48 The host CPU LPC IO data and status addresses for the device. For most
57 A 2-cell property expressing the LPC SerIRQ number and the interrupt
67 description: The LPC channel number in the controller
H A Daspeed-kcs-bmc.txt13 - kcs_chan : The LPC channel number in the controller
23 - aspeed,lpc-io-reg : The host CPU LPC IO address for the device
/freebsd/share/doc/smm/07.lpd/
H A Dspell.ok8 LPC
/freebsd/sys/contrib/device-tree/Bindings/security/tpm/
H A Dtpm_tis_mmio.txt5 this interface will be implemented over Intel's LPC bus.
/freebsd/sys/contrib/device-tree/Bindings/tpm/
H A Dtcg,tpm-tis-mmio.yaml15 one of them being LPC (via MMIO). The standard is named:
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Daspeed,ast2600-pinctrl.yaml38 I3C6, JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ,
63 LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, MACLINK3,
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A D8250.yaml202 configured. One possible data source is the LPC/eSPI mode bit. Only
210 The VUART LPC address. Only applicable to aspeed,ast2500-vuart.
/freebsd/share/misc/
H A Dpci_vendors43 7a0c LPC Controller
4986 13e8 Ariel LPC Bridge
5527 7468 AMD-8111 LPC
5582 780e FCH LPC Bridge
5617 790e FCH LPC Bridge
10448 0260 MCP51 LPC Bridge
10454 0261 MCP51 LPC Bridge
10456 0262 MCP51 LPC Bridge
15550 0225 CSB5 LPC bridge
15553 0230 CSB5 LPC bridge
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dlpc1850-ccu.txt36 specific LPC part. Check the user manual for your specific part.
H A Dlpc1850-cgu.txt42 specific LPC part. Base clocks are numbered from 0 to 27.
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-g6-pinctrl.dtsi346 function = "LPC";
347 groups = "LPC";
H A Daspeed-bmc-ibm-bonnell.dts52 /* LPC FW cycle bridge region requires natural alignment */
H A Daspeed-bmc-opp-tacoma.dts867 /* Hog these as no driver is probed for the entire LPC block */
H A Daspeed-bmc-ibm-rainier.dts58 /* LPC FW cycle bridge region requires natural alignment */
H A Daspeed-bmc-ibm-everest.dts198 /* LPC FW cycle bridge region requires natural alignment */
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-dlink-dns-313.dts212 * Used by fan & G751, conflicts LPC,
H A Dgemini-dlink-dir-685.dts43 /* Collides with LPC LFRAME, UART RTS, SSP TXD */

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