/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEAsmPrinter.cpp | 99 MCOperand czero = MCOperand::createImm(0); in emitBSIC() 110 MCOperand CZero = MCOperand::createImm(0); in emitLEAzzi() 122 MCOperand CZero = MCOperand::createImm(0); in emitLEASLzzi() 134 MCOperand CZero = MCOperand::createImm(0); in emitLEAzii() 142 MCOperand &RS2, MCOperand &Imm, MCOperand &RD, in emitLEASLrri() 177 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo() 212 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETGOTAndEmitMCInsts() 216 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts() 260 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETFunPLTAndEmitMCInsts() 308 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETTLSAddrAndEmitMCInsts() [all …]
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H A D | VEMCInstLower.cpp | 28 static MCOperand LowerSymbolOperand(const MachineInstr *MI, in LowerSymbolOperand() 40 return MCOperand::createExpr(Expr); in LowerSymbolOperand() 43 static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO, in LowerOperand() 52 return MCOperand::createReg(MO.getReg()); in LowerOperand() 65 return MCOperand::createImm(MO.getImm()); in LowerOperand() 74 return MCOperand(); in LowerOperand() 82 MCOperand MCOp = LowerOperand(MI, MO, AP); in LowerVEMachineInstrToMCInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 563 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF() 569 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF() 584 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6() 598 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI() 637 MI.addOperand(MCOperand::createImm(Imm)); in DecodeAddiGroupBranch() 671 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP35GroupBranchMMR6() 710 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDaddiGroupBranch() 744 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP37GroupBranchMMR6() 783 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP65GroupBranchMMR6() 822 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP75GroupBranchMMR6() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInst.h | 36 class MCOperand { 58 MCOperand() : FPImmVal(0) {} in MCOperand() function 134 static MCOperand createReg(unsigned Reg) { in createReg() 135 MCOperand Op; in createReg() 141 static MCOperand createImm(int64_t Val) { in createImm() 142 MCOperand Op; in createImm() 149 MCOperand Op; in createSFPImm() 156 MCOperand Op; in createDFPImm() 163 MCOperand Op; in createExpr() 170 MCOperand Op; in createInst() [all …]
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H A D | MCInstBuilder.h | 32 Inst.addOperand(MCOperand::createReg(Reg)); in addReg() 38 Inst.addOperand(MCOperand::createImm(Val)); in addImm() 44 Inst.addOperand(MCOperand::createSFPImm(Val)); in addSFPImm() 50 Inst.addOperand(MCOperand::createDFPImm(Val)); in addDFPImm() 56 Inst.addOperand(MCOperand::createExpr(Val)); in addExpr() 62 Inst.addOperand(MCOperand::createInst(Val)); in addInst() 67 MCInstBuilder &addOperand(const MCOperand &Op) { in addOperand()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 125 MCOperand &Imm, MCOperand &RD, in EmitSETHI() 136 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary() 148 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR() 154 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD() 160 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL() 169 MCOperand &RD, in EmitHiLo() 189 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in LowerGETPCXAndEmitMCInsts() 206 MCOperand imm = MCOperand::createExpr(MCConstantExpr::create(12, in LowerGETPCXAndEmitMCInsts() 218 MCOperand imm = MCOperand::createExpr(MCConstantExpr::create(32, in LowerGETPCXAndEmitMCInsts() 222 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts() [all …]
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H A D | SparcMCInstLower.cpp | 29 static MCOperand LowerSymbolOperand(const MachineInstr *MI, in LowerSymbolOperand() 64 return MCOperand::createExpr(expr); in LowerSymbolOperand() 67 static MCOperand LowerOperand(const MachineInstr *MI, in LowerOperand() 75 return MCOperand::createReg(MO.getReg()); in LowerOperand() 78 return MCOperand::createImm(MO.getImm()); in LowerOperand() 90 return MCOperand(); in LowerOperand() 101 MCOperand MCOp = LowerOperand(MI, MO, AP); in LowerSparcMachineInstrToMCInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.h | 30 class MCOperand; variable 115 MCOperand createRegOperand(unsigned int RegId) const; 229 static MCOperand decodeIntImmed(unsigned Imm); 233 MCOperand decodeLiteralConstant(bool ExtendFP64) const; 244 MCOperand decodeSpecialReg32(unsigned Val) const; 245 MCOperand decodeSpecialReg64(unsigned Val) const; 249 MCOperand decodeSDWASrc16(unsigned Val) const; 250 MCOperand decodeSDWASrc32(unsigned Val) const; 251 MCOperand decodeSDWAVopcDst(unsigned Val) const; 253 MCOperand decodeBoolReg(unsigned Val) const; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
H A D | AVRDisassembler.cpp | 77 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR8RegisterClass() 88 Inst.addOperand(MCOperand::createReg(Register)); in DecodeLD8RegisterClass() 148 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr() 164 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA() 172 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT() 173 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT() 243 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK() 293 Inst.addOperand(MCOperand::createImm(Offset)); in decodeFBRk() 320 Inst.addOperand(MCOperand::createImm(Offset)); in decodeCondBranch() 325 Inst.addOperand(MCOperand::createImm(Offset)); in decodeCondBranch() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 254 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() 278 MCOperand Reg = Inst.getOperand(0); in HexagonProcessInstruction() 279 MCOperand S16 = Inst.getOperand(1); in HexagonProcessInstruction() 365 MCOperand &Ps = Inst.getOperand(1); in HexagonProcessInstruction() 375 MCOperand &Rt = Inst.getOperand(3); in HexagonProcessInstruction() 386 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() 398 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() 410 MCOperand &Rs = Inst.getOperand(1); in HexagonProcessInstruction() 489 MCOperand &MO = Inst.getOperand(2); in HexagonProcessInstruction() 595 MCOperand &Rt = Inst.getOperand(1); in HexagonProcessInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
H A D | XtensaDisassembler.cpp | 74 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeARRegisterClass() 89 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeSRRegisterClass() 145 Inst.addOperand(MCOperand::createImm( in decodeL32ROperand() 175 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm4Operand() 182 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm5Operand() 189 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeImm1_16Operand() 197 Inst.addOperand(MCOperand::createImm(32 - Imm)); in decodeShimm1_31Operand() 207 Inst.addOperand(MCOperand::createImm(TableB4const[Imm])); in decodeB4constOperand() 218 Inst.addOperand(MCOperand::createImm(TableB4constu[Imm])); in decodeB4constuOperand() 226 Inst.addOperand(MCOperand::createImm((Imm >> 4) & 0xff)); in decodeMem8Operand() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
H A D | CSKYDisassembler.cpp | 231 Inst.addOperand(MCOperand::createImm(Imm << S)); in decodeUImmOperand() 240 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeOImmOperand() 251 Inst.addOperand(MCOperand::createImm(V << 2)); in decodeLRW16Imm8() 263 Inst.addOperand(MCOperand::createImm(16)); in decodeJMPIXImmOperand() 265 Inst.addOperand(MCOperand::createImm(24)); in decodeJMPIXImmOperand() 267 Inst.addOperand(MCOperand::createImm(32)); in decodeJMPIXImmOperand() 269 Inst.addOperand(MCOperand::createImm(40)); in decodeJMPIXImmOperand() 364 Inst.addOperand(MCOperand::createImm(Log2_64(Imm))); in decodeImmShiftOpValue() 393 MI.insert(MI.begin(), MCOperand::createReg(CSKY::R14)); in handleCROperand() 455 MI.insert(MI.begin(), MCOperand::createReg(CSKY::C)); in handleCROperand() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 830 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction() 874 TmpInst.addOperand(MCOperand::createImm(L)); in ProcessInstruction() 904 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 962 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 963 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 992 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 1007 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() 1020 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() 1032 TmpInst.addOperand(MCOperand::createImm(N)); in ProcessInstruction() 1033 TmpInst.addOperand(MCOperand::createImm(0)); in ProcessInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 319 const MCOperand &MO = MI.getOperand(Op); in getModImmOpValue() 338 const MCOperand &MO = MI.getOperand(Op); in getT2SOImmOpValue() 651 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLTargetOpValue() 664 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBLXTargetOpValue() 676 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBRTargetOpValue() 688 const MCOperand MO = MI.getOperand(OpIdx); in getThumbBCCTargetOpValue() 700 const MCOperand MO = MI.getOperand(OpIdx); in getThumbCBTargetOpValue() 743 const MCOperand MO = MI.getOperand(OpIdx); in getARMBranchTargetOpValue() 1722 const MCOperand &MO = MI.getOperand(Op); in getBitfieldInvertedMaskOpValue() 1762 [&](const MCOperand &LHS, const MCOperand &RHS) { in getRegisterListOpValue() [all …]
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H A D | ARMInstPrinter.cpp | 97 const MCOperand &Dst = MI->getOperand(0); in printInst() 98 const MCOperand &MO1 = MI->getOperand(1); in printInst() 99 const MCOperand &MO2 = MI->getOperand(2); in printInst() 100 const MCOperand &MO3 = MI->getOperand(3); in printInst() 120 const MCOperand &Dst = MI->getOperand(0); in printInst() 121 const MCOperand &MO1 = MI->getOperand(1); in printInst() 122 const MCOperand &MO2 = MI->getOperand(2); in printInst() 265 MCOperand NewReg; in printInst() 434 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp() 824 [&](const MCOperand &LHS, const MCOperand &RHS) { in printRegisterList() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 537 for (MCOperand &I : MCI) in canonicalizeImmediates() 1231 static MCInst makeCombineInst(int opCode, MCOperand &Rdd, MCOperand &MO1, in makeCombineInst() 1342 MCOperand Reg = Inst.getOperand(0); in processInstruction() 1343 MCOperand S27 = Inst.getOperand(1); in processInstruction() 1362 MCOperand &Ry = Inst.getOperand(0); in processInstruction() 1370 MCOperand &MO = Inst.getOperand(2); in processInstruction() 1380 MCOperand &MO = Inst.getOperand(2); in processInstruction() 1559 MCOperand imm(MCOperand::createExpr( in processInstruction() 1574 MCOperand imm(MCOperand::createExpr(HexagonMCExpr::create( in processInstruction() 1580 MCOperand imm2(MCOperand::createExpr(Expr)); // lower 32 in processInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVMCInstLower.cpp | 29 MCOperand MCOp; in lower() 36 MCOp = MCOperand::createReg(FuncReg); in lower() 40 MCOp = MCOperand::createReg(MAI->getOrCreateMBBRegister(*MO.getMBB())); in lower() 44 MCOp = MCOperand::createReg(NewReg.isValid() ? NewReg : MO.getReg()); in lower() 50 MCOp = MCOperand::createReg(Reg); in lower() 52 MCOp = MCOperand::createImm(MO.getImm()); in lower() 56 MCOp = MCOperand::createDFPImm( in lower()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreMCInstLower.cpp | 31 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand() 67 return MCOperand::createExpr(MCSym); in LowerSymbolOperand() 74 return MCOperand::createExpr(Add); in LowerSymbolOperand() 77 MCOperand XCoreMCInstLower::LowerOperand(const MachineOperand &MO, in LowerOperand() 86 return MCOperand::createReg(MO.getReg()); in LowerOperand() 88 return MCOperand::createImm(MO.getImm() + offset); in LowerOperand() 100 return MCOperand(); in LowerOperand() 107 MCOperand MCOp = LowerOperand(MO); in Lower()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 934 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister() 944 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMSRSystemRegister() 967 Inst.addOperand(MCOperand::createImm(1)); in DecodeFMOVLaneInstruction() 1140 Inst.addOperand(MCOperand::createImm(imm)); in DecodeMoveImmInstruction() 1736 Inst.addOperand(MCOperand::createImm(imm)); in DecodeLogicalImmInstruction() 1753 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmInstruction() 1791 Inst.addOperand(MCOperand::createImm(imm)); in DecodeModImmTiedInstruction() 1883 Inst.addOperand(MCOperand::createImm(imm)); in DecodeSystemPStateImm0_15Instruction() 1905 Inst.addOperand(MCOperand::createImm(imm)); in DecodeSystemPStateImm0_1Instruction() 1930 Inst.addOperand(MCOperand::createImm(bit)); in DecodeTestAndBranch() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiInstPrinter.cpp | 152 const MCOperand &Op = MI->getOperand(OpNo); in printOperand() 165 const MCOperand &Op = MI->getOperand(OpNo); in printMemImmOperand() 179 const MCOperand &Op = MI->getOperand(OpNo); in printHi16ImmOperand() 191 const MCOperand &Op = MI->getOperand(OpNo); in printHi16AndImmOperand() 203 const MCOperand &Op = MI->getOperand(OpNo); in printLo16AndImmOperand() 240 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() 242 const MCOperand &AluOp = MI->getOperand(OpNo + 2); in printMemRiOperand() 255 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() 257 const MCOperand &AluOp = MI->getOperand(OpNo + 2); in printMemRrOperand() 276 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() [all …]
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H A D | LanaiMCCodeEmitter.cpp | 138 const MCOperand AluOp = Inst.getOperand(3); in adjustPqBits() 143 const MCOperand Op2 = Inst.getOperand(2); in adjustPqBits() 189 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRiMemoryOpValue() 190 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRiMemoryOpValue() 191 const MCOperand AluOp = Inst.getOperand(OpNo + 2); in getRiMemoryOpValue() 221 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRrMemoryOpValue() 222 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRrMemoryOpValue() 260 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getSplsOpValue() 261 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getSplsOpValue() 262 const MCOperand AluOp = Inst.getOperand(OpNo + 2); in getSplsOpValue() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MCInstLower.h | 20 class MCOperand; variable 35 bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; 38 MCOperand lowerSymbolOperandMachO(const MachineOperand &MO, 40 MCOperand lowerSymbolOperandELF(const MachineOperand &MO, 42 MCOperand lowerSymbolOperandCOFF(const MachineOperand &MO, 44 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
H A D | LoongArchDisassembler.cpp | 63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass() 72 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass() 81 Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo)); in DecodeFPR64RegisterClass() 90 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass() 99 Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo)); in DecodeFCSRRegisterClass() 108 Inst.addOperand(MCOperand::createReg(LoongArch::VR0 + RegNo)); in DecodeLSX128RegisterClass() 117 Inst.addOperand(MCOperand::createReg(LoongArch::XR0 + RegNo)); in DecodeLASX256RegisterClass() 126 Inst.addOperand(MCOperand::createReg(LoongArch::SCR0 + RegNo)); in DecodeSCRRegisterClass() 135 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand() 146 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
H A D | RISCVDisassembler.cpp | 73 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass() 84 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRX1X5RegisterClass() 95 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR16RegisterClass() 106 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass() 117 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass() 128 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass() 139 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass() 170 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRCRegisterClass() 181 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRPairRegisterClass() 192 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeSR07RegisterClass() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFMCInstLower.cpp | 36 MCOperand BPFMCInstLower::LowerSymbolOperand(const MachineOperand &MO, in LowerSymbolOperand() 44 return MCOperand::createExpr(Expr); in LowerSymbolOperand() 51 MCOperand MCOp; in Lower() 60 MCOp = MCOperand::createReg(MO.getReg()); in Lower() 63 MCOp = MCOperand::createImm(MO.getImm()); in Lower() 66 MCOp = MCOperand::createExpr( in Lower()
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