Searched refs:MT_WFDMA0 (Results 1 – 8 of 8) sorted by relevance
263 #define MT_WFDMA0_RST MT_WFDMA0(0x100)267 #define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c)272 #define MT_MCU_CMD MT_WFDMA0(0x1f0)281 #define MT_MCU2HOST_SW_INT_ENA MT_WFDMA0(0x1f4)283 #define MT_WFDMA0_HOST_INT_STA MT_WFDMA0(0x200)290 #define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208)323 #define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c)324 #define MT_WFDMA0_RST_DRX_PTR MT_WFDMA0(0x280)325 #define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0)352 #define MT_TX_RING_BASE MT_WFDMA0(0x300)[all …]
313 #define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs)) macro315 #define MT_WFDMA0_RST MT_WFDMA0(0x100)319 #define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c)324 #define MT_WFDMA0_RX_INT_PCIE_SEL MT_WFDMA0(0x154)329 #define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208)336 #define WF_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0)340 #define WF_WFDMA0_GLO_CFG_EXT1 MT_WFDMA0(0x2b4)344 #define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c)398 #define MT_INT_SOURCE_CSR MT_WFDMA0(0x200)399 #define MT_INT_MASK_CSR MT_WFDMA0(0x204)[all …]
86 __mt7996_dma_prefetch(dev, MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0)); in mt7996_dma_prefetch()94 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_dma_disable()140 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_dma_start()184 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_dma_enable()266 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_dma_init()377 u32 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_dma_reset()
357 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_register_phy()
31 #define MT_WFDMA0_HOST_INT_ENA MT_WFDMA0(0x204)61 #define MT_RX_DATA_RING_BASE MT_WFDMA0(0x520)
206 MT_RX_BUF_SIZE, MT_WFDMA0(0x540)); in mt7921_dma_init()
574 #define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs)) macro576 #define MT_WFDMA0_RST MT_WFDMA0(0x100)580 #define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c)585 #define MT_WFDMA0_MCU_HOST_INT_ENA MT_WFDMA0(0x1f4)587 #define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208)594 #define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c)596 #define MT_WFDMA0_EXT0_CFG MT_WFDMA0(0x2b0)599 #define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0)600 #define MT_WFDMA0_PRI_DLY_INT_CFG1 MT_WFDMA0(0x2f4)601 #define MT_WFDMA0_PRI_DLY_INT_CFG2 MT_WFDMA0(0x2f8)[all …]
167 __mt7915_dma_prefetch(dev, MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0)); in mt7915_dma_prefetch()176 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7915_dma_disable()260 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7915_dma_start()338 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7915_dma_enable()418 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7915_dma_init()