Searched refs:MaskedMCID (Results 1 – 2 of 2) sorted by relevance
152 const MCInstrDesc &MaskedMCID = TII->get(MI.getOpcode()); in convertToUnmasked() local153 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) == in convertToUnmasked()
3396 const MCInstrDesc &MaskedMCID = TII->get(N->getMachineOpcode()); in doPeepholeMaskedRVV() local3397 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) == in doPeepholeMaskedRVV()3651 const MCInstrDesc &MaskedMCID = TII->get(MaskedOpc); in performCombineVMergeAndVOps() local3652 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) && in performCombineVMergeAndVOps()3654 assert(MaskedMCID.getOperandConstraint(MaskedMCID.getNumDefs(), in performCombineVMergeAndVOps()