| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | X86CompressEVEXTablesEmitter.cpp | 122 if (std::make_tuple(OldRI.IsCodeGenOnly, OldRI.OpMap, NewRI.OpPrefix, in operator ()()
125 std::make_tuple(NewRI.IsCodeGenOnly, NewRI.OpMap, OldRI.OpPrefix, in operator ()()
180 bool IsND = RI.OpMap == X86Local::T_MAP4 && RI.HasEVEX_B && RI.HasVEX_4V; in run()
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| H A D | AsmWriterEmitter.cpp | 679 std::map<StringRef, std::pair<int, int>> OpMap; member in __anond69e789b0411::IAPrinter
700 OpMap[Op] = std::make_pair(OpIdx, PrintMethodIdx); in addOperand()
707 bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); } in isOpMapped()
708 int getOpIndex(StringRef Op) { return OpMap[Op].first; } in getOpIndex()
709 std::pair<int, int> &getOpData(StringRef Op) { return OpMap[Op]; } in getOpData()
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| H A D | X86FoldTablesEmitter.cpp | 358 RegRI.OpMap != X86Local::T_MAP4) in operator ()()
376 RegRI.OpMap, RegRI.OpSize, RegRI.AdSize, RegRI.HasREX_W, in operator ()()
384 MemRI.OpMap, MemRI.OpSize, MemRI.AdSize, MemRI.HasREX_W, in operator ()()
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| H A D | X86RecognizableInstr.h | 185 uint8_t OpMap; member
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| H A D | X86RecognizableInstr.cpp | 114 OpMap = byteFromRec(Rec, "OpMapBits"); in RecognizableInstrBase()
500 bool IsND = OpMap == X86Local::T_MAP4 && HasEVEX_B && HasVEX_4V; in emitInstructionSpecifier()
807 switch (OpMap) { in emitDecodePath()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRDFOpt.cpp | 200 DenseMap<NodeId,unsigned> OpMap; in removeOperand() local
204 OpMap.insert(std::make_pair(RA.Id, getOpNum(RA.Addr->getOp()))); in removeOperand()
209 unsigned N = OpMap[RA.Id]; in removeOperand()
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| H A D | HexagonISelDAGToDAGHVX.cpp | 2750 const MapType &OpMap) -> int { in ppHvxShuffleOfShuffle() argument
2767 unsigned SrcBase = N < HwLen ? OpMap.at(OpShuff->getOperand(0)) in ppHvxShuffleOfShuffle()
2768 : OpMap.at(OpShuff->getOperand(1)); in ppHvxShuffleOfShuffle()
2775 auto fold3 = [&](SDValue TopShuff, SDValue Inp, MapType &&OpMap) -> SDValue { in ppHvxShuffleOfShuffle() argument
2792 getMaskElt(static_cast<unsigned>(MaybeM), S0, S1, OpMap); in ppHvxShuffleOfShuffle()
2859 MapType OpMap = { in ppHvxShuffleOfShuffle() local
2865 SDValue NewS = fold3(SDValue(N, 0), V0A->Src, std::move(OpMap)); in ppHvxShuffleOfShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 1292 uint64_t OpMap = TSFlags & X86II::OpMapMask; in canUseApxExtendedReg() local
1293 return !Encoding && (OpMap == X86II::OB || OpMap == X86II::TB); in canUseApxExtendedReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrUtils.td | 27 class TB { Map OpMap = TB; }
28 class T8 { Map OpMap = T8; }
29 class TA { Map OpMap = TA; }
30 class T_MAP4 { Map OpMap = T_MAP4; }
31 class T_MAP5 { Map OpMap = T_MAP5; }
32 class T_MAP6 { Map OpMap = T_MAP6; }
33 class T_MAP7 { Map OpMap = T_MAP7; }
34 class XOP8 { Map OpMap = XOP8; }
35 class XOP9 { Map OpMap = XOP9; }
36 class XOPA { Map OpMap = XOPA; }
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| H A D | X86InstrFormats.td | 241 Map OpMap = OB; // Which opcode map does this inst have?
242 bits<4> OpMapBits = OpMap.Value;
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| H A D | X86InstrSSE.td | 6677 let Predicates = [HasCRC32, NoEGPR], OpMap = T8, OpPrefix = XD in {
6691 let Predicates = [HasCRC32, HasEGPR, In64BitMode], OpMap = T_MAP4, OpEnc = EncEVEX in {
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