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Searched refs:OpSize (Results 1 – 25 of 36) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.h76 bool isAmbiguous_64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_64() argument
77 if (InstTy == InstType::Ambiguous && OpSize == 64) in isAmbiguous_64()
82 bool isAmbiguous_32(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32() argument
83 if (InstTy == InstType::Ambiguous && OpSize == 32) in isAmbiguous_32()
88 bool isAmbiguous_32or64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32or64() argument
89 if (InstTy == InstType::Ambiguous && (OpSize == 32 || OpSize == 64)) in isAmbiguous_32or64()
95 unsigned OpSize) const { in isAmbiguousWithMergeOrUnmerge_64() argument
102 if (InstTy == InstType::FloatingPoint && (OpSize == 32 || OpSize == 64)) in isFloatingPoint_32or64()
108 if (InstTy == InstType::FloatingPoint && OpSize == 64) in isFloatingPoint_64()
113 bool isInteger_32(InstType InstTy, unsigned OpSize) const { in isInteger_32() argument
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h194 uint8_t OpSize; member
279 uint8_t OpSize);
290 uint8_t OpSize);
295 uint8_t OpSize);
300 uint8_t OpSize);
302 uint8_t OpSize);
304 uint8_t OpSize);
306 uint8_t OpSize);
308 uint8_t OpSize);
310 writemaskRegisterEncodingFromString(const std::string &s, uint8_t OpSize);
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H A DX86RecognizableInstr.cpp118 OpSize = byteFromRec(Rec, "OpSizeBits"); in RecognizableInstrBase()
369 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
415 uint8_t OpSize)) { in handleOperand() argument
437 typeFromString(std::string(typeName), HasREX_W, OpSize); in handleOperand()
976 if (OpSize == X86Local::OpSize16) { in typeFromString()
980 } else if (OpSize == X86Local::OpSize32) { in typeFromString()
1117 uint8_t OpSize) { in immediateEncodingFromString() argument
1118 if (OpSize != X86Local::OpSize16) { in immediateEncodingFromString()
1156 uint8_t OpSize) { in rmRegisterEncodingFromString() argument
1285 uint8_t OpSize) { in memoryEncodingFromString() argument
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H A DX86FoldTablesEmitter.cpp376 RegRI.OpMap, RegRI.OpSize, RegRI.AdSize, RegRI.HasREX_W, in operator ()()
384 MemRI.OpMap, MemRI.OpSize, MemRI.AdSize, MemRI.HasREX_W, in operator ()()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DMCExternalSymbolizer.cpp36 bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) { in tryAddingSymbolicOperand() argument
42 !GetOpInfo(DisInfo, Address, Offset, OpSize, InstSize, 1, &SymbolicOp)) { in tryAddingSymbolicOperand()
55 if (!SymbolLookUp || (OpSize == 1 && !IsBranch)) in tryAddingSymbolicOperand()
H A DMCDisassembler.cpp30 uint64_t Offset, uint64_t OpSize, in tryAddingSymbolicOperand() argument
35 OpSize, InstSize); in tryAddingSymbolicOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.h32 uint64_t Offset, uint64_t OpSize,
H A DAArch64ExternalSymbolizer.cpp63 bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) { in tryAddingSymbolicOperand() argument
76 if (!GetOpInfo || !GetOpInfo(DisInfo, Address, /*Offset=*/0, OpSize, InstSize, in tryAddingSymbolicOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp405 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local
410 auto Libcalls = getFCmpLibcalls(Predicate, OpSize); in legalizeCustom()
422 assert((OpSize == 32 || OpSize == 64) && "Unsupported operand size"); in legalizeCustom()
423 auto *ArgTy = OpSize == 32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx); in legalizeCustom()
H A DARMInstructionSelector.cpp460 unsigned OpRegBank, unsigned OpSize) in CmpConstants()
463 OperandSize(OpSize) {} in CmpConstants()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/MCDisassembler/
H A DMCExternalSymbolizer.h49 uint64_t Offset, uint64_t OpSize,
H A DMCSymbolizer.h72 uint64_t OpSize, uint64_t InstSize) = 0;
H A DMCDisassembler.h207 bool IsBranch, uint64_t Offset, uint64_t OpSize,
/freebsd/contrib/llvm-project/llvm/include/llvm-c/
H A DDisassemblerTypes.h49 uint64_t OpSize, uint64_t InstSize,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp758 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local
768 OpSize[Idx] = Ty.getSizeInBits(); in getInstrMapping()
839 TypeSize::getFixed(OpSize[0])); in getInstrMapping()
1120 auto Mapping = getValueMapping(OpRegBankIdx[Idx], OpSize[Idx]); in getInstrMapping()
H A DAArch64InstructionSelector.cpp799 unsigned OpSize) { in selectBinaryOp() argument
802 if (OpSize == 32) { in selectBinaryOp()
813 } else if (OpSize == 64) { in selectBinaryOp()
829 switch (OpSize) { in selectBinaryOp()
870 unsigned OpSize) { in selectLoadStoreUIOp() argument
874 switch (OpSize) { in selectLoadStoreUIOp()
886 switch (OpSize) { in selectLoadStoreUIOp()
3123 const unsigned OpSize = Ty.getSizeInBits(); in select() local
4602 unsigned OpSize = Ty.getSizeInBits(); in emitFPCompare() local
4603 if (OpSize != 32 && OpSize != 64) in emitFPCompare()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp155 unsigned OpSize) { in selectLoadStoreOp() argument
159 switch (OpSize) { in selectLoadStoreOp()
169 switch (OpSize) { in selectLoadStoreOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.h292 uint64_t Offset, uint64_t OpSize,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp489 unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in computeKnownBitsImpl() local
495 Known.insertBits(SrcOpKnown, I * OpSize); in computeKnownBitsImpl()
H A DLegalizerHelper.cpp5693 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalarExtract() local
5697 if (SrcStart + NarrowSize <= OpStart || SrcStart >= OpStart + OpSize) { in narrowScalarExtract()
5712 SegSize = std::min(NarrowSize, OpStart + OpSize - SrcStart); in narrowScalarExtract()
5715 SegSize = std::min(SrcStart + NarrowSize - OpStart, OpSize); in narrowScalarExtract()
5759 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); in narrowScalarInsert() local
5777 if (DstStart + NarrowSize <= OpStart || DstStart >= OpStart + OpSize) { in narrowScalarInsert()
5790 SegSize = std::min(NarrowSize, OpStart + OpSize - DstStart); in narrowScalarInsert()
5795 std::min(NarrowSize - InsertOffset, OpStart + OpSize - DstStart); in narrowScalarInsert()
5799 if (ExtractOffset != 0 || SegSize != OpSize) { in narrowScalarInsert()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFormats.td230 OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
232 bits<2> OpSizeBits = OpSize.Value;
/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/
H A DDWARFEmitter.cpp837 if (Expected<uint64_t> OpSize = in writeListEntry() local
839 DescriptionsLength += *OpSize; in writeListEntry()
841 return OpSize.takeError(); in writeListEntry()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp658 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local
663 OpSize = SubRegSize / 8; in foldMemoryOperand()
666 MemSize = std::max(MemSize, OpSize); in foldMemoryOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp894 unsigned OpSize = OpTy.getSizeInBits(); in executeInWaterfallLoop() local
895 bool Is64 = OpSize % 64 == 0; in executeInWaterfallLoop()
898 unsigned NumParts = OpSize / PartSize; in executeInWaterfallLoop()
4606 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping() local
4607 OpdsMapping[2] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, OpSize); in getInstrMapping()
4608 OpdsMapping[3] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, OpSize); in getInstrMapping()
4809 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping() local
4812 OpdsMapping[2] = AMDGPU::getValueMapping(regBankID, OpSize); in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/tools/llvm-objdump/
H A DMachODump.cpp2807 uint64_t OpSize, uint64_t InstSize, int TagType, in SymbolizerGetOpInfo() argument
2825 if (OpSize != 1 && OpSize != 2 && OpSize != 4 && OpSize != 0) in SymbolizerGetOpInfo()
2905 if (OpSize != 1 && OpSize != 2 && OpSize != 4 && OpSize != 0) in SymbolizerGetOpInfo()

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