/freebsd/contrib/libarchive/cpio/test/ |
H A D | test_format_newc.c | 32 #define PAD(n, block) ((~(n) + 1) & ((block) - 1)) macro 221 fs += PAD(fs, 4); in DEFINE_TEST() 228 ns += PAD(ns + 2, 4); in DEFINE_TEST() 255 fs += PAD(fs, 4); in DEFINE_TEST() 262 ns += PAD(ns + 2, 4); in DEFINE_TEST() 291 fs += PAD(fs, 4); in DEFINE_TEST() 298 ns += PAD(ns + 2, 4); in DEFINE_TEST() 325 fs += PAD(fs, 4); in DEFINE_TEST() 332 ns += PAD(ns + 2, 4); in DEFINE_TEST()
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/freebsd/crypto/openssl/test/recipes/30-test_evp_data/ |
H A D | evpciph_aes_wrap.txt | 132 Cipher = AES-128-WRAP-PAD-INV 138 Cipher = AES-128-WRAP-PAD-INV 145 Cipher = AES-192-WRAP-PAD-INV 152 Cipher = AES-256-WRAP-PAD-INV 159 Cipher = AES-128-WRAP-PAD-INV 165 Cipher = AES-192-WRAP-PAD-INV 171 Cipher = AES-256-WRAP-PAD-INV
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/freebsd/crypto/openssl/doc/man7/ |
H A D | EVP_CIPHER-AES.pod | 39 "AES-128-WRAP-PAD", "AES-192-WRAP-PAD", "AES-256-WRAP-PAD", 41 "AES-128-WRAP-PAD-INV", "AES-192-WRAP-PAD-INV" and "AES-256-WRAP-PAD-INV"
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | fsl,imx-pinctrl.txt | 4 to share one PAD to several functional blocks. The sharing is done by 5 multiplexing the PAD input/output signals. For each PAD there are up to 7 different PAD settings (like pull up, keeper, etc) the IOMUXC controls 8 also the PAD settings parameters. 40 Other bits are used for PAD setting.
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H A D | atmel,at91-pinctrl.txt | 4 to share one PAD to several functional blocks. The sharing is done by 5 multiplexing the PAD input/output signals. For each PAD there are up to 7 different PAD settings (like pull up, keeper, etc) the controller controls 8 also the PAD settings parameters.
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H A D | actions,s500-pinctrl.yaml | 26 - description: PAD Pull Control + PAD Schmitt Trigger Enable + PAD Control 27 - description: PAD Drive Capacity Select
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H A D | rockchip,pinctrl.txt | 4 to share one PAD to several functional blocks. The sharing is done by 5 multiplexing the PAD input/output signals. For each PAD there are several
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H A D | rockchip,pinctrl.yaml | 13 The Rockchip Pinmux Controller enables the IC to share one PAD 15 the PAD input/output signals. For each PAD there are several muxing
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/freebsd/contrib/llvm-project/compiler-rt/include/sanitizer/ |
H A D | netbsd_syscall_hooks.h | 1076 res, (long long)(path), (long long)(PAD), (long long)(length)) 1082 res, (long long)(fd), (long long)(PAD), (long long)(length)) 1548 (long long)(PAD), (long long)(offset)) 3548 long long nbyte, long long PAD, 3554 long long nbyte, long long PAD, 3641 long long fd, long long PAD, 3646 long long PAD, long long pos); 3657 void __sanitizer_syscall_pre_impl_lseek(long long fd, long long PAD, 3666 void __sanitizer_syscall_pre_impl_ftruncate(long long fd, long long PAD, 4782 long long mode, long long PAD, [all …]
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/freebsd/lib/libc/stdio/ |
H A D | vfprintf.c | 376 #define PAD(howmany, with) { \ in __vfprintf() macro 1016 PAD(width - realsz, blanks); in __vfprintf() 1029 PAD(width - realsz, zeroes); in __vfprintf() 1036 PAD(dprec - size, zeroes); in __vfprintf() 1050 PAD(-expt, zeroes); in __vfprintf() 1074 PAD(prec - ndig, zeroes); in __vfprintf() 1083 PAD(width - realsz, blanks); in __vfprintf()
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H A D | vfwprintf.c | 451 #define PAD(howmany, with) { \ in __vfwprintf() macro 1071 PAD(width - realsz, blanks); in __vfwprintf() 1084 PAD(width - realsz, zeroes); in __vfwprintf() 1091 PAD(dprec - size, zeroes); in __vfwprintf() 1105 PAD(-expt, zeroes); in __vfwprintf() 1130 PAD(prec - ndig, zeroes); in __vfwprintf() 1139 PAD(width - realsz, blanks); in __vfwprintf()
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | marvell,xenon-sdhci.yaml | 44 for Xenon IP register. The second one for the Armada 3700 SoC PHY PAD 152 - description: Armada 3700 SoC PHY PAD Voltage Control register 160 Type of Armada 3700 SoC PHY PAD Voltage Controller register. 161 If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning 163 If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for
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H A D | marvell,xenon-sdhci.txt | 31 PHY PAD Voltage Control register. 96 Type of Armada 3700 SoC PHY PAD Voltage Controller register. 99 If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning and is 101 If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for eMMC.
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | cadence-nand-controller.txt | 21 board delay = RE#PAD delay + PCB trace to device + PCB trace from device 22 + DQ PAD delay
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/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha256/cp/ |
H A D | hash_sha256_cp.c | 147 static const uint8_t PAD[64] = { 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, variable 162 state->buf[r + i] = PAD[i]; in SHA256_Pad() 166 state->buf[r + i] = PAD[i]; in SHA256_Pad()
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/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha512/cp/ |
H A D | hash_sha512_cp.c | 163 static const uint8_t PAD[128] = { variable 181 state->buf[r + i] = PAD[i]; in SHA512_Pad() 185 state->buf[r + i] = PAD[i]; in SHA512_Pad()
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/freebsd/contrib/sendmail/libsm/ |
H A D | vfprintf.c | 232 #define PAD(howmany, with) do \ macro 750 PAD(width - realsz, blanks); 766 PAD(width - realsz, zeroes); 769 PAD(dprec - size, zeroes); 775 PAD(width - realsz, blanks);
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/freebsd/sys/crypto/sha2/ |
H A D | sha256c.c | 220 static unsigned char PAD[64] = { variable 239 memcpy(&ctx->buf[r], PAD, 56 - r); in SHA256_Pad() 242 memcpy(&ctx->buf[r], PAD, 64 - r); in SHA256_Pad()
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H A D | sha512c.c | 251 static unsigned char PAD[SHA512_BLOCK_LENGTH] = { variable 274 memcpy(&ctx->buf[r], PAD, 112 - r); in SHA512_Pad() 277 memcpy(&ctx->buf[r], PAD, 128 - r); in SHA512_Pad()
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/freebsd/contrib/ntp/include/ |
H A D | icom.h | 49 #define PAD 0xff /* transmit padding */ macro
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/freebsd/sys/arm/nvidia/tegra124/ |
H A D | tegra124_xusbpadctl.c | 269 #define PAD(n, t, u, d) { \ macro 276 PAD("usb2", PADCTL_PAD_USB2, usb2_powerup, usb2_powerdown), 277 PAD("ulpi", PADCTL_PAD_ULPI, NULL, NULL), 278 PAD("hsic", PADCTL_PAD_HSIC, NULL, NULL), 279 PAD("pcie", PADCTL_PAD_PCIE, pcie_powerup, pcie_powerdown), 280 PAD("sata", PADCTL_PAD_SATA, sata_powerup, sata_powerdown),
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/freebsd/contrib/ntp/libntp/ |
H A D | icom.c | 78 u_char cmd[] = {PAD, PR, PR, 0, TX, V_SFREQ, 0, 0, 0, 0, FI, in icom_freq()
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/freebsd/crypto/openssl/crypto/poly1305/asm/ |
H A D | poly1305-x86_64.pl | 2840 vmovq $padbit,%x#$PAD 2843 vpermq \$0xcf,$PAD,$PAD 2864 vporq $PAD,$T0,$T0 2944 vpbroadcastq $padbit,$PAD 2985 vporq $PAD,$T2,$T2 3155 vporq $PAD,$T2,$T2 3212 vporq $PAD,$T2,$T2 3486 map(s/%y/%z/, $T0,$T1,$T2,$T3,$mask44,$mask42,$tmp,$PAD); 3505 vpbroadcastq $padbit,$PAD 3521 vporq $PAD,$T2,$T2 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/actions/ |
H A D | owl-s500.dtsi | 266 <0xb01b0060 0x18>, /* PAD Control */ 267 <0xb01b0080 0xc>; /* PAD Drive Capacity */
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/freebsd/sys/arm64/nvidia/tegra210/ |
H A D | tegra210_xusbpadctl.c | 436 #define PAD(n, t, cn, rn, e, d) { \ macro 445 PAD("usb2", PADCTL_PAD_USB2, "trk", NULL, usb2_enable, usb2_disable), 446 PAD("hsic", PADCTL_PAD_HSIC, "trk", NULL, hsic_enable, hsic_disable), 447 PAD("pcie", PADCTL_PAD_PCIE, "pll", "phy", pcie_enable, pcie_disable), 448 PAD("sata", PADCTL_PAD_SATA, "pll", "phy", sata_enable, sata_disable),
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