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Searched refs:PL (Results 1 – 25 of 101) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dxlnx,zynqmp-ams.yaml16 The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
18 All designs should have AMS registers, but PS and PL are optional. The
19 AMS controller can work with only PS, only PL and both PS and PL
21 should always have AMS module property. Providing PS & PL module is optional.
30 |2 |PL Internal voltage measurement, VCCINT. |Voltage
32 |4 |PL Aux voltage measurement, VCCAUX. |Voltage
50 PL Sysmon |20 |PL temperature measurement. |Temperature
101 Maps the child address space for PS and/or PL.
139 PL-SYSMON is capable of monitoring off chip voltage and temperature.
140 PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td559 def NEG8r_EVEX : NegOpR_RF<Xi8>, PL;
561 def NEG32r_EVEX : NegOpR_RF<Xi32>, PL;
562 def NEG64r_EVEX : NegOpR_RF<Xi64>, PL;
564 def NOT8r_EVEX : NotOpR_R<Xi8>, PL;
566 def NOT32r_EVEX : NotOpR_R<Xi32>, PL;
567 def NOT64r_EVEX : NotOpR_R<Xi64>, PL;
569 def NEG8m_EVEX : NegOpM_MF<Xi8>, PL;
571 def NEG32m_EVEX : NegOpM_MF<Xi32>, PL;
574 def NOT8m_EVEX : NotOpM_M<Xi8>, PL;
576 def NOT32m_EVEX : NotOpM_M<Xi32>, PL;
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H A DX86InstrShiftRotate.td78 def 8r1_EVEX : UnaryOpR_RF<0xD1, RegMRM, m, Xi8>, PL;
79 def 16r1_EVEX : UnaryOpR_RF<0xD1, RegMRM, m, Xi16>, PL, PD;
80 def 32r1_EVEX : UnaryOpR_RF<0xD1, RegMRM, m, Xi32>, PL;
81 def 64r1_EVEX : UnaryOpR_RF<0xD1, RegMRM, m, Xi64>, PL;
92 def 8m1_EVEX : UnaryOpM_MF<0xD1, MemMRM, m, Xi8>, PL;
94 def 32m1_EVEX : UnaryOpM_MF<0xD1, MemMRM, m, Xi32>, PL;
95 def 64m1_EVEX : UnaryOpM_MF<0xD1, MemMRM, m, Xi64>, PL;
451 def 32rrCL_EVEX : ShlrdOpRRC_R<o2, m, Xi32>, DefEFLAGS, PL;
452 def 64rrCL_EVEX : ShlrdOpRRC_R<o2, m, Xi64>, DefEFLAGS, PL;
495 def 32mrCL_EVEX : ShlrdOpMRC_M<o2, m, Xi32>, DefEFLAGS, PL;
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/freebsd/tools/tools/nanobsd/
H A Dfill_pkg.sh150 PL=$NANO_PKG_DIR/_list
151 true > "$PL"
154 ports_recurse "$PL" "$NANO_PKG_DUMP" "$p"
157 for i in `cat "$PL"` ; do
166 rm -f "$PL"
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Utils/
H A DARMBaseInfo.h36 PL, // Plus, positive or zero >, ==, or unordered enumerator
55 case MI: return PL; in getOppositeCondition()
56 case PL: return MI; in getOppositeCondition()
153 case ARMCC::PL: return "pl"; in ARMCondCodeToString()
176 .Case("pl", ARMCC::PL) in ARMCondCodeFromString()
/freebsd/contrib/bmake/unit-tests/
H A Dopt-debug-lint.mk76 .if ${value:${:UL}PL} != "LPL}" # FIXME: "LPL}" is unexpected here.
77 . error ${value:${:UL}PL}
/freebsd/crypto/openssl/external/perl/Text-Template-1.56/
H A DSIGNATURE12 not run its Makefile.PL or Build.PL.
23 SHA1 f7634b46dde2cf8c6f31fe46327d15151d654a2c Makefile.PL
H A DINSTALL4 perl Makefile.PL
H A DMANIFEST8 Makefile.PL
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopSimplifyCFG.cpp452 for (auto *PL = DL->getParentLoop(); PL; PL = PL->getParentLoop()) in deleteDeadLoopBlocks() local
454 PL->removeBlockFromLoop(BB); in deleteDeadLoopBlocks()
/freebsd/libexec/getty/
H A Dmain.c316 if (IMP && *IMP && !(PL && PP)) in main()
318 if (IM && *IM && !(PL && PP)) in main()
345 } else if (!(PL && PP)) in main()
347 if (rval == 2 || (PL && PP)) { in main()
/freebsd/secure/caroot/trusted/
H A DCertum_EC-384_CA.pem20 …Issuer: C = PL, O = Asseco Data Systems S.A., OU = Certum Certification Authority, CN = Certum EC-…
24 …Subject: C = PL, O = Asseco Data Systems S.A., OU = Certum Certification Authority, CN = Certum EC…
H A DCertum_Trusted_Network_CA.pem19 …Issuer: C = PL, O = Unizeto Technologies S.A., OU = Certum Certification Authority, CN = Certum Tr…
23 …Subject: C = PL, O = Unizeto Technologies S.A., OU = Certum Certification Authority, CN = Certum T…
H A DSZAFIR_ROOT_CA2.pem20 Issuer: C = PL, O = Krajowa Izba Rozliczeniowa S.A., CN = SZAFIR ROOT CA2
24 Subject: C = PL, O = Krajowa Izba Rozliczeniowa S.A., CN = SZAFIR ROOT CA2
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxlnx,zynqmp-pcap-fpga.txt3 Programmable Logic (PL). The configuration uses the firmware interface.
H A Dxlnx,zynqmp-pcap-fpga.yaml15 configure the Programmable Logic (PL). The configuration uses the
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dxlnx,i2s.txt1 Device-Tree bindings for Xilinx I2S PL block
H A Dxlnx,audio-formatter.txt1 Device-Tree bindings for Xilinx PL audio formatter
/freebsd/secure/caroot/untrusted/
H A DCertum_Root_CA.pem17 Issuer: C = PL, O = Unizeto Sp. z o.o., CN = Certum CA
21 Subject: C = PL, O = Unizeto Sp. z o.o., CN = Certum CA
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DModule.cpp584 void Module::setPICLevel(PICLevel::Level PL) { in setPICLevel() argument
587 addModuleFlag(ModFlagBehavior::Min, "PIC Level", PL); in setPICLevel()
600 void Module::setPIELevel(PIELevel::Level PL) { in setPIELevel() argument
601 addModuleFlag(ModFlagBehavior::Max, "PIE Level", PL); in setPIELevel()
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-olinuxino.dts206 /* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
207 /* interface used to talk to the PMIC in on the PL pins */
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dxlnx,xdma-host.yaml7 title: Xilinx XDMA PL PCIe Root Port Bridge
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h261 PL = 0x5, // Plus, positive or zero >, ==, or unordered enumerator
290 case PL: return "pl"; in getCondCodeName()
324 case PL: return 0; // N == 0 in getNZCVToSatisfyCondCode()
/freebsd/usr.sbin/makefs/cd9660/
H A Diso9660_rrip.h185 ISO_RRIP_PLINK PL; member
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64GlobalISelUtils.cpp139 CondCode = AArch64CC::PL; in changeFCMPPredToAArch64CC()

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