Searched refs:ResultTypes (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 6411 const SmallDenseMap<PHINode *, Type *> &ResultTypes) { in ShouldBuildLookupTable() argument
6417 for (const auto &I : ResultTypes) { in ShouldBuildLookupTable()
6448 bool HasDefaultResults, const SmallDenseMap<PHINode *, Type *> &ResultTypes, in ShouldUseSwitchConditionAsTableIndex() argument
6456 return all_of(ResultTypes, [&](const auto &KV) { in ShouldUseSwitchConditionAsTableIndex()
6585 SmallDenseMap<PHINode *, Type *> ResultTypes; in SwitchToLookupTable() local
6614 ResultTypes[PHI] = ResultLists[PHI][0].second->getType(); in SwitchToLookupTable()
6633 *MinCaseVal, *MaxCaseVal, HasDefaultResults, ResultTypes, DL, TTI); in SwitchToLookupTable()
6651 if (!ShouldBuildLookupTable(SI, TableSize, TTI, DL, ResultTypes)) in SwitchToLookupTable()
6709 if (!CR.isUpperWrapped() && all_of(ResultTypes, [&](const auto &KV) { in SwitchToLookupTable()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7339 ArrayRef<EVT> ResultTypes, bool IsTexFail, in constructRetValue() argument
7344 EVT ReqRetVT = ResultTypes[0]; in constructRetValue()
7472 SmallVector<EVT, 3> ResultTypes(Op->values()); in lowerImage() local
7503 ResultTypes[0] = Is64Bit ? MVT::v2i64 : MVT::v2i32; in lowerImage()
7530 MVT LoadVT = ResultTypes[0].getSimpleVT(); in lowerImage()
7719 ResultTypes[0] = NewVT; in lowerImage()
7720 if (ResultTypes.size() == 3) { in lowerImage()
7724 ResultTypes.erase(&ResultTypes[1]); in lowerImage()
7810 MachineSDNode *NewNode = DAG.getMachineNode(Opcode, DL, ResultTypes, Ops); in lowerImage()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 9692 ArrayRef<Type *> ResultTypes; in visitInlineAsm() local
9694 ResultTypes = StructResult->elements(); in visitInlineAsm()
9696 ResultTypes = ArrayRef(CallResultType); in visitInlineAsm()
9698 auto CurResultType = ResultTypes.begin(); in visitInlineAsm()
9700 assert(CurResultType != ResultTypes.end() && "Unexpected value"); in visitInlineAsm()
9777 assert(CurResultType == ResultTypes.end() && in visitInlineAsm()
9779 assert(ResultValues.size() == ResultTypes.size() && in visitInlineAsm()
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