| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMatInt.cpp | 36 else if (SignExtend32<1>(Lo12 >> 11) == SignExtend32<20>(Hi20)) in generateInstSeq()
44 if (SignExtend32<1>(Hi20 >> 19) != SignExtend32<20>(Higher20)) in generateInstSeq()
47 if (SignExtend32<1>(Higher20 >> 19) != SignExtend32<12>(Highest12)) in generateInstSeq()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 1464 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeMem()
1484 int Offset = SignExtend32<9>(Insn >> 7); in DecodeMemEVA()
1504 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeLoadByte15()
1520 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeCacheOp()
1536 int Offset = SignExtend32<12>(Insn & 0xfff); in DecodeCacheOpMM()
1552 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodePrefeOpMM()
1568 int Offset = SignExtend32<9>(Insn >> 7); in DecodeCacheeOp_CacheOpR6()
1583 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI()
1597 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI_MM()
1765 Offset = SignExtend32<4>(Insn & 0xf); in DecodeMemMMReglistImm4Lsl2()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 182 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
208 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
233 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
|
| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/PPC64/ |
| H A D | EmulateInstructionPPC64.cpp | 233 int32_t ids = llvm::SignExtend32<16>(ds << 2); in EmulateLD()
277 int32_t ids = llvm::SignExtend32<16>(ds << 2); in EmulateSTD()
370 int32_t si_val = llvm::SignExtend32<16>(si); in EmulateADDI()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 175 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
202 DecodeSymbolicOperandOff(Inst, Address, SignExtend32<B>(InsnS), Decoder); in DecodeBranchTargetS()
213 SignExtend32<B>(maskTrailingOnes<decltype(InsnS)>(B) & InsnS))); in DecodeSignedOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
75 int32_t Offset = SignExtend32<24>(Imm); in decodeDirectBrTarget()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | MathExtras.h | 436 template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) { in SignExtend32() function
444 inline int32_t SignExtend32(uint32_t X, unsigned B) { in SignExtend32() function
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| H A D | BPFDisassembler.cpp | 135 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeMemoryOpValue()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 362 Value = SignExtend32<5>(Value); in printS5ImmOperand()
460 int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printBranchOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 340 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX()
493 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS()
615 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeBranchCondition()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 347 MI.addOperand(MCOperand::createImm(SignExtend32(Offset, 10))); in getInstructionCJ()
|
| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldELF.cpp | 1434 int64_t Addend = Value.Addend + SignExtend32<16>(Opcode & 0x0000ffff); in processRelocationRef()
1459 Value.Addend += SignExtend32<18>((Opcode & 0x0000ffff) << 2); in processRelocationRef()
1461 Value.Addend += SignExtend32<21>((Opcode & 0x0007ffff) << 2); in processRelocationRef()
1463 Value.Addend += SignExtend32<23>((Opcode & 0x001fffff) << 2); in processRelocationRef()
1465 Value.Addend += SignExtend32<28>((Opcode & 0x03ffffff) << 2); in processRelocationRef()
|
| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| H A D | RuntimeDyldMachOARM.h | 73 return SignExtend32<26>(Temp << 2); in decodeAddend()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2901 int imm32 = SignExtend32<25>(tmp << 1); in DecodeT2BInstruction()
2922 Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm))); in DecodeBranchImmInstruction()
2926 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<26>(imm) + 8, in DecodeBranchImmInstruction()
2928 Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm))); in DecodeBranchImmInstruction()
3962 Inst.addOperand(MCOperand::createImm(SignExtend32<12>(Val << 1))); in DecodeThumbBROperand()
3969 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<21>(Val) + 4, in DecodeT2BROperand()
3971 Inst.addOperand(MCOperand::createImm(SignExtend32<21>(Val))); in DecodeT2BROperand()
4803 int imm32 = SignExtend32<25>(tmp << 1); in DecodeThumbBLXOffset()
4925 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(Val << 1))); in DecodeThumbBCCTargetOperand()
4945 int imm32 = SignExtend32<25>(tmp << 1); in DecodeThumbBLTargetOperand()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 108 O << formatDec(SignExtend32<24>(Imm)); in printOffset()
127 O << formatDec(SignExtend32(Imm, AMDGPU::getNumFlatOffsetBits(STI))); in printFlatOffset()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 243 Src1.setImm(SignExtend32(Src1.getImm(), 32)); in shrinkScalarCompare()
|
| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 2041 imm32 = llvm::SignExtend32<25>(imm25); in EmulateBLXImmediate()
2060 imm32 = llvm::SignExtend32<25>(imm25); in EmulateBLXImmediate()
2070 imm32 = llvm::SignExtend32<26>(Bits32(opcode, 23, 0) << 2); in EmulateBLXImmediate()
2077 imm32 = llvm::SignExtend32<26>(Bits32(opcode, 23, 0) << 2 | in EmulateBLXImmediate()
2822 imm32 = llvm::SignExtend32<9>(Bits32(opcode, 7, 0) << 1); in EmulateB()
2827 imm32 = llvm::SignExtend32<12>(Bits32(opcode, 10, 0) << 1); in EmulateB()
2845 imm32 = llvm::SignExtend32<21>(imm21); in EmulateB()
2860 imm32 = llvm::SignExtend32<25>(imm25); in EmulateB()
2866 imm32 = llvm::SignExtend32<26>(Bits32(opcode, 23, 0) << 2); in EmulateB()
|
| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | PPC64.cpp | 554 int32_t disp16 = llvm::SignExtend32(accessInsn & 0xffff, 16); in getTotalDisp()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 735 OS << '#' << SignExtend32(OpN & Index, IndexBits); in print()
1184 int Idx = SignExtend32(R.OpN & OpRef::Index, OpRef::IndexBits); in materialize()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.td | 47 return CurDAG->getTargetConstant(SignExtend32(N->getSExtValue(), 7),
66 return CurDAG->getTargetConstant(SignExtend32(Val, 7), SDLoc(N), MVT::i32);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 792 OriginalOffset - llvm::SignExtend32<16>(OriginalOffset); in emitInstruction()
|
| H A D | PPCISelLowering.cpp | 2615 int MaskVal = SignExtend32(Value, ByteSize * 8); in get_VSPLTI_elt()
2621 if (SignExtend32<5>(MaskVal) == MaskVal) in get_VSPLTI_elt()
5060 SignExtend32<26>(Addr) != Addr) in isBLACompatibleAddress()
|
| /freebsd/contrib/llvm-project/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 5140 return SignExtend32<sizeof(T) * CHAR_BIT>(Value); in getEncodedOrdinal()
|