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/freebsd/crypto/openssl/crypto/rc4/asm/
H A Drc4-x86_64.pl180 xor $TX[1],$TX[1]
189 and \$7,$TX[1]
192 sub $TX[1],$len
205 dec $TX[1]
263 dec $TX[1]
266 mov $YY,$TX[1]
288 $code.=" movz $TX[0]#b,$TX[0]#d\n";
308 push(@TX,shift(@TX)); # "rotate" registers
311 mov $YY,$TX[1]
369 mov $TX[0],$TX[1]
[all …]
H A Drc4-md5-x86_64.pl175 xor $TX[1],$TX[1]
178 sub $XX[0],$TX[1]
181 sub $TX[1],$len
183 add $TX[0]#b,$YY#b
187 add $TY#b,$TX[0]#b
194 dec $TX[1]
197 mov $YY,$TX[1]
257 #rc4# movz $TX[0]#b,$TX[0]#d
297 #rc4# movz $TX[0]#b,$TX[0]#d
336 #rc4# movz $TX[0]#b,$TX[0]#d
[all …]
H A Drc4-c64xplus.pl60 LDBU *${KEYA}[$XX],$TX
65 || ADD4 $TX,$YY,$YY
73 STB $TX,*${KEYB}[$YY]
74 ||[B0] ADD4 $TX,$YY,$YY
77 ||[!B0] MVD $tx,$TX
78 ADD4 $TY,$TX,$SUM ; [0,0] $TX is not replaced by $tx yet!
91 || SUB4 $YY,$TX,$YY
116 || MVK 0,$TX
149 STB $TX,*${KEYB}[$YY]
150 ||[B0] ADD4 $TX,$YY,$YY
[all …]
H A Drc4-s390x.pl65 @TX=("%r8","%r9");
95 la $YY,0($YY,$TX[0]) # $i
109 stc $TX[0],2($YY,$key)
114 la $TX[1],0($TX[0])
116 la $TY,0($TY,$TX[0])
119 push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
123 lg $TX[1],0($inp)
127 xgr $acc,$TX[1]
140 la $YY,0($YY,$TX[0])
143 stc $TX[0],2($YY,$key)
[all …]
H A Drc4-parisc.pl88 @TX=("%r21","%r22");
110 $ST $TX[0],0($ix)
112 copy $TX[0],$TX[1] ; move
115 addl $TX[0],$TY,$TY
116 addl $TX[1],$YY,$YY
120 push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
130 $ST $TX[0],0($iy)
133 addl $TX[0],$TY,$TY
239 sub $YY,$TX[0],$YY
291 $ST @TX[0],0($YY)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-herobrine-villager-r1.dtsi26 "TX SWR_ADC0", "ADC1_OUTPUT",
27 "TX SWR_ADC1", "ADC2_OUTPUT",
28 "TX SWR_ADC2", "ADC3_OUTPUT",
29 "TX SWR_DMIC0", "DMIC1_OUTPUT",
30 "TX SWR_DMIC1", "DMIC2_OUTPUT",
31 "TX SWR_DMIC2", "DMIC3_OUTPUT",
32 "TX SWR_DMIC3", "DMIC4_OUTPUT",
33 "TX SWR_DMIC4", "DMIC5_OUTPUT",
34 "TX SWR_DMIC5", "DMIC6_OUTPUT",
35 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
H A Dsc7280-herobrine-audio-wcd9385.dtsi23 "TX SWR_ADC0", "ADC1_OUTPUT",
24 "TX SWR_ADC1", "ADC2_OUTPUT",
25 "TX SWR_ADC2", "ADC3_OUTPUT",
26 "TX SWR_DMIC0", "DMIC1_OUTPUT",
27 "TX SWR_DMIC1", "DMIC2_OUTPUT",
28 "TX SWR_DMIC2", "DMIC3_OUTPUT",
29 "TX SWR_DMIC3", "DMIC4_OUTPUT",
30 "TX SWR_DMIC4", "DMIC5_OUTPUT",
31 "TX SWR_DMIC5", "DMIC6_OUTPUT",
32 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
H A Dsc7280-crd-r3.dts104 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
H A Dsc7280-idp.dtsi104 "TX SWR_ADC0", "ADC1_OUTPUT",
105 "TX SWR_ADC1", "ADC2_OUTPUT",
106 "TX SWR_ADC2", "ADC3_OUTPUT",
107 "TX SWR_DMIC0", "DMIC1_OUTPUT",
108 "TX SWR_DMIC1", "DMIC2_OUTPUT",
109 "TX SWR_DMIC2", "DMIC3_OUTPUT",
110 "TX SWR_DMIC3", "DMIC4_OUTPUT",
111 "TX SWR_DMIC4", "DMIC5_OUTPUT",
112 "TX SWR_DMIC5", "DMIC6_OUTPUT",
113 "TX SWR_DMIC6", "DMIC7_OUTPUT",
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Drenesas,dw-hdmi.txt1 Renesas Gen3 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
15 - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
16 - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
17 - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX
18 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
19 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
20 - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX
21 - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
[all …]
H A Drenesas,dw-hdmi.yaml7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
29 - renesas,r8a77965-hdmi # for R-Car M3-N compatible HDMI TX
H A Ddw_hdmi.txt1 Synopsys DesignWare HDMI TX Encoder
5 TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
13 - reg: Memory mapped base address and length of the DWC HDMI TX registers.
19 - interrupts: Reference to the DWC HDMI TX interrupt.
24 - clock-names: The DWC HDMI TX uses the following clocks.
30 - ports: The connectivity of the DWC HDMI TX with the rest of the system is
H A Dsynopsys,dw-hdmi.yaml7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrel-ksz90x1.txt51 - txen-skew-ps : Skew control of TX CTL pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
57 - txd1-skew-ps : Skew control of TX data 1 pad
58 - txd2-skew-ps : Skew control of TX data 2 pad
59 - txd3-skew-ps : Skew control of TX data 3 pad
138 - txc-skew-ps : Skew control of TX clock pad
143 - txen-skew-ps : Skew control of TX CTL pad
148 - txd0-skew-ps : Skew control of TX data 0 pad
149 - txd1-skew-ps : Skew control of TX data 1 pad
150 - txd2-skew-ps : Skew control of TX data 2 pad
[all …]
H A Dxlnx,axi-ethernet.yaml13 segments of memory for buffering TX and RX, as well as the capability of
14 offloading TX/RX checksum calculation off the processor.
46 present DMA node should contains TX/RX DMA interrupts else DMA interrupt
73 TX checksum offload. 0 or empty for disabling TX checksum offload,
74 1 to enable partial TX checksum offload and 2 to enable full TX
113 from that device (DMA registers and DMA TX/RX interrupts) rather than
128 description: TX and RX DMA channel phandle
H A Dxilinx_axienet.txt7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
26 specified, the TX/RX DMA interrupts should be on that node
38 - xlnx,txcsum : 0 or empty for disabling TX checksum offload,
39 1 to enable partial TX checksum offload,
40 2 to enable full TX checksum offload
66 device (DMA registers and DMA TX/RX interrupts) rather
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dgoogle,sc7280-herobrine.yaml113 "TX SWR_ADC0", "ADC1_OUTPUT",
114 "TX SWR_ADC1", "ADC2_OUTPUT",
115 "TX SWR_ADC2", "ADC3_OUTPUT",
116 "TX SWR_DMIC0", "DMIC1_OUTPUT",
117 "TX SWR_DMIC1", "DMIC2_OUTPUT",
118 "TX SWR_DMIC2", "DMIC3_OUTPUT",
119 "TX SWR_DMIC3", "DMIC4_OUTPUT";
H A Dnvidia,tegra30-ahub.txt61 For TX CIFs, the numbers indicate the bit position within the AHUB routing
62 registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dste-dma40.txt60 bidirectional, i.e. the same for RX and TX operations:
111 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
112 50: Hash Accelerator 1 TX
113 51: memcpy TX (to be used by the DMA driver for memcpy operations)
124 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
125 63: Hash Accelerator 0 TX
H A Dstericsson,dma40.yaml71 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
72 50: Hash Accelerator 1 TX
73 51: memcpy TX (to be used by the DMA driver for memcpy operations)
84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
85 63: Hash Accelerator 0 TX
/freebsd/sys/dev/qat/qat_common/
H A Dadf_cfg_instance.c17 bundle->rings[i]->mode == TX) { in crypto_instance_init()
29 bundle->rings[i]->mode == TX) { in crypto_instance_init()
73 bundle->rings[i]->mode == TX) { in dc_instance_init()
105 bundle->rings[i]->mode == TX) { in asym_instance_init()
137 bundle->rings[i]->mode == TX) { in sym_instance_init()
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dstarfive,jh7110-syscrg.yaml24 - description: External I2S TX bit clock
25 - description: External I2S TX left/right channel clock
38 - description: External I2S TX bit clock
39 - description: External I2S TX left/right channel clock
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dqcom,pmic-typec.yaml39 - description: Power Domain Signal TX - HardReset or CableReset signal TX
41 - description: Power Domain TX complete
43 - description: Power Domain TX fail
44 - description: Power Domain TX message discard
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts236 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
249 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
250 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
285 "Bluetooth UART TX", "Bluetooth UART RX",
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.

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