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Searched refs:UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL (Results 1 – 1 of 1) sorted by relevance

/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c240 #define UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL(x) (((x) & 0xF) << 4) macro
598 reg &= ~UPHY_PLL_P0_CTL4_PLL0_REFCLK_SEL(~0); in uphy_pex_enable()