/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 80 const EVT *VTs; member 1105 : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs), 1109 assert(NumValues == VTs.NumVTs && 1533 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) { 2355 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2451 : MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) { 2622 VTs, AM, MemVT, MMO) { 2659 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2765 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2849 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { [all …]
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H A D | SelectionDAG.h | 105 const EVT *VTs; 113 FastID(ID), VTs(VT), NumVTs(Num) { 118 SDVTList result = {VTs, NumVTs}; 643 SDVTList getVTList(ArrayRef<EVT> VTs); 782 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 784 return getNode(ISD::CopyToReg, dl, VTs, 791 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 793 return getNode(ISD::CopyToReg, dl, VTs, 798 SDVTList VTs = getVTList(VT, MVT::Other); 800 return getNode(ISD::CopyFromReg, dl, VTs, Ops); [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 27 SDVTList VTs = Op == SystemZISD::CLC ? DAG.getVTList(MVT::i32, MVT::Other) in createMemMemNode() local 34 return DAG.getNode(Op, DL, VTs, Ops); in createMemMemNode() 193 SDVTList VTs = DAG.getVTList(PtrVT, MVT::i32, MVT::Other); in EmitTargetCodeForMemchr() local 199 SDValue End = DAG.getNode(SystemZISD::SEARCH_STRING, DL, VTs, Chain, in EmitTargetCodeForMemchr() 218 SDVTList VTs = DAG.getVTList(Dest.getValueType(), MVT::Other); in EmitTargetCodeForStrcpy() local 219 SDValue EndDest = DAG.getNode(SystemZISD::STPCPY, DL, VTs, Chain, Dest, Src, in EmitTargetCodeForStrcpy() 228 SDVTList VTs = DAG.getVTList(Src1.getValueType(), MVT::i32, MVT::Other); in EmitTargetCodeForStrcmp() local 230 SDValue Unused = DAG.getNode(SystemZISD::STRCMP, DL, VTs, Chain, Src2, Src1, in EmitTargetCodeForStrcmp() 247 SDVTList VTs = DAG.getVTList(PtrVT, MVT::i32, MVT::Other); in getBoundedStrlen() local 248 SDValue End = DAG.getNode(SystemZISD::SEARCH_STRING, DL, VTs, Chain, in getBoundedStrlen()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 88 SDVTList Res = {VTs, NumVTs}; in makeVTList() 685 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes() 8317 SmallVector<EVT, 4> VTs; in getMergeValues() local 8318 VTs.reserve(Ops.size()); in getMergeValues() 9855 assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() && in getNode() 9895 assert(VTList.VTs[0].isInteger() && VTList.VTs[0] == VTList.VTs[1] && in getNode() 9925 assert(VTList.VTs[0].isFloatingPoint() && VTList.VTs[1].isInteger() && in getNode() 10394 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { in MorphNodeTo() 10406 N->ValueList = VTs.VTs; in MorphNodeTo() 10582 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; in getMachineNode() [all …]
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H A D | SelectionDAGISel.cpp | 2311 const EVT VTs[] = {MVT::Other, MVT::Glue}; in Select_INLINEASM() local 3925 SmallVector<EVT, 4> VTs; in SelectCodeCommon() local 3931 VTs.push_back(VT); in SelectCodeCommon() 3935 VTs.push_back(MVT::Other); in SelectCodeCommon() 3937 VTs.push_back(MVT::Glue); in SelectCodeCommon() 3942 if (VTs.size() == 1) in SelectCodeCommon() 3943 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon() 3944 else if (VTs.size() == 2) in SelectCodeCommon() 3945 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon() 3947 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon() [all …]
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H A D | ScheduleDAGSDNodes.cpp | 143 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs, in CloneNodeWithValues() argument 149 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() 178 SmallVector<EVT, 4> VTs(N->values()); in AddGlue() local 180 VTs.push_back(MVT::Glue); in AddGlue() 182 CloneNodeWithValues(N, DAG, VTs, Glue); in AddGlue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/Utils/ |
H A D | WebAssemblyTypeUtilities.cpp | 66 const ArrayRef<MVT> &VTs) { in wasmSymbolSetType() argument 83 } else if (VTs.size() == 1) { in wasmSymbolSetType() 84 ValTy = WebAssembly::toValType(VTs[0]); in wasmSymbolSetType()
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H A D | WebAssemblyTypeUtilities.h | 63 const ArrayRef<MVT> &VTs);
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFSelectionDAGInfo.cpp | 35 SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Glue); in EmitTargetCodeForMemcpy() local 37 Dst = DAG.getNode(BPFISD::MEMCPY, dl, VTs, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyMachineFunctionInfo.cpp | 45 SmallVector<EVT, 4> VTs; in computeLegalValueVTs() local 46 ComputeValueVTs(TLI, DL, Ty, VTs); in computeLegalValueVTs() 48 for (EVT VT : VTs) { in computeLegalValueVTs()
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H A D | WebAssemblyMCInstLower.cpp | 59 SmallVector<MVT, 1> VTs; in GetGlobalAddressSymbol() local 60 computeLegalValueVTs(CurrentFunc, TM, GlobalVT, VTs); in GetGlobalAddressSymbol() 62 WebAssembly::wasmSymbolSetType(WasmSym, GlobalVT, VTs); in GetGlobalAddressSymbol()
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H A D | WebAssemblyAsmPrinter.cpp | 185 SmallVector<MVT, 1> VTs; in emitGlobalVariable() local 195 GV->getParent()->getDataLayout(), GlobalVT, VTs); in emitGlobalVariable() 197 WebAssembly::wasmSymbolSetType(Sym, GlobalVT, VTs); in emitGlobalVariable()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.h | 333 SmallVector<ValueTypeByHwMode, 4> VTs; variable 361 ArrayRef<ValueTypeByHwMode> getValueTypes() const { return VTs; } in getValueTypes() 362 unsigned getNumValueTypes() const { return VTs.size(); } in getNumValueTypes() 366 if (VTNum < VTs.size()) in getValueTypeNum() 367 return VTs[VTNum]; in getValueTypeNum()
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H A D | DAGISelMatcher.cpp | 301 for (unsigned i = 0, e = VTs.size(); i != e; ++i) in printImpl() 302 OS << ' ' << getEnumName(VTs[i]); in printImpl() 324 return &M->CGI == &CGI && M->VTs == VTs && M->Operands == Operands && in isEqualImpl()
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H A D | CallingConvEmitter.cpp | 133 ListInit *VTs = Action->getValueAsListInit("VTs"); in EmitAction() local 134 for (unsigned i = 0, e = VTs->size(); i != e; ++i) { in EmitAction() 135 Record *VT = VTs->getElementAsRecord(i); in EmitAction()
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H A D | DAGISelMatcher.h | 1028 const SmallVector<MVT::SimpleValueType, 3> VTs; variable 1043 VTs(vts.begin(), vts.end()), Operands(operands.begin(), operands.end()), in EmitNodeMatcherCommon() 1049 unsigned getNumVTs() const { return VTs.size(); } in getNumVTs() 1051 assert(i < VTs.size()); in getVT() 1052 return VTs[i]; in getVT() 1061 const SmallVectorImpl<MVT::SimpleValueType> &getVTList() const { return VTs; } in getVTList()
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H A D | DAGISelMatcherOpt.cpp | 125 const SmallVectorImpl<MVT::SimpleValueType> &VTs = EN->getVTList(); in ContractNodes() local 128 EN->getInstruction(), VTs, Operands, EN->hasChain(), in ContractNodes()
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H A D | RegisterInfoEmitter.cpp | 1239 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc() 1289 std::vector<MVT::SimpleValueType> VTs; in runTargetDesc() local 1290 for (const ValueTypeByHwMode &VVT : RC.VTs) in runTargetDesc() 1292 VTs.push_back(VVT.get(M).SimpleTy); in runTargetDesc() 1293 OS << ", /*VTLists+*/" << VTSeqs.get(VTs) << " }, // " in runTargetDesc()
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H A D | CodeGenRegisters.cpp | 752 VTs.push_back(getValueTypeByHwMode(Type, RegBank.getHwModes())); in CodeGenRegisterClass() 792 assert((RSI.hasDefault() || Size != 0 || VTs[0].isSimple()) && in CodeGenRegisterClass() 797 : VTs[0].getSimple().getSizeInBits(); in CodeGenRegisterClass() 847 VTs = Super.VTs; in inheritProperties() 869 if (llvm::is_contained(VTs, VT)) in hasType() 880 for (const ValueTypeByHwMode &OurVT : VTs) { in hasType()
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H A D | CodeGenTarget.cpp | 393 if (!llvm::is_contained(SubClassWithSubReg->VTs, ValueTy)) in getSuperRegForSubReg() 460 llvm::append_range(LegalValueTypes, RC.VTs); in ReadLegalValueTypes()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 479 VTs = CurDAG->getVTList(SBBVT, MVT::i32); in getSBBZero() 481 CurDAG->getMachineNode(Opc, dl, VTs, in getSBBZero() 1441 SDVTList VTs = CurDAG->getVTList(MVT::Other); in PreprocessISelDAG() local 1461 X86ISD::FLD, dl, VTs, Ops, MemVT, MPI, in PreprocessISelDAG() 4178 SDVTList VTs = CurDAG->getVTList(VT, MVT::i32); in emitPCMPISTR() local 5448 SDVTList VTs; in Select() local 5465 SDVTList VTs; in Select() local 5467 VTs = CurDAG->getVTList(NVT, MVT::i32); in Select() 5469 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32); in Select() 5561 SDVTList VTs = CurDAG->getVTList(NVT); in Select() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1607 SDVTList VTs; in lowerOverflowArithmetic() local 1609 VTs = DAG.getVTList(VT); in lowerOverflowArithmetic() 1612 VTs = DAG.getVTList(VT, MVT::i8); in lowerOverflowArithmetic() 1614 SDValue Arith = DAG.getNode(BaseOp, DL, VTs, LHS, RHS); in lowerOverflowArithmetic() 2073 SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i8); in EmitTest() local 2076 SDValue New = DAG.getNode(Opcode, DL, VTs, Ops); in EmitTest() 2297 DAG.getNode(M68kISD::SUB, DL, VTs, in LowerSELECT() 2423 return DAG.getNode(M68kISD::CMOV, DL, VTs, Ops); in LowerSELECT() 2614 SDVTList VTs = DAG.getVTList(VT, MVT::i8); in LowerADDC_ADDE_SUBC_SUBE() local 3606 SDVTList VTs = DAG.getVTList(VT, MVT::i32); in combineSUBX() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1777 SmallVector<EVT, 16> VTs; in LowerCall() local 1852 EVT EltVT = VTs[j]; in LowerCall() 2104 SmallVector<EVT, 16> VTs; in LowerCall() local 2123 EVT TheLoadType = VTs[i]; in LowerCall() 2139 if (VTs[i].isInteger()) in LowerCall() 3119 SmallVector<EVT, 16> VTs; in LowerFormalArguments() local 3122 if (VTs.empty()) in LowerFormalArguments() 3196 if (VTs.size() > 0) in LowerFormalArguments() 3241 SmallVector<EVT, 16> VTs; in LowerReturn() local 3250 VTs[i] = EVT(PromotedVT); in LowerReturn() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 224 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other, MVT::Glue); in EmitTargetCodeForMemcpy() local 232 Dst = DAG.getNode(ARMISD::MEMCPY, dl, VTs, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAGHVX.cpp | 2915 SDVTList VTs = CurDAG->getVTList(MVT::Other); in SelectV65GatherPred() local 2918 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops); in SelectV65GatherPred() 2954 SDVTList VTs = CurDAG->getVTList(MVT::Other); in SelectV65Gather() local 2956 SDNode *Result = CurDAG->getMachineNode(Opcode, dl, VTs, Ops); in SelectV65Gather() 2971 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v64i1); in SelectHVXDualOutput() local 2972 Result = CurDAG->getMachineNode(Hexagon::V6_vaddcarry, SDLoc(N), VTs, Ops); in SelectHVXDualOutput() 2978 SDVTList VTs = CurDAG->getVTList(MVT::v32i32, MVT::v128i1); in SelectHVXDualOutput() local 2979 Result = CurDAG->getMachineNode(Hexagon::V6_vaddcarry, SDLoc(N), VTs, Ops); in SelectHVXDualOutput() 2985 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v64i1); in SelectHVXDualOutput() local 2986 Result = CurDAG->getMachineNode(Hexagon::V6_vsubcarry, SDLoc(N), VTs, Ops); in SelectHVXDualOutput() [all …]
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