/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 798 Res = Xor(A, Or(Xor(A, C), B)); in simplifyTernarylogic() 845 Res = Xor(B, Or(A, Xor(B, C))); in simplifyTernarylogic() 924 Res = Xor(A, Or(Xor(A, B), C)); in simplifyTernarylogic() 978 Res = Xor(Or(Xor(B, C), A), C); in simplifyTernarylogic() 1061 Res = Xor(Nor(Xor(A, B), Xor(A, C)), A); in simplifyTernarylogic() 1065 Res = Xor(Or(Xor(A, B), C), B); in simplifyTernarylogic() 1073 Res = Xor(Or(Xor(A, C), B), C); in simplifyTernarylogic() 1113 Res = Or(Xor(A, B), Xor(A, C)); in simplifyTernarylogic() 1125 Res = Nor(Xor(A, B), Xor(A, C)); in simplifyTernarylogic() 1176 Res = Xor(Or(Xor(A, B), Xor(A, C)), A); in simplifyTernarylogic() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPatternsHVX.td | 399 def: OpR_RR_pat<V6_vxor, Xor, VecI8, HVI8>; 400 def: OpR_RR_pat<V6_vxor, Xor, VecI16, HVI16>; 401 def: OpR_RR_pat<V6_vxor, Xor, VecI32, HVI32>; 803 def: OpR_RR_pat<V6_pred_xor, Xor, VecQ8, HQ8>; 804 def: OpR_RR_pat<V6_pred_xor, Xor, VecQ16, HQ16>; 805 def: OpR_RR_pat<V6_pred_xor, Xor, VecQ32, HQ32>; 826 def: AccRRR_pat<V6_veqb_xor, Xor, seteq, HQ8, HVI8, HVI8>; 829 def: AccRRR_pat<V6_veqh_xor, Xor, seteq, HQ16, HVI16, HVI16>; 832 def: AccRRR_pat<V6_veqw_xor, Xor, seteq, HQ32, HVI32, HVI32>; 836 def: AccRRR_pat<V6_vgtb_xor, Xor, setgt, HQ8, HVI8, HVI8>; [all …]
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H A D | HexagonLoopIdiomRecognition.cpp | 1003 case Instruction::Xor: in isPromotableTo() 1254 case Instruction::Xor: in commutesWithShift() 1289 case Instruction::Xor: in keepsHighBitsZero() 1590 case Instruction::Xor: in hasZeroSignBit() 1612 case Instruction::Xor: in setupPreSimplifier() 1625 if (I->getOpcode() != Instruction::Xor) in setupPreSimplifier() 1708 case Instruction::Xor: in setupPreSimplifier() 1726 case Instruction::Xor: in setupPreSimplifier() 1753 Instruction *Xor = dyn_cast<Instruction>(I->getOperand(0)); in setupPostSimplifier() local 1755 if (!Xor || !C0) in setupPostSimplifier() [all …]
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H A D | HexagonPatterns.td | 607 def: OpR_RR_pat<C2_xor, Xor, i1, I1>; 634 defm: BoolvOpR_RR_pat<C2_xor, Xor>; 1506 def: OpR_RR_pat<A2_xor, Xor, i32, I32>; 1511 def: OpR_RR_pat<A2_xorp, Xor, i64, I64>; 1526 def: OpR_RR_pat<A2_xor, Xor, v4i8, V4I8>; 1529 def: OpR_RR_pat<A2_xor, Xor, v2i16, V2I16>; 1533 def: OpR_RR_pat<A2_xorp, Xor, v8i8, V8I8>; 1536 def: OpR_RR_pat<A2_xorp, Xor, v4i16, V4I16>; 1539 def: OpR_RR_pat<A2_xorp, Xor, v2i32, V2I32>; 1696 def: AccRRR_pat<M2_xor_xacc, Xor, Su<Xor>, I32, I32, I32>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineNegator.cpp | 175 case Instruction::Xor: in visitImpl() 441 case Instruction::Xor: { in visitImpl() 447 Value *Xor = Builder.CreateXor(Ops[0], ConstantExpr::getNot(C)); in visitImpl() local 448 return Builder.CreateAdd(Xor, ConstantInt::get(Xor->getType(), 1), in visitImpl()
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H A D | InstCombineAndOrXor.cpp | 1474 case Instruction::Xor: in foldLogicOfIsFPClass() 1911 Value *Xor = Builder.CreateXor(B, C); in foldComplexAndOrPatterns() local 1921 Value *Xor = Builder.CreateXor(A, C); in foldComplexAndOrPatterns() local 2067 case Instruction::Xor: in canonicalizeLogicFirst() 2208 return Xor; in visitAnd() 2310 case Instruction::Xor: in visitAnd() 3365 return Xor; in visitOr() 4176 assert(Xor.getOpcode() == Instruction::Xor && "Expected an xor instruction."); in canonicalizeAbs() 4182 Value *Op0 = Xor.getOperand(0), *Op1 = Xor.getOperand(1); in canonicalizeAbs() 4186 Type *Ty = Xor.getType(); in canonicalizeAbs() [all …]
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H A D | InstCombineAtomicRMW.cpp | 43 case AtomicRMWInst::Xor: in isIdempotentRMW()
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H A D | InstCombineInternal.h | 404 Value *foldXorOfICmps(ICmpInst *LHS, ICmpInst *RHS, BinaryOperator &Xor); 667 Instruction *foldICmpXorConstant(ICmpInst &Cmp, BinaryOperator *Xor, 691 Instruction *foldICmpXorShiftConst(ICmpInst &Cmp, BinaryOperator *Xor,
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Instruction.h | 289 return Opcode == And || Opcode == Or || Opcode == Xor; 664 return Opcode == And || Opcode == Or || Opcode == Xor || 680 case And: case Or: case Xor: 709 return Opcode == Xor;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUAtomicOptimizer.cpp | 200 case AtomicRMWInst::Xor: in visitAtomicRMWInst() 284 Op = AtomicRMWInst::Xor; in visitIntrinsicInst() 366 case AtomicRMWInst::Xor: in buildNonAtomicBinOp() 367 return B.CreateBinOp(Instruction::Xor, LHS, RHS); in buildNonAtomicBinOp() 647 case AtomicRMWInst::Xor: in getIdentityValueForAtomicOp() 841 case AtomicRMWInst::Xor: in optimizeAtomic() 978 case AtomicRMWInst::Xor: in optimizeAtomic()
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H A D | SILowerControlFlow.cpp | 253 MachineInstr *Xor = nullptr; in emitIf() local 255 Xor = in emitIf() 259 setImpSCCDefDead(*Xor, ImpDefSCC.isDead()); in emitIf() 291 LIS->InsertMachineInstrInMaps(*Xor); in emitIf() 335 MachineInstr *Xor = in emitElse() local 359 LIS->InsertMachineInstrInMaps(*Xor); in emitElse()
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H A D | SIOptimizeExecMasking.cpp | 774 MachineInstr *Xor = nullptr; in optimizeOrSaveexecXorSequences() local 775 std::tie(Or, Xor) = Pair; in optimizeOrSaveexecXorSequences() 781 Xor->eraseFromParent(); in optimizeOrSaveexecXorSequences()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanAnalysis.cpp | 80 case Instruction::Xor: { in inferScalarTypeForRecipe() 146 case Instruction::Xor: { in inferScalarTypeForRecipe()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | IVDescriptors.cpp | 48 case RecurKind::Xor: in isIntegerRecurrenceKind() 785 case Instruction::Xor: in isRecurrenceInstr() 786 return InstDesc(Kind == RecurKind::Xor, I); in isRecurrenceInstr() 872 if (AddReductionVar(Phi, RecurKind::Xor, TheLoop, FMF, RedDes, DB, AC, DT, in isReductionPHI() 1041 case RecurKind::Xor: in getRecurrenceIdentity() 1107 case RecurKind::Xor: in getOpcode() 1108 return Instruction::Xor; in getOpcode()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetTransformInfo.cpp | 167 case Instruction::Xor: in getIntImmCostInst() 484 if (Opcode == Instruction::Xor) { in getArithmeticInstrCost() 490 I->getOpcode() == Instruction::Xor)) in getArithmeticInstrCost() 500 if ((I->hasOneUse() && I->getOpcode() == Instruction::Xor) && in getArithmeticInstrCost() 513 if (Opcode == Instruction::Xor && ScalarBits == 1) { in getArithmeticInstrCost() 1125 case Instruction::Xor: in isFoldableLoad()
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H A D | SystemZTDC.cpp | 109 LI->getOpcode() == Instruction::Xor)) { in converted() 307 case Instruction::Xor: in convertLogicOp()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | TruncInstCombine.cpp | 62 case Instruction::Xor: in getRelevantOperands() 141 case Instruction::Xor: in buildTruncExpressionGraph() 431 case Instruction::Xor: in ReduceExpressionGraph()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LowerExpectIntrinsic.cpp | 160 if (!BinOp || BinOp->getOpcode() != Instruction::Xor) in handlePhiDef() 176 case Instruction::Xor: in handlePhiDef()
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H A D | SpeculativeExecution.cpp | 226 case Instruction::Xor: in ComputeSpeculationCost()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | LowerAtomic.cpp | 58 case AtomicRMWInst::Xor: in buildAtomicRMWValue()
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/freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
H A D | Operations.cpp | 31 Ops.push_back(binOpDescriptor(1, Instruction::Xor)); in describeFuzzerIntOps() 134 case Instruction::Xor: in binOpDescriptor()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCExpr.h | 510 Xor ///< Bitwise exclusive or. enumerator 620 return create(Xor, LHS, RHS, Ctx); in createXor()
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/freebsd/contrib/dialog/samples/copifuncs/ |
H A D | copi.ifmcfg2 | 30 # round brackets. Operators are: '!', '&', '|', 'Xor'.
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ExpandReductions.cpp | 44 return Instruction::Xor; in getOpcode()
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/freebsd/contrib/llvm-project/clang/include/clang/AST/ |
H A D | StmtVisitor.h | 135 BINOP_FALLBACK(And) BINOP_FALLBACK(Xor) BINOP_FALLBACK(Or) in BINOP_FALLBACK()
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