/freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
H A D | mtk-gce.txt | 12 - compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", 13 "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or 14 "mediatek,mt6779-gce". 41 defined in 'dt-bindings/gce/<chip>-gce.h'. 43 Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', 44 'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h' 45 'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or 46 'dt-bindings/gce/mt6779-gce.h'. 51 gce: gce@10212000 { 56 clock-names = "gce"; [all …]
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H A D | mediatek,gce-mailbox.yaml | 21 - mediatek,mt6779-gce 22 - mediatek,mt8173-gce 23 - mediatek,mt8183-gce 24 - mediatek,mt8186-gce 25 - mediatek,mt8188-gce 26 - mediatek,mt8192-gce 27 - mediatek,mt8195-gce 29 - const: mediatek,mt6795-gce 50 - const: gce 82 gce: mailbox@10212000 { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | mediatek,mdp3-rsz.yaml | 29 mediatek,gce-client-reg: 39 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 41 mediatek,gce-events: 44 to gce. The event id is defined in the gce header 45 include/dt-bindings/gce/<chip>-gce.h of each chips. 54 - mediatek,gce-client-reg 55 - mediatek,gce-events 63 #include <dt-bindings/gce/mt8183-gce.h> 68 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; 69 mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ0_SOF>, [all …]
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H A D | mediatek,mdp3-wrot.yaml | 29 mediatek,gce-client-reg: 37 description: The register of client driver can be configured by gce with 39 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 41 mediatek,gce-events: 44 to gce. The event id is defined in the gce header 45 include/dt-bindings/gce/<chip>-gce.h of each chips. 63 - mediatek,gce-client-reg 64 - mediatek,gce-events 75 #include <dt-bindings/gce/mt8183-gce.h> 82 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; [all …]
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H A D | mediatek,mdp3-rdma.yaml | 35 mediatek,gce-client-reg: 45 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 47 mediatek,gce-events: 50 to gce. The event id is defined in the gce header 51 include/dt-bindings/gce/<chip>-gce.h of each chips. 92 - mediatek,gce-client-reg 115 - mediatek,gce-events 132 - mediatek,gce-events 150 #include <dt-bindings/gce/mt8183-gce.h> 157 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; [all …]
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H A D | mediatek,mdp3-fg.yaml | 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, 28 such as gce node, subsys id, offset and register size. The subsys id that is 29 mapping to the register of display function blocks is defined in the gce header 30 include/dt-bindings/gce/<chip>-gce.h of each chips. 46 - mediatek,gce-client-reg 54 #include <dt-bindings/gce/mt8195-gce.h> 59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
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H A D | mediatek,mdp3-hdr.yaml | 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, 28 such as gce node, subsys id, offset and register size. The subsys id that is 29 mapping to the register of display function blocks is defined in the gce header 30 include/dt-bindings/gce/<chip>-gce.h of each chips. 46 - mediatek,gce-client-reg 54 #include <dt-bindings/gce/mt8195-gce.h> 59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
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H A D | mediatek,mdp3-stitch.yaml | 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, 28 such as gce node, subsys id, offset and register size. The subsys id that is 29 mapping to the register of display function blocks is defined in the gce header 30 include/dt-bindings/gce/<chip>-gce.h of each chips. 46 - mediatek,gce-client-reg 54 #include <dt-bindings/gce/mt8195-gce.h> 59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
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H A D | mediatek,mdp3-tdshp.yaml | 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, 28 such as gce node, subsys id, offset and register size. The subsys id that is 29 mapping to the register of display function blocks is defined in the gce header 30 include/dt-bindings/gce/<chip>-gce.h of each chips. 46 - mediatek,gce-client-reg 54 #include <dt-bindings/gce/mt8195-gce.h> 59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
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H A D | mediatek,mdp3-tcc.yaml | 26 mediatek,gce-client-reg: 28 The register of display function block to be set by gce. There are 4 arguments, 29 such as gce node, subsys id, offset and register size. The subsys id that is 30 mapping to the register of display function blocks is defined in the gce header 31 include/dt-bindings/gce/<chip>-gce.h of each chips. 47 - mediatek,gce-client-reg 55 #include <dt-bindings/gce/mt8195-gce.h> 60 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
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/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/ |
H A D | mediatek,ccorr.yaml | 25 mediatek,gce-client-reg: 33 description: The register of client driver can be configured by gce with 35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 37 mediatek,gce-events: 40 to gce. The event id is defined in the gce header 41 include/dt-bindings/gce/<chip>-gce.h of each chips. 50 - mediatek,gce-client-reg 51 - mediatek,gce-events 59 #include <dt-bindings/gce/mt8183-gce.h> 64 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; [all …]
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H A D | mediatek,wdma.yaml | 26 mediatek,gce-client-reg: 34 description: The register of client driver can be configured by gce with 36 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 38 mediatek,gce-events: 41 to gce. The event id is defined in the gce header 42 include/dt-bindings/gce/<chip>-gce.h of each chips. 57 - mediatek,gce-client-reg 58 - mediatek,gce-events 68 #include <dt-bindings/gce/mt8183-gce.h> 75 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; [all …]
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H A D | mediatek,mutex.yaml | 56 mediatek,gce-events: 59 to gce. The event id is defined in the gce header 60 include/dt-bindings/gce/<chip>-gce.h of each chips. 63 mediatek,gce-client-reg: 71 description: The register of client driver can be configured by gce with 73 a client defined in the header include/dt-bindings/gce/<chip>-gce.h. 107 #include <dt-bindings/gce/mt8173-gce.h> 119 mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
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/freebsd/release/ |
H A D | Makefile.gce | 7 GCE_UPLOAD_TGTS= gce-check-depends \ 8 gce-do-package \ 9 gce-do-upload 13 GCE_UPLOAD_TGTS= gce-do-login 29 gce-upload: ${GCE_UPLOAD_TGTS} 31 gce-check-depends: 55 gce-do-login: 65 gce-do-package-${_FS}: 73 gce-do-upload-${_FS}: 85 gce-do-package: gce-do-package-${VMFS} [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/ |
H A D | mediatek,mmsys.yaml | 75 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml 79 mediatek,gce-client-reg: 81 The register of client driver can be configured by gce with 4 arguments 82 defined in this property, such as phandle of gce, subsys id, 85 register which is defined in the gce header 86 include/dt-bindings/gce/<chip>-gce.h. 106 #include <dt-bindings/gce/mt8173-gce.h> 114 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, 115 <&gce 1 CMDQ_THR_PRIO_HIGHEST>; 116 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
H A D | mediatek,mdp-rdma.yaml | 42 mediatek,gce-client-reg: 44 The register of display function block to be set by gce. There are 4 arguments, 45 such as gce node, subsys id, offset and register size. The subsys id that is 46 mapping to the register of display function blocks is defined in the gce header 47 include/dt-bindings/gce/<chip>-gce.h of each chips. 63 - mediatek,gce-client-reg 72 #include <dt-bindings/gce/mt8195-gce.h> 86 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
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H A D | mediatek,ccorr.yaml | 49 mediatek,gce-client-reg: 50 description: The register of client driver can be configured by gce with 51 4 arguments defined in this property, such as phandle of gce, subsys id, 53 defined in the header include/dt-bindings/gce/<chip>-gce.h. 71 #include <dt-bindings/gce/mt8183-gce.h> 83 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
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H A D | mediatek,dither.yaml | 50 mediatek,gce-client-reg: 51 description: The register of client driver can be configured by gce with 52 4 arguments defined in this property, such as phandle of gce, subsys id, 54 defined in the header include/dt-bindings/gce/<chip>-gce.h. 72 #include <dt-bindings/gce/mt8183-gce.h> 84 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
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H A D | mediatek,dsc.yaml | 41 mediatek,gce-client-reg: 43 The register of client driver can be configured by gce with 4 arguments 44 defined in this property, such as phandle of gce, subsys id, 47 register which is defined in the gce header 48 include/dt-bindings/gce/<chip>-gce.h. 66 #include <dt-bindings/gce/mt8195-gce.h> 78 mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x9000 0x1000>;
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H A D | mediatek,postmask.yaml | 47 mediatek,gce-client-reg: 48 description: The register of client driver can be configured by gce with 49 4 arguments defined in this property, such as phandle of gce, subsys id, 51 defined in the header include/dt-bindings/gce/<chip>-gce.h. 69 #include <dt-bindings/gce/mt8192-gce.h> 81 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
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H A D | mediatek,gamma.yaml | 54 mediatek,gce-client-reg: 55 description: The register of client driver can be configured by gce with 56 4 arguments defined in this property, such as phandle of gce, subsys id, 58 defined in the header include/dt-bindings/gce/<chip>-gce.h. 76 #include <dt-bindings/gce/mt8173-gce.h> 88 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
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H A D | mediatek,ovl-2l.yaml | 52 mediatek,gce-client-reg: 53 description: The register of client driver can be configured by gce with 54 4 arguments defined in this property, such as phandle of gce, subsys id, 56 defined in the header include/dt-bindings/gce/<chip>-gce.h. 75 #include <dt-bindings/gce/mt8183-gce.h> 89 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
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H A D | mediatek,wdma.yaml | 50 mediatek,gce-client-reg: 51 description: The register of client driver can be configured by gce with 52 4 arguments defined in this property, such as phandle of gce, subsys id, 54 defined in the header include/dt-bindings/gce/<chip>-gce.h. 73 #include <dt-bindings/gce/mt8173-gce.h> 87 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
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H A D | mediatek,aal.yaml | 56 mediatek,gce-client-reg: 57 description: The register of client driver can be configured by gce with 58 4 arguments defined in this property, such as phandle of gce, subsys id, 60 defined in the header include/dt-bindings/gce/<chip>-gce.h. 78 #include <dt-bindings/gce/mt8173-gce.h> 90 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
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H A D | mediatek,color.yaml | 59 mediatek,gce-client-reg: 60 description: The register of client driver can be configured by gce with 61 4 arguments defined in this property, such as phandle of gce, subsys id, 63 defined in the header include/dt-bindings/gce/<chip>-gce.h. 81 #include <dt-bindings/gce/mt8173-gce.h> 93 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
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