/freebsd/sys/arm/mv/ |
H A D | timer.c | 185 uint32_t irq_cause, irq_mask; in mv_timer_attach() local 243 irq_mask |= IRQ_TIMER0_MASK; in mv_timer_attach() 244 irq_mask &= ~IRQ_TIMER1_MASK; in mv_timer_attach() 386 uint32_t val, irq_cause, irq_mask; in mv_watchdog_enable_armv5() local 392 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_enable_armv5() 393 irq_mask |= IRQ_TIMER_WD_MASK; in mv_watchdog_enable_armv5() 394 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_watchdog_enable_armv5() 430 uint32_t val, irq_cause,irq_mask; in mv_watchdog_disable_armv5() local 440 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_disable_armv5() 441 irq_mask &= ~(IRQ_TIMER_WD_MASK); in mv_watchdog_disable_armv5() [all …]
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/freebsd/sys/arm/mv/armada/ |
H A D | wdt.c | 213 uint32_t val, irq_cause, irq_mask; in mv_wdt_enable_armv5() local 219 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_enable_armv5() 220 irq_mask |= IRQ_TIMER_WD_MASK; in mv_wdt_enable_armv5() 221 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_wdt_enable_armv5() 284 uint32_t val, irq_cause, irq_mask; in mv_wdt_disable_armv5() local 294 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_disable_armv5() 295 irq_mask &= ~(IRQ_TIMER_WD_MASK); in mv_wdt_disable_armv5() 296 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_wdt_disable_armv5()
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/ |
H A D | dma.c | 137 u32 irq_mask; in mt7996_dma_start() local 159 irq_mask = MT_INT_MCU_CMD; in mt7996_dma_start() 163 irq_mask = MT_INT_RX_DONE_MCU | MT_INT_TX_DONE_MCU; in mt7996_dma_start() 166 irq_mask |= MT_INT_BAND0_RX_DONE; in mt7996_dma_start() 169 irq_mask |= MT_INT_BAND1_RX_DONE; in mt7996_dma_start() 172 irq_mask |= MT_INT_BAND2_RX_DONE; in mt7996_dma_start() 175 mt7996_irq_enable(dev, irq_mask); in mt7996_dma_start()
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/freebsd/sys/dev/qat/qat_common/ |
H A D | adf_transport.c | 82 bank->irq_mask |= (1 << ring); in adf_enable_ring_irq() 86 bank->irq_mask); in adf_enable_ring_irq() 99 bank->irq_mask &= ~(1 << ring); in adf_disable_ring_irq() 103 bank->irq_mask); in adf_disable_ring_irq() 500 empty_rings = ~empty_rings & bank->irq_mask; in adf_ring_response_handler() 518 bank->irq_mask); in adf_response_handler() 582 u32 irq_mask = BIT(num_rings_per_bank) - 1; in adf_init_bank() local 636 csr_ops->write_csr_int_flag(csr_addr, bank_num, irq_mask); in adf_init_bank()
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H A D | adf_gen4vf_hw_csr_data.c | 127 get_bank_irq_mask(u32 irq_mask) in get_bank_irq_mask() argument
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/ |
H A D | dma.c | 257 u32 irq_mask; in mt7915_dma_start() local 297 irq_mask = MT_INT_RX_DONE_MCU | in mt7915_dma_start() 302 irq_mask |= MT_INT_BAND0_RX_DONE; in mt7915_dma_start() 305 irq_mask |= MT_INT_BAND1_RX_DONE; in mt7915_dma_start() 308 u32 wed_irq_mask = irq_mask; in mt7915_dma_start() 324 irq_mask = reset ? MT_INT_MCU_CMD : irq_mask; in mt7915_dma_start() 326 mt7915_irq_enable(dev, irq_mask); in mt7915_dma_start()
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/freebsd/sys/dev/dpaa2/ |
H A D | dpaa2_mac.c | 213 uint32_t irq_mask; in dpaa2_mac_setup_irq() local 251 irq_mask = in dpaa2_mac_setup_irq() 258 irq_mask); in dpaa2_mac_setup_irq()
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/freebsd/sys/dev/qat/include/common/ |
H A D | adf_transport_internal.h | 39 uint16_t irq_mask; member
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H A D | adf_accel_devices.h | 301 u32 (*get_bank_irq_mask)(u32 irq_mask);
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/freebsd/sys/contrib/dev/rtw88/ |
H A D | pci.c | 420 rtwpci->irq_mask[0] = IMR_HIGHDOK | in rtw_pci_init() 430 rtwpci->irq_mask[1] = IMR_TXFOVW | in rtw_pci_init() 432 rtwpci->irq_mask[3] = IMR_H2CDOK | in rtw_pci_init() 534 rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0] & ~imr0_unmask); in rtw_pci_enable_interrupt() 535 rtw_write32(rtwdev, RTK_PCI_HIMR1, rtwpci->irq_mask[1]); in rtw_pci_enable_interrupt() 537 rtw_write32(rtwdev, RTK_PCI_HIMR3, rtwpci->irq_mask[3]); in rtw_pci_enable_interrupt() 1186 irq_status[0] &= rtwpci->irq_mask[0]; in rtw_pci_irq_recognized() 1187 irq_status[1] &= rtwpci->irq_mask[1]; in rtw_pci_irq_recognized() 1188 irq_status[3] &= rtwpci->irq_mask[3]; in rtw_pci_irq_recognized()
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H A D | sdio.h | 153 u32 irq_mask; member
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H A D | pci.h | 213 u32 irq_mask[4]; member
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H A D | sdio.c | 652 rtwsdio->irq_mask = REG_SDIO_HIMR_RX_REQUEST | REG_SDIO_HIMR_CPWM1; in rtw_sdio_init() 683 rtw_write32(rtwdev, REG_SDIO_HIMR, rtwsdio->irq_mask); in rtw_sdio_enable_interrupt()
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/freebsd/sys/dev/sound/pci/ |
H A D | emu10kx.c | 364 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ member
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