Searched refs:isSGPRClass (Results 1 – 13 of 13) sorted by relevance
198 static bool isSGPRClass(const TargetRegisterClass *RC) { in isSGPRClass() function204 return isSGPRClass(getRegClass(RCID)); in isSGPRClassID()306 return !isSGPRClass(RC); in isDivergentRegClass()
212 return SrcRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(DstRC) && in isVGPRToSGPRCopy()219 return DstRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(SrcRC) && in isSGPRToVGPRCopy()271 if (!TRI->isSGPRClass(MRI.getRegClass(DstReg))) in foldVGPRCopyIntoRegSequence()315 assert(TRI->isSGPRClass(SrcRC) && in foldVGPRCopyIntoRegSequence()658 if (TRI->isSGPRClass(TII->getOpRegClass(MI, 0))) { in runOnMachineFunction()
1052 if (RI.isSGPRClass(RC)) { in copyPhysReg()1053 if (!RI.isSGPRClass(SrcRC)) { in copyPhysReg()1202 if (RI.isSGPRClass(RegClass)) { in materializeImmediate()1735 if (RI.isSGPRClass(RC)) { in storeRegToStackSlot()1962 if (RI.isSGPRClass(RC)) { in loadRegFromStackSlot()3205 return RI.isSGPRClass(RC); in canInsertSelect()5514 else if (RI.isSGPRClass(RC)) in legalizeOpWithMove()7733 if (RI.isSGPRClass(Src0SubRC)) in splitScalarSMulU64()7737 if (RI.isSGPRClass(Src1SubRC)) in splitScalarSMulU64()7842 if (RI.isSGPRClass(Src0SubRC)) in splitScalarSMulPseudo()[all …]
232 if ((RC->MC->getSizeInBits() != 64 || !TRI->isSGPRClass(RC)) && in runOnMachineFunction()
84 return static_cast<const SIRegisterInfo &>(TRI).isSGPRClass(&RC); in onlyAllocateSGPRs()89 return !static_cast<const SIRegisterInfo &>(TRI).isSGPRClass(&RC); in onlyAllocateVGPRs()
43 return STI->isSGPRClass(RC) in getRegKind()
1216 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegBaseClass(MO.getReg()))) { in fixSMEMtoVectorWriteHazards()1302 if (MO.isDef() && TRI->isSGPRClass(TRI->getPhysRegBaseClass(MO.getReg()))) in fixVcmpxExecWARHazard()
876 if (!RC || !TRI->isSGPRClass(RC)) in isInlineAsmSourceOfDivergence()
2436 bool IsSALU = isSGPRClass(TII->getOpRegClass(*MI, FIOperandNum)); in eliminateFrameIndex()2868 return RC ? isSGPRClass(RC) : false; in isSGPRReg()
1518 return RC && TRI.isSGPRClass(RC); in IsCopyFromSGPR()3494 if (!RC || SIRI->isSGPRClass(RC)) in isVGPRImm()
4433 if (TII->getRegisterInfo().isSGPRClass(IdxRC)) { in emitIndirectSrc()4537 if (TII->getRegisterInfo().isSGPRClass(IdxRC)) { in emitIndirectDst()4611 bool isSGPR = TRI->isSGPRClass(MRI.getRegClass(SrcReg)); in lowerWaveReduce()15122 else if (SIRegisterInfo::isSGPRClass(RC)) in getRegForInlineAsmConstraint()15905 if (!TRI->isSGPRClass(RC) && !isDivergent) in getRegClassFor()15907 else if (TRI->isSGPRClass(RC) && isDivergent) in getRegClassFor()15984 if (RC && SIRI->isSGPRClass(RC)) in requiresUniformRegister()
294 if (TRI->isSGPRClass(&RC)) { in getRegBankFromRegClass()
169 bool IsSGPR = TRI.isSGPRClass(SrcRC); in selectCOPY()