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Searched refs:rtw_read32_mask (Results 1 – 13 of 13) sorted by relevance

/freebsd/sys/contrib/dev/rtw88/
H A Drtw8723d.c797 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_config_path_ctrl()
805 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_restore_path_ctrl()
984 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_tx_path()
1045 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_rx_path()
1104 rtw_read32_mask(rtwdev, REG_PAD_CTRL1, MASKBYTE3)); in rtw8723d_iqk_rx_path()
1348 rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_one_round()
1350 rtw_read32_mask(rtwdev, REG_IQK_RES_TY, BIT_MASK_RES_TY); in rtw8723d_iqk_one_round()
1365 rtw_read32_mask(rtwdev, REG_IQK_RES_RX, BIT_MASK_RES_RX); in rtw8723d_iqk_one_round()
1367 rtw_read32_mask(rtwdev, REG_IQK_RES_RY, BIT_MASK_RES_RY); in rtw8723d_iqk_one_round()
1387 rtw_read32_mask(rtwdev, REG_IQK_RES_TX, BIT_MASK_RES_TX); in rtw8723d_iqk_one_round()
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H A Drtw8822c.c293 temp = rtw_read32_mask(rtwdev, 0x2dbc, 0x3fffff); in rtw8822c_dac_cal_iq_sample()
346 temp = rtw_read32_mask(rtwdev, 0x2dbc, 0x3fffff); in rtw8822c_dac_cal_iq_search()
349 temp = rtw_read32_mask(rtwdev, 0x2dbc, 0x3fffff); in rtw8822c_dac_cal_iq_search()
696 val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_I_1, 0xf); in rtw8822c_dac_cal_backup_dck()
700 val = (u8)rtw_read32_mask(rtwdev, REG_DCKA_Q_1, 0xf); in rtw8822c_dac_cal_backup_dck()
1144 ret = read_poll_timeout(rtw_read32_mask, u4b_tmp, in rtw8822c_rfk_handshake()
1507 read_poll_timeout(rtw_read32_mask, val, in rtw8822c_txgapk_read_offset()
2264 igi = rtw_read32_mask(rtwdev, REG_RXIGI, 0x7f); in rtw8822c_toggle_igi()
4415 pd = rtw_read32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
4418 cs = rtw_read32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
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H A Drtw8821c.c123 swing = rtw_read32_mask(rtwdev, REG_TXSCALE_A, 0xffe00000); in rtw8821c_get_swing_index()
195 hal->ch_param[0] = rtw_read32_mask(rtwdev, REG_TXSF2, MASKDWORD); in rtw8821c_phy_set_param()
196 hal->ch_param[1] = rtw_read32_mask(rtwdev, REG_TXSF6, MASKDWORD); in rtw8821c_phy_set_param()
197 hal->ch_param[2] = rtw_read32_mask(rtwdev, REG_TXFILTER, MASKDWORD); in rtw8821c_phy_set_param()
436 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8821c_set_channel_bb()
449 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8821c_set_channel_bb()
458 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8821c_set_channel_bb()
467 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8821c_set_channel_bb()
476 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8821c_set_channel_bb()
767 reload = !!rtw_read32_mask(rtwdev, REG_IQKFAILMSK, BIT(16)); in rtw8821c_do_iqk()
[all …]
H A Drtw8822b.c114 swing = rtw_read32_mask(rtwdev, 0xc1c, 0xffe00000); in rtw8822b_get_swing_index()
579 igi = rtw_read32_mask(rtwdev, REG_RXIGI_A, 0x7f); in rtw8822b_toggle_igi()
662 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
675 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
683 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
696 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
705 val32 = rtw_read32_mask(rtwdev, REG_ADCCLK, MASKDWORD); in rtw8822b_set_channel_bb()
1125 reload = !!rtw_read32_mask(rtwdev, REG_IQKFAILMSK, BIT(16)); in rtw8822b_do_iqk()
1126 iqk_fail_mask = rtw_read32_mask(rtwdev, REG_IQKFAILMSK, GENMASK(7, 0)); in rtw8822b_do_iqk()
H A Dwow.c280 if (!rtw_read32_mask(rtwdev, REG_BCNQ_INFO, BIT_MGQ_CPU_EMPTY)) in rtw_wow_bb_stop()
325 ret = read_poll_timeout(rtw_read32_mask, check_dis, in rtw_wow_check_fw_status()
330 ret = read_poll_timeout(rtw_read32_mask, check_dis, in rtw_wow_check_fw_status()
H A Dutil.c14 if (rtw_read32_mask(rtwdev, addr, mask) == target) in check_hw_ready()
H A Dps.c133 if (rtw_read32_mask(rtwdev, REG_TCR, BIT_PWRMGT_HWDATA_EN) == 0) in __rtw_fw_leave_lps_check_reg()
H A Dhci.h188 rtw_read32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask) in rtw_read32_mask() function
H A Dphy.c217 dm_info->igi_history[0] = rtw_read32_mask(rtwdev, addr, mask); in rtw_phy_init()
911 val = rtw_read32_mask(rtwdev, direct_addr, mask); in rtw_phy_read_rf()
955 en_pi = rtw_read32_mask(rtwdev, rf_sipi_addr->hssi_1, BIT(8)); in rtw_phy_read_rf_sipi()
958 val32 = rtw_read32_mask(rtwdev, r_addr, LSSI_READ_DATA_MASK); in rtw_phy_read_rf_sipi()
H A Dfw.c206 rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_L2H_IDX].hw_reg.addr, in rtw_fw_adaptivity_result()
208 rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_H2L_IDX].hw_reg.addr, in rtw_fw_adaptivity_result()
212 rtw_read32_mask(rtwdev, REG_EDCCA_REPORT, BIT_EDCCA_FLAG) ? in rtw_fw_adaptivity_result()
H A Dmain.c2347 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); in rtw_swap_reg_mask()
2348 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); in rtw_swap_reg_mask()
H A Dpci.c1375 wflag = rtw_read32_mask(rtwdev, REG_PCIE_MIX_CFG, in rtw_mdio_write()
H A Dcoex.c3714 rtw_read32_mask(rtwdev, reg->addr, reg->mask)); in rtw_coex_val_info()