Searched refs:ECPP_INTR_MASK (Results 1 – 2 of 2) sorted by relevance
2226 ECR_mode_001 | ECPP_INTR_MASK | ECPP_INTR_SRV); in ecpp_srvioc()2236 ECR_mode_110 | ECPP_INTR_MASK | ECPP_INTR_SRV); in ecpp_srvioc()2855 ECPP_INTR_MASK | ECPP_INTR_SRV) != SUCCESS) { in ecpp_prep_pio_xfer()3421 ECR_WRITE(pp, ECR_READ(pp) | ECPP_INTR_MASK); in ecpp_nErr_ihdlr()3428 ECR_WRITE(pp, ECR_READ(pp) | ECPP_INTR_MASK); in ecpp_nErr_ihdlr()3934 ECPP_DMA_ENABLE | ECPP_INTR_MASK); in ecpp_fifo_timer()5013 ECPP_INTR_MASK | ECPP_INTR_SRV) == FAILURE) { in ecpp_mode_negotiation()5032 ECPP_INTR_MASK | ECPP_INTR_SRV) == FAILURE) { in ecpp_mode_negotiation()5503 ECPP_INTR_MASK | ECPP_INTR_SRV) == FAILURE) { in pc87332_config_chip()5593 ECPP_INTR_MASK | ECPP_INTR_SRV) == FAILURE) { in pc97317_config_chip()[all …]
178 #define ECPP_INTR_MASK 0x10 /* intr-enable nErr mask=1 */ macro