1 #ifndef __5710_HSI_VBD__ 2 #define __5710_HSI_VBD__ 3 4 /* 5 * attention bits $$KEEP_ENDIANNESS$$ 6 */ 7 struct atten_sp_status_block 8 { 9 u32_t attn_bits /* 16 bit of attention signal lines */; 10 u32_t attn_bits_ack /* 16 bit of attention signal ack */; 11 u8_t status_block_id /* status block id */; 12 u8_t reserved0 /* resreved for padding */; 13 u16_t attn_bits_index /* attention bits running index */; 14 u32_t reserved1 /* resreved for padding */; 15 }; 16 17 18 /* 19 * The eth aggregative context of Cstorm 20 */ 21 struct cstorm_eth_ag_context 22 { 23 u32_t __reserved0[10]; 24 }; 25 26 27 /* 28 * The iscsi aggregative context of Cstorm 29 */ 30 struct cstorm_iscsi_ag_context 31 { 32 u32_t agg_vars1; 33 #define CSTORM_ISCSI_AG_CONTEXT_STATE (0xFF<<0) /* BitField agg_vars1Various aggregative variables The state of the connection */ 34 #define CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT 0 35 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<8) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 36 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 8 37 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<9) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 38 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 9 39 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<10) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 40 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 10 41 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<11) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 42 #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 11 43 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN (0x1<<12) /* BitField agg_vars1Various aggregative variables ULP Rx SE counter flag enable */ 44 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12 45 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13) /* BitField agg_vars1Various aggregative variables ULP Rx invalidate counter flag enable */ 46 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13 47 #define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<14) /* BitField agg_vars1Various aggregative variables Aux 4 counter flag */ 48 #define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 14 49 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16) /* BitField agg_vars1Various aggregative variables The connection QOS */ 50 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16 51 #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18) /* BitField agg_vars1Various aggregative variables Enable decision rule for fin_received_cf */ 52 #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18 53 #define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<19) /* BitField agg_vars1Various aggregative variables Enable decision rule for auxiliary counter flag 1 */ 54 #define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 19 55 #define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN (0x1<<20) /* BitField agg_vars1Various aggregative variables Enable decision rule for auxiliary counter flag 2 */ 56 #define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN_SHIFT 20 57 #define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<21) /* BitField agg_vars1Various aggregative variables Enable decision rule for auxiliary counter flag 3 */ 58 #define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 21 59 #define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<22) /* BitField agg_vars1Various aggregative variables Enable decision rule for auxiliary counter flag 4 */ 60 #define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 22 61 #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23) /* BitField agg_vars1Various aggregative variables 0-NOP, 1-EQ, 2-NEQ, 3-GT, 4-GE, 5-LS, 6-LE */ 62 #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23 63 #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26) /* BitField agg_vars1Various aggregative variables 0-NOP, 1-EQ, 2-NEQ */ 64 #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT 26 65 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52 (0x3<<28) /* BitField agg_vars1Various aggregative variables 0-NOP, 1-EQ, 2-NEQ */ 66 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52_SHIFT 28 67 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53 (0x3<<30) /* BitField agg_vars1Various aggregative variables 0-NOP, 1-EQ, 2-NEQ */ 68 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53_SHIFT 30 69 #if defined(__BIG_ENDIAN) 70 u8_t __aux1_th /* Aux1 threhsold for the decision */; 71 u8_t __aux1_val /* Aux1 aggregation value */; 72 u16_t __agg_vars2 /* Various aggregative variables*/; 73 #elif defined(__LITTLE_ENDIAN) 74 u16_t __agg_vars2 /* Various aggregative variables*/; 75 u8_t __aux1_val /* Aux1 aggregation value */; 76 u8_t __aux1_th /* Aux1 threhsold for the decision */; 77 #endif 78 u32_t rel_seq /* The sequence to release */; 79 u32_t rel_seq_th /* The threshold for the released sequence */; 80 #if defined(__BIG_ENDIAN) 81 u16_t hq_cons /* The HQ Consumer */; 82 u16_t hq_prod /* The HQ producer */; 83 #elif defined(__LITTLE_ENDIAN) 84 u16_t hq_prod /* The HQ producer */; 85 u16_t hq_cons /* The HQ Consumer */; 86 #endif 87 #if defined(__BIG_ENDIAN) 88 u8_t __reserved62 /* Mask value for the decision algorithm of the general flags */; 89 u8_t __reserved61 /* General flags */; 90 u8_t __reserved60 /* ORQ consumer updated by the completor */; 91 u8_t __reserved59 /* ORQ ULP Rx consumer */; 92 #elif defined(__LITTLE_ENDIAN) 93 u8_t __reserved59 /* ORQ ULP Rx consumer */; 94 u8_t __reserved60 /* ORQ consumer updated by the completor */; 95 u8_t __reserved61 /* General flags */; 96 u8_t __reserved62 /* Mask value for the decision algorithm of the general flags */; 97 #endif 98 #if defined(__BIG_ENDIAN) 99 u16_t __reserved64 /* RQ consumer kept by the completor */; 100 u16_t cq_u_prod /* Ustorm producer of CQ */; 101 #elif defined(__LITTLE_ENDIAN) 102 u16_t cq_u_prod /* Ustorm producer of CQ */; 103 u16_t __reserved64 /* RQ consumer kept by the completor */; 104 #endif 105 u32_t __cq_u_prod1 /* Ustorm producer of CQ 1 */; 106 #if defined(__BIG_ENDIAN) 107 u16_t __agg_vars3 /* Various aggregative variables*/; 108 u16_t cq_u_pend /* Ustorm pending completions of CQ */; 109 #elif defined(__LITTLE_ENDIAN) 110 u16_t cq_u_pend /* Ustorm pending completions of CQ */; 111 u16_t __agg_vars3 /* Various aggregative variables*/; 112 #endif 113 #if defined(__BIG_ENDIAN) 114 u16_t __aux2_th /* Aux2 threhsold for the decision */; 115 u16_t aux2_val /* Aux2 aggregation value */; 116 #elif defined(__LITTLE_ENDIAN) 117 u16_t aux2_val /* Aux2 aggregation value */; 118 u16_t __aux2_th /* Aux2 threhsold for the decision */; 119 #endif 120 }; 121 122 123 /* 124 * The toe aggregative context of Cstorm 125 */ 126 struct cstorm_toe_ag_context 127 { 128 u32_t __agg_vars1 /* Various aggregative variables*/; 129 #if defined(__BIG_ENDIAN) 130 u8_t __aux1_th /* Aux1 threhsold for the decision */; 131 u8_t __aux1_val /* Aux1 aggregation value */; 132 u16_t __agg_vars2 /* Various aggregative variables*/; 133 #elif defined(__LITTLE_ENDIAN) 134 u16_t __agg_vars2 /* Various aggregative variables*/; 135 u8_t __aux1_val /* Aux1 aggregation value */; 136 u8_t __aux1_th /* Aux1 threhsold for the decision */; 137 #endif 138 u32_t rel_seq /* The sequence to release */; 139 u32_t __rel_seq_threshold /* The threshold for the released sequence */; 140 #if defined(__BIG_ENDIAN) 141 u16_t __reserved58 /* The HQ Consumer */; 142 u16_t bd_prod /* The HQ producer */; 143 #elif defined(__LITTLE_ENDIAN) 144 u16_t bd_prod /* The HQ producer */; 145 u16_t __reserved58 /* The HQ Consumer */; 146 #endif 147 #if defined(__BIG_ENDIAN) 148 u8_t __reserved62 /* Mask value for the decision algorithm of the general flags */; 149 u8_t __reserved61 /* General flags */; 150 u8_t __reserved60 /* ORQ consumer updated by the completor */; 151 u8_t __completion_opcode /* ORQ ULP Rx consumer */; 152 #elif defined(__LITTLE_ENDIAN) 153 u8_t __completion_opcode /* ORQ ULP Rx consumer */; 154 u8_t __reserved60 /* ORQ consumer updated by the completor */; 155 u8_t __reserved61 /* General flags */; 156 u8_t __reserved62 /* Mask value for the decision algorithm of the general flags */; 157 #endif 158 #if defined(__BIG_ENDIAN) 159 u16_t __reserved64 /* RQ consumer kept by the completor */; 160 u16_t __reserved63 /* RQ consumer updated by the ULP RX */; 161 #elif defined(__LITTLE_ENDIAN) 162 u16_t __reserved63 /* RQ consumer updated by the ULP RX */; 163 u16_t __reserved64 /* RQ consumer kept by the completor */; 164 #endif 165 u32_t snd_max /* The ACK sequence number received in the last completed DDP */; 166 #if defined(__BIG_ENDIAN) 167 u16_t __agg_vars3 /* Various aggregative variables*/; 168 u16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the the USTORM encountered */; 169 #elif defined(__LITTLE_ENDIAN) 170 u16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the the USTORM encountered */; 171 u16_t __agg_vars3 /* Various aggregative variables*/; 172 #endif 173 #if defined(__BIG_ENDIAN) 174 u16_t __aux2_th /* Aux2 threhsold for the decision */; 175 u16_t __aux2_val /* Aux2 aggregation value */; 176 #elif defined(__LITTLE_ENDIAN) 177 u16_t __aux2_val /* Aux2 aggregation value */; 178 u16_t __aux2_th /* Aux2 threhsold for the decision */; 179 #endif 180 }; 181 182 183 /* 184 * dmae command structure 185 */ 186 struct dmae_cmd 187 { 188 u32_t opcode; 189 #define DMAE_CMD_SRC (0x1<<0) /* BitField opcode Whether the source is the PCIe or the GRC. 0- The source is the PCIe 1- The source is the GRC. */ 190 #define DMAE_CMD_SRC_SHIFT 0 191 #define DMAE_CMD_DST (0x3<<1) /* BitField opcode The destination of the DMA can be: 0-None 1-PCIe 2-GRC 3-None */ 192 #define DMAE_CMD_DST_SHIFT 1 193 #define DMAE_CMD_C_DST (0x1<<3) /* BitField opcode The destination of the completion: 0-PCIe 1-GRC */ 194 #define DMAE_CMD_C_DST_SHIFT 3 195 #define DMAE_CMD_C_TYPE_ENABLE (0x1<<4) /* BitField opcode Whether to write a completion word to the completion destination: 0-Do not write a completion word 1-Write the completion word */ 196 #define DMAE_CMD_C_TYPE_ENABLE_SHIFT 4 197 #define DMAE_CMD_C_TYPE_CRC_ENABLE (0x1<<5) /* BitField opcode Whether to write a CRC word to the completion destination 0-Do not write a CRC word 1-Write a CRC word */ 198 #define DMAE_CMD_C_TYPE_CRC_ENABLE_SHIFT 5 199 #define DMAE_CMD_C_TYPE_CRC_OFFSET (0x7<<6) /* BitField opcode The CRC word should be taken from the DMAE GRC space from address 9+X, where X is the value in these bits. */ 200 #define DMAE_CMD_C_TYPE_CRC_OFFSET_SHIFT 6 201 #define DMAE_CMD_ENDIANITY (0x3<<9) /* BitField opcode swapping mode. */ 202 #define DMAE_CMD_ENDIANITY_SHIFT 9 203 #define DMAE_CMD_PORT (0x1<<11) /* BitField opcode Which network port ID to present to the PCI request interface */ 204 #define DMAE_CMD_PORT_SHIFT 11 205 #define DMAE_CMD_CRC_RESET (0x1<<12) /* BitField opcode reset crc result */ 206 #define DMAE_CMD_CRC_RESET_SHIFT 12 207 #define DMAE_CMD_SRC_RESET (0x1<<13) /* BitField opcode reset source address in next go */ 208 #define DMAE_CMD_SRC_RESET_SHIFT 13 209 #define DMAE_CMD_DST_RESET (0x1<<14) /* BitField opcode reset dest address in next go */ 210 #define DMAE_CMD_DST_RESET_SHIFT 14 211 #define DMAE_CMD_E1HVN (0x3<<15) /* BitField opcode vnic number E2 and onwards source vnic */ 212 #define DMAE_CMD_E1HVN_SHIFT 15 213 #define DMAE_CMD_DST_VN (0x3<<17) /* BitField opcode E2 and onwards dest vnic */ 214 #define DMAE_CMD_DST_VN_SHIFT 17 215 #define DMAE_CMD_C_FUNC (0x1<<19) /* BitField opcode E2 and onwards which function gets the completion src_vn(e1hvn)-0 dst_vn-1 */ 216 #define DMAE_CMD_C_FUNC_SHIFT 19 217 #define DMAE_CMD_ERR_POLICY (0x3<<20) /* BitField opcode E2 and onwards what to do when theres a completion and a PCI error regular-0 error indication-1 no completion-2 */ 218 #define DMAE_CMD_ERR_POLICY_SHIFT 20 219 #define DMAE_CMD_RESERVED0 (0x3FF<<22) /* BitField opcode */ 220 #define DMAE_CMD_RESERVED0_SHIFT 22 221 u32_t src_addr_lo /* source address low/grc address */; 222 u32_t src_addr_hi /* source address hi */; 223 u32_t dst_addr_lo /* dest address low/grc address */; 224 u32_t dst_addr_hi /* dest address hi */; 225 #if defined(__BIG_ENDIAN) 226 u16_t opcode_iov; 227 #define DMAE_CMD_SRC_VFID (0x3F<<0) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility source VF id */ 228 #define DMAE_CMD_SRC_VFID_SHIFT 0 229 #define DMAE_CMD_SRC_VFPF (0x1<<6) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility selects the source function PF-0, VF-1 */ 230 #define DMAE_CMD_SRC_VFPF_SHIFT 6 231 #define DMAE_CMD_RESERVED1 (0x1<<7) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility */ 232 #define DMAE_CMD_RESERVED1_SHIFT 7 233 #define DMAE_CMD_DST_VFID (0x3F<<8) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility destination VF id */ 234 #define DMAE_CMD_DST_VFID_SHIFT 8 235 #define DMAE_CMD_DST_VFPF (0x1<<14) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility selects the destination function PF-0, VF-1 */ 236 #define DMAE_CMD_DST_VFPF_SHIFT 14 237 #define DMAE_CMD_RESERVED2 (0x1<<15) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility */ 238 #define DMAE_CMD_RESERVED2_SHIFT 15 239 u16_t len /* copy length */; 240 #elif defined(__LITTLE_ENDIAN) 241 u16_t len /* copy length */; 242 u16_t opcode_iov; 243 #define DMAE_CMD_SRC_VFID (0x3F<<0) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility source VF id */ 244 #define DMAE_CMD_SRC_VFID_SHIFT 0 245 #define DMAE_CMD_SRC_VFPF (0x1<<6) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility selects the source function PF-0, VF-1 */ 246 #define DMAE_CMD_SRC_VFPF_SHIFT 6 247 #define DMAE_CMD_RESERVED1 (0x1<<7) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility */ 248 #define DMAE_CMD_RESERVED1_SHIFT 7 249 #define DMAE_CMD_DST_VFID (0x3F<<8) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility destination VF id */ 250 #define DMAE_CMD_DST_VFID_SHIFT 8 251 #define DMAE_CMD_DST_VFPF (0x1<<14) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility selects the destination function PF-0, VF-1 */ 252 #define DMAE_CMD_DST_VFPF_SHIFT 14 253 #define DMAE_CMD_RESERVED2 (0x1<<15) /* BitField opcode_iovE2 and onward, set to 0 for backward compatibility */ 254 #define DMAE_CMD_RESERVED2_SHIFT 15 255 #endif 256 u32_t comp_addr_lo /* completion address low/grc address */; 257 u32_t comp_addr_hi /* completion address hi */; 258 u32_t comp_val /* value to write to completion address */; 259 u32_t crc32 /* crc32 result */; 260 u32_t crc32_c /* crc32_c result */; 261 #if defined(__BIG_ENDIAN) 262 u16_t crc16_c /* crc16_c result */; 263 u16_t crc16 /* crc16 result */; 264 #elif defined(__LITTLE_ENDIAN) 265 u16_t crc16 /* crc16 result */; 266 u16_t crc16_c /* crc16_c result */; 267 #endif 268 #if defined(__BIG_ENDIAN) 269 u16_t reserved3; 270 u16_t crc_t10 /* crc_t10 result */; 271 #elif defined(__LITTLE_ENDIAN) 272 u16_t crc_t10 /* crc_t10 result */; 273 u16_t reserved3; 274 #endif 275 #if defined(__BIG_ENDIAN) 276 u16_t xsum8 /* checksum8 result */; 277 u16_t xsum16 /* checksum16 result */; 278 #elif defined(__LITTLE_ENDIAN) 279 u16_t xsum16 /* checksum16 result */; 280 u16_t xsum8 /* checksum8 result */; 281 #endif 282 }; 283 284 285 /* 286 * common data for all protocols 287 */ 288 struct doorbell_hdr_t 289 { 290 u8_t data; 291 #define DOORBELL_HDR_T_RX (0x1<<0) /* BitField data 1 for rx doorbell, 0 for tx doorbell */ 292 #define DOORBELL_HDR_T_RX_SHIFT 0 293 #define DOORBELL_HDR_T_DB_TYPE (0x1<<1) /* BitField data 0 for normal doorbell, 1 for advertise wnd doorbell */ 294 #define DOORBELL_HDR_T_DB_TYPE_SHIFT 1 295 #define DOORBELL_HDR_T_DPM_SIZE (0x3<<2) /* BitField data rdma tx only: DPM transaction size specifier (64/128/256/512 bytes) */ 296 #define DOORBELL_HDR_T_DPM_SIZE_SHIFT 2 297 #define DOORBELL_HDR_T_CONN_TYPE (0xF<<4) /* BitField data connection type */ 298 #define DOORBELL_HDR_T_CONN_TYPE_SHIFT 4 299 }; 300 301 /* 302 * Ethernet doorbell 303 */ 304 struct eth_tx_doorbell 305 { 306 #if defined(__BIG_ENDIAN) 307 u16_t npackets /* number of data bytes that were added in the doorbell */; 308 u8_t params; 309 #define ETH_TX_DOORBELL_NUM_BDS (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 310 #define ETH_TX_DOORBELL_NUM_BDS_SHIFT 0 311 #define ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 312 #define ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG_SHIFT 6 313 #define ETH_TX_DOORBELL_SPARE (0x1<<7) /* BitField params doorbell queue spare flag */ 314 #define ETH_TX_DOORBELL_SPARE_SHIFT 7 315 struct doorbell_hdr_t hdr; 316 #elif defined(__LITTLE_ENDIAN) 317 struct doorbell_hdr_t hdr; 318 u8_t params; 319 #define ETH_TX_DOORBELL_NUM_BDS (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 320 #define ETH_TX_DOORBELL_NUM_BDS_SHIFT 0 321 #define ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 322 #define ETH_TX_DOORBELL_RESERVED_TX_FIN_FLAG_SHIFT 6 323 #define ETH_TX_DOORBELL_SPARE (0x1<<7) /* BitField params doorbell queue spare flag */ 324 #define ETH_TX_DOORBELL_SPARE_SHIFT 7 325 u16_t npackets /* number of data bytes that were added in the doorbell */; 326 #endif 327 }; 328 329 330 /* 331 * 3 lines. status block $$KEEP_ENDIANNESS$$ 332 */ 333 struct hc_status_block_e1x 334 { 335 u16_t index_values[HC_SB_MAX_INDICES_E1X] /* indices reported by cstorm */; 336 u16_t running_index[HC_SB_MAX_SM] /* Status Block running indices */; 337 u32_t rsrv[11]; 338 }; 339 340 /* 341 * host status block 342 */ 343 struct host_hc_status_block_e1x 344 { 345 struct hc_status_block_e1x sb /* fast path indices */; 346 }; 347 348 349 /* 350 * 3 lines. status block $$KEEP_ENDIANNESS$$ 351 */ 352 struct hc_status_block_e2 353 { 354 u16_t index_values[HC_SB_MAX_INDICES_E2] /* indices reported by cstorm */; 355 u16_t running_index[HC_SB_MAX_SM] /* Status Block running indices */; 356 u32_t reserved[11]; 357 }; 358 359 /* 360 * host status block 361 */ 362 struct host_hc_status_block_e2 363 { 364 struct hc_status_block_e2 sb /* fast path indices */; 365 }; 366 367 368 /* 369 * 5 lines. slow-path status block $$KEEP_ENDIANNESS$$ 370 */ 371 struct hc_sp_status_block 372 { 373 u16_t index_values[HC_SP_SB_MAX_INDICES] /* indices reported by cstorm */; 374 u16_t running_index /* Status Block running index */; 375 u16_t rsrv; 376 u32_t rsrv1; 377 }; 378 379 /* 380 * host status block 381 */ 382 struct host_sp_status_block 383 { 384 struct atten_sp_status_block atten_status_block /* attention bits section */; 385 struct hc_sp_status_block sp_sb /* slow path indices */; 386 }; 387 388 389 /* 390 * IGU driver acknowledgment register 391 */ 392 struct igu_ack_register 393 { 394 #if defined(__BIG_ENDIAN) 395 u16_t sb_id_and_flags; 396 #define IGU_ACK_REGISTER_STATUS_BLOCK_ID (0x1F<<0) /* BitField sb_id_and_flags 0-15: non default status blocks, 16: default status block */ 397 #define IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT 0 398 #define IGU_ACK_REGISTER_STORM_ID (0x7<<5) /* BitField sb_id_and_flags 0-3:storm id, 4: attn status block (valid in default sb only) */ 399 #define IGU_ACK_REGISTER_STORM_ID_SHIFT 5 400 #define IGU_ACK_REGISTER_UPDATE_INDEX (0x1<<8) /* BitField sb_id_and_flags if set, acknowledges status block index */ 401 #define IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT 8 402 #define IGU_ACK_REGISTER_INTERRUPT_MODE (0x3<<9) /* BitField sb_id_and_flags interrupt enable/disable/nop: use IGU_INT_xxx constants */ 403 #define IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT 9 404 #define IGU_ACK_REGISTER_RESERVED (0x1F<<11) /* BitField sb_id_and_flags */ 405 #define IGU_ACK_REGISTER_RESERVED_SHIFT 11 406 u16_t status_block_index /* status block index acknowledgement */; 407 #elif defined(__LITTLE_ENDIAN) 408 u16_t status_block_index /* status block index acknowledgement */; 409 u16_t sb_id_and_flags; 410 #define IGU_ACK_REGISTER_STATUS_BLOCK_ID (0x1F<<0) /* BitField sb_id_and_flags 0-15: non default status blocks, 16: default status block */ 411 #define IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT 0 412 #define IGU_ACK_REGISTER_STORM_ID (0x7<<5) /* BitField sb_id_and_flags 0-3:storm id, 4: attn status block (valid in default sb only) */ 413 #define IGU_ACK_REGISTER_STORM_ID_SHIFT 5 414 #define IGU_ACK_REGISTER_UPDATE_INDEX (0x1<<8) /* BitField sb_id_and_flags if set, acknowledges status block index */ 415 #define IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT 8 416 #define IGU_ACK_REGISTER_INTERRUPT_MODE (0x3<<9) /* BitField sb_id_and_flags interrupt enable/disable/nop: use IGU_INT_xxx constants */ 417 #define IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT 9 418 #define IGU_ACK_REGISTER_RESERVED (0x1F<<11) /* BitField sb_id_and_flags */ 419 #define IGU_ACK_REGISTER_RESERVED_SHIFT 11 420 #endif 421 }; 422 423 424 /* 425 * IGU driver acknowledgement register 426 */ 427 struct igu_backward_compatible 428 { 429 u32_t sb_id_and_flags; 430 #define IGU_BACKWARD_COMPATIBLE_SB_INDEX (0xFFFF<<0) /* BitField sb_id_and_flags */ 431 #define IGU_BACKWARD_COMPATIBLE_SB_INDEX_SHIFT 0 432 #define IGU_BACKWARD_COMPATIBLE_SB_SELECT (0x1F<<16) /* BitField sb_id_and_flags */ 433 #define IGU_BACKWARD_COMPATIBLE_SB_SELECT_SHIFT 16 434 #define IGU_BACKWARD_COMPATIBLE_SEGMENT_ACCESS (0x7<<21) /* BitField sb_id_and_flags 0-3:storm id, 4: attn status block (valid in default sb only) */ 435 #define IGU_BACKWARD_COMPATIBLE_SEGMENT_ACCESS_SHIFT 21 436 #define IGU_BACKWARD_COMPATIBLE_BUPDATE (0x1<<24) /* BitField sb_id_and_flags if set, acknowledges status block index */ 437 #define IGU_BACKWARD_COMPATIBLE_BUPDATE_SHIFT 24 438 #define IGU_BACKWARD_COMPATIBLE_ENABLE_INT (0x3<<25) /* BitField sb_id_and_flags interrupt enable/disable/nop: use IGU_INT_xxx constants */ 439 #define IGU_BACKWARD_COMPATIBLE_ENABLE_INT_SHIFT 25 440 #define IGU_BACKWARD_COMPATIBLE_RESERVED_0 (0x1F<<27) /* BitField sb_id_and_flags */ 441 #define IGU_BACKWARD_COMPATIBLE_RESERVED_0_SHIFT 27 442 u32_t reserved_2; 443 }; 444 445 446 /* 447 * IGU driver acknowledgement register 448 */ 449 struct igu_regular 450 { 451 u32_t sb_id_and_flags; 452 #define IGU_REGULAR_SB_INDEX (0xFFFFF<<0) /* BitField sb_id_and_flags */ 453 #define IGU_REGULAR_SB_INDEX_SHIFT 0 454 #define IGU_REGULAR_RESERVED0 (0x1<<20) /* BitField sb_id_and_flags */ 455 #define IGU_REGULAR_RESERVED0_SHIFT 20 456 #define IGU_REGULAR_SEGMENT_ACCESS (0x7<<21) /* BitField sb_id_and_flags 21-23 (use enum igu_seg_access) */ 457 #define IGU_REGULAR_SEGMENT_ACCESS_SHIFT 21 458 #define IGU_REGULAR_BUPDATE (0x1<<24) /* BitField sb_id_and_flags */ 459 #define IGU_REGULAR_BUPDATE_SHIFT 24 460 #define IGU_REGULAR_ENABLE_INT (0x3<<25) /* BitField sb_id_and_flags interrupt enable/disable/nop (use enum igu_int_cmd) */ 461 #define IGU_REGULAR_ENABLE_INT_SHIFT 25 462 #define IGU_REGULAR_RESERVED_1 (0x1<<27) /* BitField sb_id_and_flags */ 463 #define IGU_REGULAR_RESERVED_1_SHIFT 27 464 #define IGU_REGULAR_CLEANUP_TYPE (0x3<<28) /* BitField sb_id_and_flags */ 465 #define IGU_REGULAR_CLEANUP_TYPE_SHIFT 28 466 #define IGU_REGULAR_CLEANUP_SET (0x1<<30) /* BitField sb_id_and_flags */ 467 #define IGU_REGULAR_CLEANUP_SET_SHIFT 30 468 #define IGU_REGULAR_BCLEANUP (0x1<<31) /* BitField sb_id_and_flags */ 469 #define IGU_REGULAR_BCLEANUP_SHIFT 31 470 u32_t reserved_2; 471 }; 472 473 /* 474 * IGU driver acknowledgement register 475 */ 476 union igu_consprod_reg 477 { 478 struct igu_regular regular; 479 struct igu_backward_compatible backward_compatible; 480 }; 481 482 483 /* 484 * Igu control commands 485 */ 486 enum igu_ctrl_cmd 487 { 488 IGU_CTRL_CMD_TYPE_RD, 489 IGU_CTRL_CMD_TYPE_WR, 490 MAX_IGU_CTRL_CMD}; 491 492 493 /* 494 * Control register for the IGU command register 495 */ 496 struct igu_ctrl_reg 497 { 498 u32_t ctrl_data; 499 #define IGU_CTRL_REG_ADDRESS (0xFFF<<0) /* BitField ctrl_data */ 500 #define IGU_CTRL_REG_ADDRESS_SHIFT 0 501 #define IGU_CTRL_REG_FID (0x7F<<12) /* BitField ctrl_data */ 502 #define IGU_CTRL_REG_FID_SHIFT 12 503 #define IGU_CTRL_REG_RESERVED (0x1<<19) /* BitField ctrl_data */ 504 #define IGU_CTRL_REG_RESERVED_SHIFT 19 505 #define IGU_CTRL_REG_TYPE (0x1<<20) /* BitField ctrl_data (use enum igu_ctrl_cmd) */ 506 #define IGU_CTRL_REG_TYPE_SHIFT 20 507 #define IGU_CTRL_REG_UNUSED (0x7FF<<21) /* BitField ctrl_data */ 508 #define IGU_CTRL_REG_UNUSED_SHIFT 21 509 }; 510 511 512 /* 513 * Igu interrupt command 514 */ 515 enum igu_int_cmd 516 { 517 IGU_INT_ENABLE, 518 IGU_INT_DISABLE, 519 IGU_INT_NOP, 520 IGU_INT_NOP2, 521 MAX_IGU_INT_CMD}; 522 523 524 525 /* 526 * Igu segments 527 */ 528 enum igu_seg_access 529 { 530 IGU_SEG_ACCESS_NORM, 531 IGU_SEG_ACCESS_DEF, 532 IGU_SEG_ACCESS_ATTN, 533 MAX_IGU_SEG_ACCESS}; 534 535 536 /* 537 * iscsi doorbell 538 */ 539 struct iscsi_tx_doorbell 540 { 541 #if defined(__BIG_ENDIAN) 542 u16_t reserved /* number of data bytes that were added in the doorbell */; 543 u8_t params; 544 #define ISCSI_TX_DOORBELL_NUM_WQES (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 545 #define ISCSI_TX_DOORBELL_NUM_WQES_SHIFT 0 546 #define ISCSI_TX_DOORBELL_RESERVED_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 547 #define ISCSI_TX_DOORBELL_RESERVED_TX_FIN_FLAG_SHIFT 6 548 #define ISCSI_TX_DOORBELL_SPARE (0x1<<7) /* BitField params doorbell queue spare flag */ 549 #define ISCSI_TX_DOORBELL_SPARE_SHIFT 7 550 struct doorbell_hdr_t hdr; 551 #elif defined(__LITTLE_ENDIAN) 552 struct doorbell_hdr_t hdr; 553 u8_t params; 554 #define ISCSI_TX_DOORBELL_NUM_WQES (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 555 #define ISCSI_TX_DOORBELL_NUM_WQES_SHIFT 0 556 #define ISCSI_TX_DOORBELL_RESERVED_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 557 #define ISCSI_TX_DOORBELL_RESERVED_TX_FIN_FLAG_SHIFT 6 558 #define ISCSI_TX_DOORBELL_SPARE (0x1<<7) /* BitField params doorbell queue spare flag */ 559 #define ISCSI_TX_DOORBELL_SPARE_SHIFT 7 560 u16_t reserved /* number of data bytes that were added in the doorbell */; 561 #endif 562 }; 563 564 565 /* 566 * Parser parsing flags field 567 */ 568 struct parsing_flags 569 { 570 u16_t flags; 571 #define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE (0x1<<0) /* BitField flagscontext flags 0=non-unicast, 1=unicast (use enum prs_flags_eth_addr_type) */ 572 #define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE_SHIFT 0 573 #define PARSING_FLAGS_INNER_VLAN_EXIST (0x1<<1) /* BitField flagscontext flags 0 or 1 */ 574 #define PARSING_FLAGS_INNER_VLAN_EXIST_SHIFT 1 575 #define PARSING_FLAGS_OUTER_VLAN_EXIST (0x1<<2) /* BitField flagscontext flags 0 or 1 */ 576 #define PARSING_FLAGS_OUTER_VLAN_EXIST_SHIFT 2 577 #define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL (0x3<<3) /* BitField flagscontext flags 0=un-known, 1=Ipv4, 2=Ipv6,3=LLC SNAP un-known. LLC SNAP here refers only to LLC/SNAP packets that do not have Ipv4 or Ipv6 above them. Ipv4 and Ipv6 indications are even if they are over LLC/SNAP and not directly over Ethernet (use enum prs_flags_over_eth) */ 578 #define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT 3 579 #define PARSING_FLAGS_IP_OPTIONS (0x1<<5) /* BitField flagscontext flags 0=no IP options / extension headers. 1=IP options / extension header exist */ 580 #define PARSING_FLAGS_IP_OPTIONS_SHIFT 5 581 #define PARSING_FLAGS_FRAGMENTATION_STATUS (0x1<<6) /* BitField flagscontext flags 0=non-fragmented, 1=fragmented */ 582 #define PARSING_FLAGS_FRAGMENTATION_STATUS_SHIFT 6 583 #define PARSING_FLAGS_OVER_IP_PROTOCOL (0x3<<7) /* BitField flagscontext flags 0=un-known, 1=TCP, 2=UDP (use enum prs_flags_over_ip) */ 584 #define PARSING_FLAGS_OVER_IP_PROTOCOL_SHIFT 7 585 #define PARSING_FLAGS_PURE_ACK_INDICATION (0x1<<9) /* BitField flagscontext flags 0=packet with data, 1=pure-ACK (use enum prs_flags_ack_type) */ 586 #define PARSING_FLAGS_PURE_ACK_INDICATION_SHIFT 9 587 #define PARSING_FLAGS_TCP_OPTIONS_EXIST (0x1<<10) /* BitField flagscontext flags 0=no TCP options. 1=TCP options */ 588 #define PARSING_FLAGS_TCP_OPTIONS_EXIST_SHIFT 10 589 #define PARSING_FLAGS_TIME_STAMP_EXIST_FLAG (0x1<<11) /* BitField flagscontext flags According to the TCP header options parsing */ 590 #define PARSING_FLAGS_TIME_STAMP_EXIST_FLAG_SHIFT 11 591 #define PARSING_FLAGS_CONNECTION_MATCH (0x1<<12) /* BitField flagscontext flags connection match in searcher indication */ 592 #define PARSING_FLAGS_CONNECTION_MATCH_SHIFT 12 593 #define PARSING_FLAGS_LLC_SNAP (0x1<<13) /* BitField flagscontext flags LLC SNAP indication */ 594 #define PARSING_FLAGS_LLC_SNAP_SHIFT 13 595 #define PARSING_FLAGS_RESERVED0 (0x3<<14) /* BitField flagscontext flags */ 596 #define PARSING_FLAGS_RESERVED0_SHIFT 14 597 }; 598 599 600 /* 601 * Parsing flags for TCP ACK type 602 */ 603 enum prs_flags_ack_type 604 { 605 PRS_FLAG_PUREACK_PIGGY, 606 PRS_FLAG_PUREACK_PURE, 607 MAX_PRS_FLAGS_ACK_TYPE}; 608 609 610 /* 611 * Parsing flags for Ethernet address type 612 */ 613 enum prs_flags_eth_addr_type 614 { 615 PRS_FLAG_ETHTYPE_NON_UNICAST, 616 PRS_FLAG_ETHTYPE_UNICAST, 617 MAX_PRS_FLAGS_ETH_ADDR_TYPE}; 618 619 620 /* 621 * Parsing flags for over-ethernet protocol 622 */ 623 enum prs_flags_over_eth 624 { 625 PRS_FLAG_OVERETH_UNKNOWN, 626 PRS_FLAG_OVERETH_IPV4, 627 PRS_FLAG_OVERETH_IPV6, 628 PRS_FLAG_OVERETH_LLCSNAP_UNKNOWN, 629 MAX_PRS_FLAGS_OVER_ETH}; 630 631 632 /* 633 * Parsing flags for over-IP protocol 634 */ 635 enum prs_flags_over_ip 636 { 637 PRS_FLAG_OVERIP_UNKNOWN, 638 PRS_FLAG_OVERIP_TCP, 639 PRS_FLAG_OVERIP_UDP, 640 MAX_PRS_FLAGS_OVER_IP}; 641 642 643 /* 644 * SDM operation gen command (generate aggregative interrupt) 645 */ 646 struct sdm_op_gen 647 { 648 u32_t command; 649 #define SDM_OP_GEN_COMP_PARAM (0x1F<<0) /* BitField commandcomp_param and comp_type thread ID/aggr interrupt number/counter depending on the completion type */ 650 #define SDM_OP_GEN_COMP_PARAM_SHIFT 0 651 #define SDM_OP_GEN_COMP_TYPE (0x7<<5) /* BitField commandcomp_param and comp_type Direct messages to CM / PCI switch are not supported in operation_gen completion */ 652 #define SDM_OP_GEN_COMP_TYPE_SHIFT 5 653 #define SDM_OP_GEN_AGG_VECT_IDX (0xFF<<8) /* BitField commandcomp_param and comp_type bit index in aggregated interrupt vector */ 654 #define SDM_OP_GEN_AGG_VECT_IDX_SHIFT 8 655 #define SDM_OP_GEN_AGG_VECT_IDX_VALID (0x1<<16) /* BitField commandcomp_param and comp_type */ 656 #define SDM_OP_GEN_AGG_VECT_IDX_VALID_SHIFT 16 657 #define SDM_OP_GEN_RESERVED (0x7FFF<<17) /* BitField commandcomp_param and comp_type */ 658 #define SDM_OP_GEN_RESERVED_SHIFT 17 659 }; 660 661 662 /* 663 * Timers connection context 664 */ 665 struct timers_block_context 666 { 667 u32_t __client0 /* data of client 0 of the timers block*/; 668 u32_t __client1 /* data of client 1 of the timers block*/; 669 u32_t __client2 /* data of client 2 of the timers block*/; 670 u32_t flags; 671 #define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) /* BitField flagscontext flags number of active timers running */ 672 #define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 673 #define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) /* BitField flagscontext flags flag: is connection valid (should be set by driver to 1 in toe/iscsi connections) */ 674 #define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 675 #define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) /* BitField flagscontext flags */ 676 #define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 677 }; 678 679 680 /* 681 * advertise window doorbell 682 */ 683 struct toe_adv_wnd_doorbell 684 { 685 #if defined(__BIG_ENDIAN) 686 u16_t wnd_sz_lsb /* Less significant bits of advertise window update value */; 687 u8_t wnd_sz_msb /* Most significant bits of advertise window update value */; 688 struct doorbell_hdr_t hdr /* See description of the appropriate type */; 689 #elif defined(__LITTLE_ENDIAN) 690 struct doorbell_hdr_t hdr /* See description of the appropriate type */; 691 u8_t wnd_sz_msb /* Most significant bits of advertise window update value */; 692 u16_t wnd_sz_lsb /* Less significant bits of advertise window update value */; 693 #endif 694 }; 695 696 697 /* 698 * toe rx BDs update doorbell 699 */ 700 struct toe_rx_bds_doorbell 701 { 702 #if defined(__BIG_ENDIAN) 703 u16_t nbds /* BDs update value */; 704 u8_t params; 705 #define TOE_RX_BDS_DOORBELL_RESERVED (0x1F<<0) /* BitField params reserved */ 706 #define TOE_RX_BDS_DOORBELL_RESERVED_SHIFT 0 707 #define TOE_RX_BDS_DOORBELL_OPCODE (0x7<<5) /* BitField params BDs update doorbell opcode (2) */ 708 #define TOE_RX_BDS_DOORBELL_OPCODE_SHIFT 5 709 struct doorbell_hdr_t hdr; 710 #elif defined(__LITTLE_ENDIAN) 711 struct doorbell_hdr_t hdr; 712 u8_t params; 713 #define TOE_RX_BDS_DOORBELL_RESERVED (0x1F<<0) /* BitField params reserved */ 714 #define TOE_RX_BDS_DOORBELL_RESERVED_SHIFT 0 715 #define TOE_RX_BDS_DOORBELL_OPCODE (0x7<<5) /* BitField params BDs update doorbell opcode (2) */ 716 #define TOE_RX_BDS_DOORBELL_OPCODE_SHIFT 5 717 u16_t nbds /* BDs update value */; 718 #endif 719 }; 720 721 722 /* 723 * toe rx bytes and BDs update doorbell 724 */ 725 struct toe_rx_bytes_and_bds_doorbell 726 { 727 #if defined(__BIG_ENDIAN) 728 u16_t nbytes /* nbytes */; 729 u8_t params; 730 #define TOE_RX_BYTES_AND_BDS_DOORBELL_NBDS (0x1F<<0) /* BitField params producer delta from the last doorbell */ 731 #define TOE_RX_BYTES_AND_BDS_DOORBELL_NBDS_SHIFT 0 732 #define TOE_RX_BYTES_AND_BDS_DOORBELL_OPCODE (0x7<<5) /* BitField params rx bytes and BDs update doorbell opcode (1) */ 733 #define TOE_RX_BYTES_AND_BDS_DOORBELL_OPCODE_SHIFT 5 734 struct doorbell_hdr_t hdr; 735 #elif defined(__LITTLE_ENDIAN) 736 struct doorbell_hdr_t hdr; 737 u8_t params; 738 #define TOE_RX_BYTES_AND_BDS_DOORBELL_NBDS (0x1F<<0) /* BitField params producer delta from the last doorbell */ 739 #define TOE_RX_BYTES_AND_BDS_DOORBELL_NBDS_SHIFT 0 740 #define TOE_RX_BYTES_AND_BDS_DOORBELL_OPCODE (0x7<<5) /* BitField params rx bytes and BDs update doorbell opcode (1) */ 741 #define TOE_RX_BYTES_AND_BDS_DOORBELL_OPCODE_SHIFT 5 742 u16_t nbytes /* nbytes */; 743 #endif 744 }; 745 746 747 /* 748 * toe rx bytes doorbell 749 */ 750 struct toe_rx_byte_doorbell 751 { 752 #if defined(__BIG_ENDIAN) 753 u16_t nbytes_lsb /* bits [0:15] of nbytes */; 754 u8_t params; 755 #define TOE_RX_BYTE_DOORBELL_NBYTES_MSB (0x1F<<0) /* BitField params bits [20:16] of nbytes */ 756 #define TOE_RX_BYTE_DOORBELL_NBYTES_MSB_SHIFT 0 757 #define TOE_RX_BYTE_DOORBELL_OPCODE (0x7<<5) /* BitField params rx bytes doorbell opcode (0) */ 758 #define TOE_RX_BYTE_DOORBELL_OPCODE_SHIFT 5 759 struct doorbell_hdr_t hdr; 760 #elif defined(__LITTLE_ENDIAN) 761 struct doorbell_hdr_t hdr; 762 u8_t params; 763 #define TOE_RX_BYTE_DOORBELL_NBYTES_MSB (0x1F<<0) /* BitField params bits [20:16] of nbytes */ 764 #define TOE_RX_BYTE_DOORBELL_NBYTES_MSB_SHIFT 0 765 #define TOE_RX_BYTE_DOORBELL_OPCODE (0x7<<5) /* BitField params rx bytes doorbell opcode (0) */ 766 #define TOE_RX_BYTE_DOORBELL_OPCODE_SHIFT 5 767 u16_t nbytes_lsb /* bits [0:15] of nbytes */; 768 #endif 769 }; 770 771 772 /* 773 * toe rx consume GRQ doorbell 774 */ 775 struct toe_rx_grq_doorbell 776 { 777 #if defined(__BIG_ENDIAN) 778 u16_t nbytes_lsb /* bits [0:15] of nbytes */; 779 u8_t params; 780 #define TOE_RX_GRQ_DOORBELL_NBYTES_MSB (0x1F<<0) /* BitField params bits [20:16] of nbytes */ 781 #define TOE_RX_GRQ_DOORBELL_NBYTES_MSB_SHIFT 0 782 #define TOE_RX_GRQ_DOORBELL_OPCODE (0x7<<5) /* BitField params rx GRQ doorbell opcode (4) */ 783 #define TOE_RX_GRQ_DOORBELL_OPCODE_SHIFT 5 784 struct doorbell_hdr_t hdr; 785 #elif defined(__LITTLE_ENDIAN) 786 struct doorbell_hdr_t hdr; 787 u8_t params; 788 #define TOE_RX_GRQ_DOORBELL_NBYTES_MSB (0x1F<<0) /* BitField params bits [20:16] of nbytes */ 789 #define TOE_RX_GRQ_DOORBELL_NBYTES_MSB_SHIFT 0 790 #define TOE_RX_GRQ_DOORBELL_OPCODE (0x7<<5) /* BitField params rx GRQ doorbell opcode (4) */ 791 #define TOE_RX_GRQ_DOORBELL_OPCODE_SHIFT 5 792 u16_t nbytes_lsb /* bits [0:15] of nbytes */; 793 #endif 794 }; 795 796 797 /* 798 * toe doorbell 799 */ 800 struct toe_tx_doorbell 801 { 802 #if defined(__BIG_ENDIAN) 803 u16_t nbytes /* number of data bytes that were added in the doorbell */; 804 u8_t params; 805 #define TOE_TX_DOORBELL_NUM_BDS (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 806 #define TOE_TX_DOORBELL_NUM_BDS_SHIFT 0 807 #define TOE_TX_DOORBELL_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 808 #define TOE_TX_DOORBELL_TX_FIN_FLAG_SHIFT 6 809 #define TOE_TX_DOORBELL_FLUSH (0x1<<7) /* BitField params doorbell queue spare flag */ 810 #define TOE_TX_DOORBELL_FLUSH_SHIFT 7 811 struct doorbell_hdr_t hdr; 812 #elif defined(__LITTLE_ENDIAN) 813 struct doorbell_hdr_t hdr; 814 u8_t params; 815 #define TOE_TX_DOORBELL_NUM_BDS (0x3F<<0) /* BitField params number of buffer descriptors that were added in the doorbell */ 816 #define TOE_TX_DOORBELL_NUM_BDS_SHIFT 0 817 #define TOE_TX_DOORBELL_TX_FIN_FLAG (0x1<<6) /* BitField params tx fin command flag */ 818 #define TOE_TX_DOORBELL_TX_FIN_FLAG_SHIFT 6 819 #define TOE_TX_DOORBELL_FLUSH (0x1<<7) /* BitField params doorbell queue spare flag */ 820 #define TOE_TX_DOORBELL_FLUSH_SHIFT 7 821 u16_t nbytes /* number of data bytes that were added in the doorbell */; 822 #endif 823 }; 824 825 826 /* 827 * The eth aggregative context of Tstorm 828 */ 829 struct tstorm_eth_ag_context 830 { 831 u32_t __reserved0[14]; 832 }; 833 834 835 /* 836 * The fcoe extra aggregative context section of Tstorm 837 */ 838 struct tstorm_fcoe_extra_ag_context_section 839 { 840 u32_t __agg_val1 /* aggregated value 1 */; 841 #if defined(__BIG_ENDIAN) 842 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 843 u8_t __agg_val3 /* aggregated value 3 */; 844 u16_t __agg_val2 /* aggregated value 2 */; 845 #elif defined(__LITTLE_ENDIAN) 846 u16_t __agg_val2 /* aggregated value 2 */; 847 u8_t __agg_val3 /* aggregated value 3 */; 848 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 849 #endif 850 #if defined(__BIG_ENDIAN) 851 u16_t __agg_val5; 852 u8_t __agg_val6; 853 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 854 #elif defined(__LITTLE_ENDIAN) 855 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 856 u8_t __agg_val6; 857 u16_t __agg_val5; 858 #endif 859 u32_t __lcq_prod /* Next sequence number to transmit, given by Tx */; 860 u32_t rtt_seq /* Rtt recording sequence number */; 861 u32_t rtt_time /* Rtt recording real time clock */; 862 u32_t __reserved66; 863 u32_t wnd_right_edge /* The right edge of the receive window. Updated by the XSTORM when a segment with ACK is transmitted */; 864 u32_t tcp_agg_vars1; 865 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) /* BitField tcp_agg_vars1Various aggregative variables Sticky bit that is set when FIN is sent and remains set */ 866 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 867 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) /* BitField tcp_agg_vars1Various aggregative variables The Tx indicates that it sent a FIN packet */ 868 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 869 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables Counter flag to indicate a window update */ 870 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 871 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables Indicates that a timeout expired */ 872 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 873 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the WndUpd counter flag */ 874 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 875 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the Timeout counter flag */ 876 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 877 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) /* BitField tcp_agg_vars1Various aggregative variables If 1 then the Rxmit sequence decision rule is enabled */ 878 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 879 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN (0x1<<9) /* BitField tcp_agg_vars1Various aggregative variables If set then the SendNext decision rule is enabled */ 880 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN_SHIFT 9 881 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) /* BitField tcp_agg_vars1Various aggregative variables */ 882 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 883 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) /* BitField tcp_agg_vars1Various aggregative variables */ 884 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 885 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) /* BitField tcp_agg_vars1Various aggregative variables */ 886 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 887 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) /* BitField tcp_agg_vars1Various aggregative variables */ 888 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 889 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) /* BitField tcp_agg_vars1Various aggregative variables */ 890 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 891 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) /* BitField tcp_agg_vars1Various aggregative variables */ 892 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 893 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) /* BitField tcp_agg_vars1Various aggregative variables Indicates that Tx has more to send, but has not enough window to send it */ 894 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 895 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) /* BitField tcp_agg_vars1Various aggregative variables */ 896 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 897 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) /* BitField tcp_agg_vars1Various aggregative variables */ 898 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 899 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) /* BitField tcp_agg_vars1Various aggregative variables */ 900 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 901 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) /* BitField tcp_agg_vars1Various aggregative variables */ 902 #define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 903 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or goto SS comand sent */ 904 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 905 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or Goto SS command performed by the XSTORM */ 906 #define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 907 u32_t snd_max /* Maximum sequence number that was ever transmitted */; 908 u32_t __lcq_cons /* Last ACK sequence number sent by the Tx */; 909 u32_t __reserved2; 910 }; 911 912 /* 913 * The fcoe aggregative context of Tstorm 914 */ 915 struct tstorm_fcoe_ag_context 916 { 917 #if defined(__BIG_ENDIAN) 918 u16_t ulp_credit; 919 u8_t agg_vars1; 920 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 921 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 922 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 923 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 924 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 925 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 926 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 927 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 928 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 929 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 930 #define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 931 #define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 932 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 933 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 934 u8_t state /* The state of the connection */; 935 #elif defined(__LITTLE_ENDIAN) 936 u8_t state /* The state of the connection */; 937 u8_t agg_vars1; 938 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 939 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 940 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 941 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 942 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 943 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 944 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 945 #define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 946 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 947 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 948 #define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 949 #define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 950 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 951 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 952 u16_t ulp_credit; 953 #endif 954 #if defined(__BIG_ENDIAN) 955 u16_t __agg_val4; 956 u16_t agg_vars2; 957 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 958 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 959 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 960 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 961 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 962 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 963 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 964 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 965 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 966 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 967 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 968 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 969 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 970 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 971 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 972 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 973 #define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 974 #define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 975 #define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 976 #define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 977 #define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 978 #define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 979 #define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 980 #define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 981 #elif defined(__LITTLE_ENDIAN) 982 u16_t agg_vars2; 983 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 984 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 985 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 986 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 987 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 988 #define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 989 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 990 #define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 991 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 992 #define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 993 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 994 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 995 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 996 #define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 997 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 998 #define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 999 #define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 1000 #define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 1001 #define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 1002 #define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 1003 #define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 1004 #define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 1005 #define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 1006 #define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 1007 u16_t __agg_val4; 1008 #endif 1009 struct tstorm_fcoe_extra_ag_context_section __extra_section /* Extra context section */; 1010 }; 1011 1012 1013 1014 /* 1015 * The iscsi aggregative context section of Tstorm 1016 */ 1017 struct tstorm_iscsi_tcp_ag_context_section 1018 { 1019 u32_t __agg_val1 /* aggregated value 1 */; 1020 #if defined(__BIG_ENDIAN) 1021 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1022 u8_t __agg_val3 /* aggregated value 3 */; 1023 u16_t __agg_val2 /* aggregated value 2 */; 1024 #elif defined(__LITTLE_ENDIAN) 1025 u16_t __agg_val2 /* aggregated value 2 */; 1026 u8_t __agg_val3 /* aggregated value 3 */; 1027 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1028 #endif 1029 #if defined(__BIG_ENDIAN) 1030 u16_t __agg_val5; 1031 u8_t __agg_val6; 1032 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1033 #elif defined(__LITTLE_ENDIAN) 1034 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1035 u8_t __agg_val6; 1036 u16_t __agg_val5; 1037 #endif 1038 u32_t snd_nxt /* Next sequence number to transmit, given by Tx */; 1039 u32_t rtt_seq /* Rtt recording sequence number */; 1040 u32_t rtt_time /* Rtt recording real time clock */; 1041 u32_t wnd_right_edge_local; 1042 u32_t wnd_right_edge /* The right edge of the receive window. Updated by the XSTORM when a segment with ACK is transmitted */; 1043 u32_t tcp_agg_vars1; 1044 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) /* BitField tcp_agg_vars1Various aggregative variables Sticky bit that is set when FIN is sent and remains set */ 1045 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 1046 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) /* BitField tcp_agg_vars1Various aggregative variables The Tx indicates that it sent a FIN packet */ 1047 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 1048 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables Counter flag to indicate a window update */ 1049 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 1050 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables Indicates that a timeout expired */ 1051 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 1052 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the WndUpd counter flag */ 1053 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 1054 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the Timeout counter flag */ 1055 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 1056 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) /* BitField tcp_agg_vars1Various aggregative variables If 1 then the Rxmit sequence decision rule is enabled */ 1057 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 1058 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) /* BitField tcp_agg_vars1Various aggregative variables If set then the SendNext decision rule is enabled */ 1059 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 1060 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) /* BitField tcp_agg_vars1Various aggregative variables */ 1061 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 1062 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) /* BitField tcp_agg_vars1Various aggregative variables */ 1063 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 1064 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) /* BitField tcp_agg_vars1Various aggregative variables */ 1065 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 1066 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) /* BitField tcp_agg_vars1Various aggregative variables */ 1067 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 1068 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) /* BitField tcp_agg_vars1Various aggregative variables */ 1069 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 1070 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) /* BitField tcp_agg_vars1Various aggregative variables */ 1071 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 1072 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) /* BitField tcp_agg_vars1Various aggregative variables Indicates that Tx has more to send, but has not enough window to send it */ 1073 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 1074 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) /* BitField tcp_agg_vars1Various aggregative variables */ 1075 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 1076 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) /* BitField tcp_agg_vars1Various aggregative variables */ 1077 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 1078 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) /* BitField tcp_agg_vars1Various aggregative variables */ 1079 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 1080 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) /* BitField tcp_agg_vars1Various aggregative variables */ 1081 #define __TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 1082 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or goto SS comand sent */ 1083 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 1084 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or Goto SS command performed by the XSTORM */ 1085 #define TSTORM_ISCSI_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 1086 u32_t snd_max /* Maximum sequence number that was ever transmitted */; 1087 u32_t snd_una /* Last ACK sequence number sent by the Tx */; 1088 u32_t __reserved2; 1089 }; 1090 1091 /* 1092 * The iscsi aggregative context of Tstorm 1093 */ 1094 struct tstorm_iscsi_ag_context 1095 { 1096 #if defined(__BIG_ENDIAN) 1097 u16_t ulp_credit; 1098 u8_t agg_vars1; 1099 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 1100 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1101 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 1102 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1103 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 1104 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1105 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 1106 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1107 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 1108 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 1109 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 1110 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 1111 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 1112 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 1113 u8_t state /* The state of the connection */; 1114 #elif defined(__LITTLE_ENDIAN) 1115 u8_t state /* The state of the connection */; 1116 u8_t agg_vars1; 1117 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 1118 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1119 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 1120 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1121 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 1122 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1123 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 1124 #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1125 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 1126 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 1127 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 1128 #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 1129 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 1130 #define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 1131 u16_t ulp_credit; 1132 #endif 1133 #if defined(__BIG_ENDIAN) 1134 u16_t __agg_val4; 1135 u16_t agg_vars2; 1136 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 1137 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 1138 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 1139 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 1140 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 1141 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 1142 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 1143 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 1144 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 1145 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 1146 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 1147 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 1148 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 1149 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 1150 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 1151 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 1152 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 1153 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 1154 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 1155 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 1156 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 1157 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 1158 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 1159 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 1160 #elif defined(__LITTLE_ENDIAN) 1161 u16_t agg_vars2; 1162 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 1163 #define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 1164 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 1165 #define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 1166 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 1167 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 1168 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 1169 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 1170 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 1171 #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 1172 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 1173 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 1174 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 1175 #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 1176 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 1177 #define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 1178 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 1179 #define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 1180 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 1181 #define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 1182 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 1183 #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 1184 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 1185 #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 1186 u16_t __agg_val4; 1187 #endif 1188 struct tstorm_iscsi_tcp_ag_context_section tcp /* TCP context section, shared in TOE and iSCSI */; 1189 }; 1190 1191 1192 1193 /* 1194 * The tcp aggregative context section of Tstorm 1195 */ 1196 struct tstorm_tcp_tcp_ag_context_section 1197 { 1198 u32_t __agg_val1 /* aggregated value 1 */; 1199 #if defined(__BIG_ENDIAN) 1200 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1201 u8_t __agg_val3 /* aggregated value 3 */; 1202 u16_t __agg_val2 /* aggregated value 2 */; 1203 #elif defined(__LITTLE_ENDIAN) 1204 u16_t __agg_val2 /* aggregated value 2 */; 1205 u8_t __agg_val3 /* aggregated value 3 */; 1206 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1207 #endif 1208 #if defined(__BIG_ENDIAN) 1209 u16_t __agg_val5; 1210 u8_t __agg_val6; 1211 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1212 #elif defined(__LITTLE_ENDIAN) 1213 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1214 u8_t __agg_val6; 1215 u16_t __agg_val5; 1216 #endif 1217 u32_t snd_nxt /* Next sequence number to transmit, given by Tx */; 1218 u32_t rtt_seq /* Rtt recording sequence number */; 1219 u32_t rtt_time /* Rtt recording real time clock */; 1220 u32_t __reserved66; 1221 u32_t wnd_right_edge /* The right edge of the receive window. Updated by the XSTORM when a segment with ACK is transmitted */; 1222 u32_t tcp_agg_vars1; 1223 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) /* BitField tcp_agg_vars1Various aggregative variables Sticky bit that is set when FIN is sent and remains set */ 1224 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 1225 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) /* BitField tcp_agg_vars1Various aggregative variables The Tx indicates that it sent a FIN packet */ 1226 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 1227 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables Counter flag to indicate a window update */ 1228 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 1229 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables Indicates that a timeout expired */ 1230 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 1231 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the WndUpd counter flag */ 1232 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 1233 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the Timeout counter flag */ 1234 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 1235 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) /* BitField tcp_agg_vars1Various aggregative variables If 1 then the Rxmit sequence decision rule is enabled */ 1236 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 1237 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) /* BitField tcp_agg_vars1Various aggregative variables If set then the SendNext decision rule is enabled */ 1238 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 1239 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) /* BitField tcp_agg_vars1Various aggregative variables */ 1240 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 1241 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) /* BitField tcp_agg_vars1Various aggregative variables */ 1242 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 1243 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) /* BitField tcp_agg_vars1Various aggregative variables */ 1244 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 1245 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) /* BitField tcp_agg_vars1Various aggregative variables */ 1246 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 1247 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) /* BitField tcp_agg_vars1Various aggregative variables */ 1248 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 1249 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) /* BitField tcp_agg_vars1Various aggregative variables */ 1250 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 1251 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) /* BitField tcp_agg_vars1Various aggregative variables Indicates that Tx has more to send, but has not enough window to send it */ 1252 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 1253 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) /* BitField tcp_agg_vars1Various aggregative variables */ 1254 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 1255 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) /* BitField tcp_agg_vars1Various aggregative variables */ 1256 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 1257 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) /* BitField tcp_agg_vars1Various aggregative variables */ 1258 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 1259 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) /* BitField tcp_agg_vars1Various aggregative variables */ 1260 #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 1261 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or goto SS comand sent */ 1262 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 1263 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or Goto SS command performed by the XSTORM */ 1264 #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 1265 u32_t snd_max /* Maximum sequence number that was ever transmitted */; 1266 u32_t snd_una /* Last ACK sequence number sent by the Tx */; 1267 u32_t __reserved2; 1268 }; 1269 1270 1271 /* 1272 * The toe aggregative context section of Tstorm 1273 */ 1274 struct tstorm_toe_tcp_ag_context_section 1275 { 1276 u32_t __agg_val1 /* aggregated value 1 */; 1277 #if defined(__BIG_ENDIAN) 1278 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1279 u8_t __agg_val3 /* aggregated value 3 */; 1280 u16_t __agg_val2 /* aggregated value 2 */; 1281 #elif defined(__LITTLE_ENDIAN) 1282 u16_t __agg_val2 /* aggregated value 2 */; 1283 u8_t __agg_val3 /* aggregated value 3 */; 1284 u8_t __tcp_agg_vars2 /* Various aggregative variables*/; 1285 #endif 1286 #if defined(__BIG_ENDIAN) 1287 u16_t __agg_val5; 1288 u8_t __agg_val6; 1289 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1290 #elif defined(__LITTLE_ENDIAN) 1291 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1292 u8_t __agg_val6; 1293 u16_t __agg_val5; 1294 #endif 1295 u32_t snd_nxt /* Next sequence number to transmit, given by Tx */; 1296 u32_t rtt_seq /* Rtt recording sequence number */; 1297 u32_t rtt_time /* Rtt recording real time clock */; 1298 u32_t __reserved66; 1299 u32_t wnd_right_edge /* The right edge of the receive window. Updated by the XSTORM when a segment with ACK is transmitted */; 1300 u32_t tcp_agg_vars1; 1301 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) /* BitField tcp_agg_vars1Various aggregative variables Sticky bit that is set when FIN is sent and remains set */ 1302 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 1303 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) /* BitField tcp_agg_vars1Various aggregative variables The Tx indicates that it sent a FIN packet */ 1304 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 1305 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED52 (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables Counter flag to indicate a window update */ 1306 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED52_SHIFT 2 1307 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables Indicates that a timeout expired */ 1308 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 1309 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_WND_UPD_CF_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the WndUpd counter flag */ 1310 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_WND_UPD_CF_EN_SHIFT 6 1311 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Enable the decision rule that considers the Timeout counter flag */ 1312 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 1313 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) /* BitField tcp_agg_vars1Various aggregative variables If 1 then the Rxmit sequence decision rule is enabled */ 1314 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 1315 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) /* BitField tcp_agg_vars1Various aggregative variables If set then the SendNext decision rule is enabled */ 1316 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 1317 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_NEWRTTSAMPLE (0x1<<10) /* BitField tcp_agg_vars1Various aggregative variables */ 1318 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_NEWRTTSAMPLE_SHIFT 10 1319 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED55 (0x1<<11) /* BitField tcp_agg_vars1Various aggregative variables */ 1320 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED55_SHIFT 11 1321 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_AUX1_CF_EN (0x1<<12) /* BitField tcp_agg_vars1Various aggregative variables */ 1322 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_AUX1_CF_EN_SHIFT 12 1323 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_AUX2_CF_EN (0x1<<13) /* BitField tcp_agg_vars1Various aggregative variables */ 1324 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED_AUX2_CF_EN_SHIFT 13 1325 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED56 (0x3<<14) /* BitField tcp_agg_vars1Various aggregative variables */ 1326 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED56_SHIFT 14 1327 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED57 (0x3<<16) /* BitField tcp_agg_vars1Various aggregative variables */ 1328 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED57_SHIFT 16 1329 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) /* BitField tcp_agg_vars1Various aggregative variables Indicates that Tx has more to send, but has not enough window to send it */ 1330 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 1331 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) /* BitField tcp_agg_vars1Various aggregative variables */ 1332 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 1333 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) /* BitField tcp_agg_vars1Various aggregative variables */ 1334 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 1335 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) /* BitField tcp_agg_vars1Various aggregative variables */ 1336 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 1337 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) /* BitField tcp_agg_vars1Various aggregative variables */ 1338 #define __TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 1339 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or goto SS comand sent */ 1340 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 1341 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) /* BitField tcp_agg_vars1Various aggregative variables The sequence of the last fast retransmit or Goto SS command performed by the XSTORM */ 1342 #define TSTORM_TOE_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 1343 u32_t snd_max /* Maximum sequence number that was ever transmitted */; 1344 u32_t snd_una /* Last ACK sequence number sent by the Tx */; 1345 u32_t __reserved2; 1346 }; 1347 1348 /* 1349 * The toe aggregative context of Tstorm 1350 */ 1351 struct tstorm_toe_ag_context 1352 { 1353 #if defined(__BIG_ENDIAN) 1354 u16_t reserved54; 1355 u8_t agg_vars1; 1356 #define TSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 1357 #define TSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1358 #define TSTORM_TOE_AG_CONTEXT_RESERVED51 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 1359 #define TSTORM_TOE_AG_CONTEXT_RESERVED51_SHIFT 1 1360 #define TSTORM_TOE_AG_CONTEXT_RESERVED52 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 1361 #define TSTORM_TOE_AG_CONTEXT_RESERVED52_SHIFT 2 1362 #define TSTORM_TOE_AG_CONTEXT_RESERVED53 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 1363 #define TSTORM_TOE_AG_CONTEXT_RESERVED53_SHIFT 3 1364 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 1365 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 1366 #define __TSTORM_TOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 1367 #define __TSTORM_TOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 1368 #define __TSTORM_TOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 1369 #define __TSTORM_TOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 1370 u8_t __state /* The state of the connection */; 1371 #elif defined(__LITTLE_ENDIAN) 1372 u8_t __state /* The state of the connection */; 1373 u8_t agg_vars1; 1374 #define TSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 1375 #define TSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1376 #define TSTORM_TOE_AG_CONTEXT_RESERVED51 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 1377 #define TSTORM_TOE_AG_CONTEXT_RESERVED51_SHIFT 1 1378 #define TSTORM_TOE_AG_CONTEXT_RESERVED52 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 1379 #define TSTORM_TOE_AG_CONTEXT_RESERVED52_SHIFT 2 1380 #define TSTORM_TOE_AG_CONTEXT_RESERVED53 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 1381 #define TSTORM_TOE_AG_CONTEXT_RESERVED53_SHIFT 3 1382 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) /* BitField agg_vars1Various aggregative variables */ 1383 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 1384 #define __TSTORM_TOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables */ 1385 #define __TSTORM_TOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 1386 #define __TSTORM_TOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) /* BitField agg_vars1Various aggregative variables */ 1387 #define __TSTORM_TOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 1388 u16_t reserved54; 1389 #endif 1390 #if defined(__BIG_ENDIAN) 1391 u16_t __agg_val4; 1392 u16_t agg_vars2; 1393 #define __TSTORM_TOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 1394 #define __TSTORM_TOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 1395 #define __TSTORM_TOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 1396 #define __TSTORM_TOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 1397 #define __TSTORM_TOE_AG_CONTEXT_AUX4_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 1398 #define __TSTORM_TOE_AG_CONTEXT_AUX4_CF_SHIFT 2 1399 #define __TSTORM_TOE_AG_CONTEXT_AUX5_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 1400 #define __TSTORM_TOE_AG_CONTEXT_AUX5_CF_SHIFT 4 1401 #define __TSTORM_TOE_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 1402 #define __TSTORM_TOE_AG_CONTEXT_AUX6_CF_SHIFT 6 1403 #define __TSTORM_TOE_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 1404 #define __TSTORM_TOE_AG_CONTEXT_AUX7_CF_SHIFT 8 1405 #define __TSTORM_TOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 1406 #define __TSTORM_TOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 1407 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 1408 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 1409 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX4_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 1410 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX4_CF_EN_SHIFT 12 1411 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX5_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 1412 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX5_CF_EN_SHIFT 13 1413 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 1414 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX6_CF_EN_SHIFT 14 1415 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 1416 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX7_CF_EN_SHIFT 15 1417 #elif defined(__LITTLE_ENDIAN) 1418 u16_t agg_vars2; 1419 #define __TSTORM_TOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) /* BitField agg_vars2Various aggregative variables */ 1420 #define __TSTORM_TOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 1421 #define __TSTORM_TOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) /* BitField agg_vars2Various aggregative variables */ 1422 #define __TSTORM_TOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 1423 #define __TSTORM_TOE_AG_CONTEXT_AUX4_CF (0x3<<2) /* BitField agg_vars2Various aggregative variables */ 1424 #define __TSTORM_TOE_AG_CONTEXT_AUX4_CF_SHIFT 2 1425 #define __TSTORM_TOE_AG_CONTEXT_AUX5_CF (0x3<<4) /* BitField agg_vars2Various aggregative variables */ 1426 #define __TSTORM_TOE_AG_CONTEXT_AUX5_CF_SHIFT 4 1427 #define __TSTORM_TOE_AG_CONTEXT_AUX6_CF (0x3<<6) /* BitField agg_vars2Various aggregative variables */ 1428 #define __TSTORM_TOE_AG_CONTEXT_AUX6_CF_SHIFT 6 1429 #define __TSTORM_TOE_AG_CONTEXT_AUX7_CF (0x3<<8) /* BitField agg_vars2Various aggregative variables */ 1430 #define __TSTORM_TOE_AG_CONTEXT_AUX7_CF_SHIFT 8 1431 #define __TSTORM_TOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) /* BitField agg_vars2Various aggregative variables */ 1432 #define __TSTORM_TOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 1433 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) /* BitField agg_vars2Various aggregative variables */ 1434 #define __TSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 1435 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX4_CF_EN (0x1<<12) /* BitField agg_vars2Various aggregative variables */ 1436 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX4_CF_EN_SHIFT 12 1437 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX5_CF_EN (0x1<<13) /* BitField agg_vars2Various aggregative variables */ 1438 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX5_CF_EN_SHIFT 13 1439 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX6_CF_EN (0x1<<14) /* BitField agg_vars2Various aggregative variables */ 1440 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX6_CF_EN_SHIFT 14 1441 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX7_CF_EN (0x1<<15) /* BitField agg_vars2Various aggregative variables */ 1442 #define TSTORM_TOE_AG_CONTEXT_RESERVED_AUX7_CF_EN_SHIFT 15 1443 u16_t __agg_val4; 1444 #endif 1445 struct tstorm_toe_tcp_ag_context_section tcp /* TCP context section, shared in TOE and iSCSI */; 1446 }; 1447 1448 1449 1450 /* 1451 * The eth aggregative context of Ustorm 1452 */ 1453 struct ustorm_eth_ag_context 1454 { 1455 u32_t __reserved0; 1456 #if defined(__BIG_ENDIAN) 1457 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1458 u8_t __reserved2; 1459 u16_t __reserved1; 1460 #elif defined(__LITTLE_ENDIAN) 1461 u16_t __reserved1; 1462 u8_t __reserved2; 1463 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1464 #endif 1465 u32_t __reserved3[6]; 1466 }; 1467 1468 1469 /* 1470 * The fcoe aggregative context of Ustorm 1471 */ 1472 struct ustorm_fcoe_ag_context 1473 { 1474 #if defined(__BIG_ENDIAN) 1475 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1476 u8_t agg_vars2; 1477 #define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) /* BitField agg_vars2various aggregation variables Set when a message was received from the Tx STORM. For future use. */ 1478 #define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 1479 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) /* BitField agg_vars2various aggregation variables Set when a message was received from the Timer. */ 1480 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 1481 #define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) /* BitField agg_vars2various aggregation variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 1482 #define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 1483 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) /* BitField agg_vars2various aggregation variables Used to mask the decision rule of AggVal2. Used in iSCSI. Should be 0 in all other protocols */ 1484 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 1485 u8_t agg_vars1; 1486 #define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 0 */ 1487 #define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1488 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 1 */ 1489 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1490 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 2 */ 1491 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1492 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 3 */ 1493 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1494 #define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) /* BitField agg_vars1various aggregation variables Indicates a valid invalidate request. Set by the CMP STORM. */ 1495 #define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 1496 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) /* BitField agg_vars1various aggregation variables Set when a message was received from the CMP STORM. For future use. */ 1497 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 1498 u8_t state /* The state of the connection */; 1499 #elif defined(__LITTLE_ENDIAN) 1500 u8_t state /* The state of the connection */; 1501 u8_t agg_vars1; 1502 #define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 0 */ 1503 #define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1504 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 1 */ 1505 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1506 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 2 */ 1507 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1508 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 3 */ 1509 #define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1510 #define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) /* BitField agg_vars1various aggregation variables Indicates a valid invalidate request. Set by the CMP STORM. */ 1511 #define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 1512 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) /* BitField agg_vars1various aggregation variables Set when a message was received from the CMP STORM. For future use. */ 1513 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 1514 u8_t agg_vars2; 1515 #define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) /* BitField agg_vars2various aggregation variables Set when a message was received from the Tx STORM. For future use. */ 1516 #define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 1517 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) /* BitField agg_vars2various aggregation variables Set when a message was received from the Timer. */ 1518 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 1519 #define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) /* BitField agg_vars2various aggregation variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 1520 #define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 1521 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) /* BitField agg_vars2various aggregation variables Used to mask the decision rule of AggVal2. Used in iSCSI. Should be 0 in all other protocols */ 1522 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 1523 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1524 #endif 1525 #if defined(__BIG_ENDIAN) 1526 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1527 u8_t agg_misc2; 1528 u16_t pbf_tx_seq_ack /* Sequence number of the last sequence transmitted by PBF. */; 1529 #elif defined(__LITTLE_ENDIAN) 1530 u16_t pbf_tx_seq_ack /* Sequence number of the last sequence transmitted by PBF. */; 1531 u8_t agg_misc2; 1532 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1533 #endif 1534 u32_t agg_misc4; 1535 #if defined(__BIG_ENDIAN) 1536 u8_t agg_val3_th; 1537 u8_t agg_val3; 1538 u16_t agg_misc3; 1539 #elif defined(__LITTLE_ENDIAN) 1540 u16_t agg_misc3; 1541 u8_t agg_val3; 1542 u8_t agg_val3_th; 1543 #endif 1544 u32_t expired_task_id /* Timer expiration task id */; 1545 u32_t agg_misc4_th; 1546 #if defined(__BIG_ENDIAN) 1547 u16_t cq_prod /* CQ producer updated by FW */; 1548 u16_t cq_cons /* CQ consumer updated by driver via doorbell */; 1549 #elif defined(__LITTLE_ENDIAN) 1550 u16_t cq_cons /* CQ consumer updated by driver via doorbell */; 1551 u16_t cq_prod /* CQ producer updated by FW */; 1552 #endif 1553 #if defined(__BIG_ENDIAN) 1554 u16_t __reserved2; 1555 u8_t decision_rules; 1556 #define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1557 #define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 1558 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1559 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1560 #define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules CQ negative arm indication updated via doorbell */ 1561 #define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 1562 #define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1563 #define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 1564 u8_t decision_rule_enable_bits; 1565 #define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1566 #define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 1567 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1568 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 1569 #define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1570 #define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 1571 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1572 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 1573 #define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1574 #define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 1575 #define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The flush queues counter flag en. */ 1576 #define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 1577 #define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1578 #define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 1579 #define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1580 #define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 1581 #elif defined(__LITTLE_ENDIAN) 1582 u8_t decision_rule_enable_bits; 1583 #define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1584 #define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 1585 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1586 #define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 1587 #define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1588 #define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 1589 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1590 #define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 1591 #define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1592 #define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 1593 #define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The flush queues counter flag en. */ 1594 #define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 1595 #define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1596 #define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 1597 #define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1598 #define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 1599 u8_t decision_rules; 1600 #define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1601 #define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 1602 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1603 #define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1604 #define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules CQ negative arm indication updated via doorbell */ 1605 #define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 1606 #define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1607 #define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 1608 u16_t __reserved2; 1609 #endif 1610 }; 1611 1612 1613 /* 1614 * The iscsi aggregative context of Ustorm 1615 */ 1616 struct ustorm_iscsi_ag_context 1617 { 1618 #if defined(__BIG_ENDIAN) 1619 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1620 u8_t agg_vars2; 1621 #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) /* BitField agg_vars2various aggregation variables Set when a message was received from the Tx STORM. For future use. */ 1622 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 1623 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) /* BitField agg_vars2various aggregation variables Set when a message was received from the Timer. */ 1624 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 1625 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) /* BitField agg_vars2various aggregation variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 1626 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 1627 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) /* BitField agg_vars2various aggregation variables Used to mask the decision rule of AggVal2. Used in iSCSI. Should be 0 in all other protocols */ 1628 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 1629 u8_t agg_vars1; 1630 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 0 */ 1631 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1632 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 1 */ 1633 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1634 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 2 */ 1635 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1636 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 3 */ 1637 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1638 #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) /* BitField agg_vars1various aggregation variables Indicates a valid invalidate request. Set by the CMP STORM. */ 1639 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 1640 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) /* BitField agg_vars1various aggregation variables Set when a message was received from the CMP STORM. For future use. */ 1641 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 1642 u8_t state /* The state of the connection */; 1643 #elif defined(__LITTLE_ENDIAN) 1644 u8_t state /* The state of the connection */; 1645 u8_t agg_vars1; 1646 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 0 */ 1647 #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 1648 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 1 */ 1649 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 1650 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 2 */ 1651 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 1652 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1various aggregation variables The connection is currently registered to the QM with queue index 3 */ 1653 #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 1654 #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) /* BitField agg_vars1various aggregation variables Indicates a valid invalidate request. Set by the CMP STORM. */ 1655 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 1656 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) /* BitField agg_vars1various aggregation variables Set when a message was received from the CMP STORM. For future use. */ 1657 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 1658 u8_t agg_vars2; 1659 #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) /* BitField agg_vars2various aggregation variables Set when a message was received from the Tx STORM. For future use. */ 1660 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 1661 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) /* BitField agg_vars2various aggregation variables Set when a message was received from the Timer. */ 1662 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 1663 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) /* BitField agg_vars2various aggregation variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 1664 #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 1665 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) /* BitField agg_vars2various aggregation variables Used to mask the decision rule of AggVal2. Used in iSCSI. Should be 0 in all other protocols */ 1666 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 1667 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1668 #endif 1669 #if defined(__BIG_ENDIAN) 1670 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1671 u8_t agg_misc2; 1672 u16_t __cq_local_comp_itt_val /* The local completion ITT to complete. Set by the CMP STORM RO for USTORM. */; 1673 #elif defined(__LITTLE_ENDIAN) 1674 u16_t __cq_local_comp_itt_val /* The local completion ITT to complete. Set by the CMP STORM RO for USTORM. */; 1675 u8_t agg_misc2; 1676 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1677 #endif 1678 u32_t agg_misc4; 1679 #if defined(__BIG_ENDIAN) 1680 u8_t agg_val3_th; 1681 u8_t agg_val3; 1682 u16_t agg_misc3; 1683 #elif defined(__LITTLE_ENDIAN) 1684 u16_t agg_misc3; 1685 u8_t agg_val3; 1686 u8_t agg_val3_th; 1687 #endif 1688 u32_t agg_val1; 1689 u32_t agg_misc4_th; 1690 #if defined(__BIG_ENDIAN) 1691 u16_t agg_val2_th; 1692 u16_t agg_val2; 1693 #elif defined(__LITTLE_ENDIAN) 1694 u16_t agg_val2; 1695 u16_t agg_val2_th; 1696 #endif 1697 #if defined(__BIG_ENDIAN) 1698 u16_t __reserved2; 1699 u8_t decision_rules; 1700 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1701 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 1702 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1703 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1704 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules */ 1705 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 1706 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1707 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 1708 u8_t decision_rule_enable_bits; 1709 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1710 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 1711 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1712 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 1713 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1714 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 1715 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1716 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 1717 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The local completion counter flag enable. Enabled by USTORM at the beginning. */ 1718 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 1719 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The flush queues counter flag en. */ 1720 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 1721 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1722 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 1723 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1724 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 1725 #elif defined(__LITTLE_ENDIAN) 1726 u8_t decision_rule_enable_bits; 1727 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1728 #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 1729 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1730 #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 1731 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1732 #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 1733 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1734 #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 1735 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The local completion counter flag enable. Enabled by USTORM at the beginning. */ 1736 #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 1737 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) /* BitField decision_rule_enable_bitsEnable bits for various decision rules The flush queues counter flag en. */ 1738 #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 1739 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1740 #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 1741 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField decision_rule_enable_bitsEnable bits for various decision rules */ 1742 #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 1743 u8_t decision_rules; 1744 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1745 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 1746 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1747 #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1748 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules */ 1749 #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 1750 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1751 #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 1752 u16_t __reserved2; 1753 #endif 1754 }; 1755 1756 1757 /* 1758 * The toe aggregative context of Ustorm 1759 */ 1760 struct ustorm_toe_ag_context 1761 { 1762 #if defined(__BIG_ENDIAN) 1763 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1764 u8_t __agg_vars2 /* various aggregation variables*/; 1765 u8_t __agg_vars1 /* various aggregation variables*/; 1766 u8_t __state /* The state of the connection */; 1767 #elif defined(__LITTLE_ENDIAN) 1768 u8_t __state /* The state of the connection */; 1769 u8_t __agg_vars1 /* various aggregation variables*/; 1770 u8_t __agg_vars2 /* various aggregation variables*/; 1771 u8_t __aux_counter_flags /* auxiliary counter flags*/; 1772 #endif 1773 #if defined(__BIG_ENDIAN) 1774 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1775 u8_t __agg_misc2; 1776 u16_t __agg_misc1; 1777 #elif defined(__LITTLE_ENDIAN) 1778 u16_t __agg_misc1; 1779 u8_t __agg_misc2; 1780 u8_t cdu_usage /* Will be used by the CDU for validation of the CID/connection type on doorbells. */; 1781 #endif 1782 u32_t __agg_misc4; 1783 #if defined(__BIG_ENDIAN) 1784 u8_t __agg_val3_th; 1785 u8_t __agg_val3; 1786 u16_t __agg_misc3; 1787 #elif defined(__LITTLE_ENDIAN) 1788 u16_t __agg_misc3; 1789 u8_t __agg_val3; 1790 u8_t __agg_val3_th; 1791 #endif 1792 u32_t driver_doorbell_info_ptr_lo /* the host pointer that consist the struct of info updated */; 1793 u32_t driver_doorbell_info_ptr_hi /* the host pointer that consist the struct of info updated */; 1794 #if defined(__BIG_ENDIAN) 1795 u16_t __agg_val2_th; 1796 u16_t rq_prod /* The RQ producer */; 1797 #elif defined(__LITTLE_ENDIAN) 1798 u16_t rq_prod /* The RQ producer */; 1799 u16_t __agg_val2_th; 1800 #endif 1801 #if defined(__BIG_ENDIAN) 1802 u16_t __reserved2; 1803 u8_t decision_rules; 1804 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1805 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 1806 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1807 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1808 #define USTORM_TOE_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules */ 1809 #define USTORM_TOE_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 1810 #define __USTORM_TOE_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1811 #define __USTORM_TOE_AG_CONTEXT_RESERVED1_SHIFT 7 1812 u8_t __decision_rule_enable_bits /* Enable bits for various decision rules*/; 1813 #elif defined(__LITTLE_ENDIAN) 1814 u8_t __decision_rule_enable_bits /* Enable bits for various decision rules*/; 1815 u8_t decision_rules; 1816 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) /* BitField decision_rulesVarious decision rules */ 1817 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 1818 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) /* BitField decision_rulesVarious decision rules */ 1819 #define __USTORM_TOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 1820 #define USTORM_TOE_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) /* BitField decision_rulesVarious decision rules */ 1821 #define USTORM_TOE_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 1822 #define __USTORM_TOE_AG_CONTEXT_RESERVED1 (0x1<<7) /* BitField decision_rulesVarious decision rules */ 1823 #define __USTORM_TOE_AG_CONTEXT_RESERVED1_SHIFT 7 1824 u16_t __reserved2; 1825 #endif 1826 }; 1827 1828 1829 /* 1830 * The eth aggregative context of Xstorm 1831 */ 1832 struct xstorm_eth_ag_context 1833 { 1834 u32_t reserved0; 1835 #if defined(__BIG_ENDIAN) 1836 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 1837 u8_t reserved2; 1838 u16_t reserved1; 1839 #elif defined(__LITTLE_ENDIAN) 1840 u16_t reserved1; 1841 u8_t reserved2; 1842 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 1843 #endif 1844 u32_t reserved3[30]; 1845 }; 1846 1847 1848 /* 1849 * The fcoe aggregative context section of Xstorm 1850 */ 1851 struct xstorm_fcoe_extra_ag_context_section 1852 { 1853 #if defined(__BIG_ENDIAN) 1854 u8_t tcp_agg_vars1; 1855 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 1856 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0 1857 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 1858 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 1859 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 1860 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 1861 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 1862 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6 1863 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 1864 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 7 1865 u8_t __reserved_da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 1866 u16_t __mtu /* MSS used for nagle algorithm and for transmission */; 1867 #elif defined(__LITTLE_ENDIAN) 1868 u16_t __mtu /* MSS used for nagle algorithm and for transmission */; 1869 u8_t __reserved_da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 1870 u8_t tcp_agg_vars1; 1871 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51 (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 1872 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0 1873 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 1874 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 1875 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 1876 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 1877 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 1878 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6 1879 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 1880 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 7 1881 #endif 1882 u32_t snd_nxt /* The current sequence number to send */; 1883 u32_t __xfrqe_bd_addr_lo /* The Current transmission window in bytes */; 1884 u32_t __xfrqe_bd_addr_hi /* The current Send UNA sequence number */; 1885 u32_t __xfrqe_data1 /* The current local advertised window to FE. */; 1886 #if defined(__BIG_ENDIAN) 1887 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 1888 u8_t __tx_dest /* aggregated value 8 */; 1889 u16_t tcp_agg_vars2; 1890 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 1891 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 0 1892 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58 (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 1893 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58_SHIFT 1 1894 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59 (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 1895 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59_SHIFT 2 1896 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 1897 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 1898 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 1899 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 1900 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60 (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 1901 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 5 1902 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 1903 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 6 1904 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 1905 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 1906 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 1907 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 8 1908 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 1909 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 1910 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 1911 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 1912 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 1913 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 1914 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 1915 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 1916 #elif defined(__LITTLE_ENDIAN) 1917 u16_t tcp_agg_vars2; 1918 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 1919 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 0 1920 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58 (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 1921 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED58_SHIFT 1 1922 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59 (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 1923 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED59_SHIFT 2 1924 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 1925 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 1926 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 1927 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 1928 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60 (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 1929 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 5 1930 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 1931 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 6 1932 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 1933 #define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 1934 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 1935 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 8 1936 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 1937 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 1938 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 1939 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 1940 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 1941 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 1942 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 1943 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 1944 u8_t __tx_dest /* aggregated value 8 */; 1945 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 1946 #endif 1947 u32_t __sq_base_addr_lo /* The low page address which the SQ resides in host memory */; 1948 u32_t __sq_base_addr_hi /* The high page address which the SQ resides in host memory */; 1949 u32_t __xfrq_base_addr_lo /* The low page address which the XFRQ resides in host memory */; 1950 u32_t __xfrq_base_addr_hi /* The high page address which the XFRQ resides in host memory */; 1951 #if defined(__BIG_ENDIAN) 1952 u16_t __xfrq_cons /* The XFRQ consumer */; 1953 u16_t __xfrq_prod /* The XFRQ producer, updated by Ustorm */; 1954 #elif defined(__LITTLE_ENDIAN) 1955 u16_t __xfrq_prod /* The XFRQ producer, updated by Ustorm */; 1956 u16_t __xfrq_cons /* The XFRQ consumer */; 1957 #endif 1958 #if defined(__BIG_ENDIAN) 1959 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 1960 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 1961 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1962 u8_t __reserved_force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 1963 #elif defined(__LITTLE_ENDIAN) 1964 u8_t __reserved_force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 1965 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 1966 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 1967 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 1968 #endif 1969 u32_t __tcp_agg_vars6 /* Various aggregative variables*/; 1970 #if defined(__BIG_ENDIAN) 1971 u16_t __xfrqe_mng /* Misc aggregated variable 6 */; 1972 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 1973 #elif defined(__LITTLE_ENDIAN) 1974 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 1975 u16_t __xfrqe_mng /* Misc aggregated variable 6 */; 1976 #endif 1977 u32_t __xfrqe_data0 /* aggregated value 10 */; 1978 u32_t __agg_val10_th /* aggregated value 10 - threshold */; 1979 #if defined(__BIG_ENDIAN) 1980 u16_t __reserved3; 1981 u8_t __reserved2; 1982 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 1983 #elif defined(__LITTLE_ENDIAN) 1984 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 1985 u8_t __reserved2; 1986 u16_t __reserved3; 1987 #endif 1988 }; 1989 1990 /* 1991 * The fcoe aggregative context of Xstorm 1992 */ 1993 struct xstorm_fcoe_ag_context 1994 { 1995 #if defined(__BIG_ENDIAN) 1996 u16_t agg_val1 /* aggregated value 1 */; 1997 u8_t agg_vars1; 1998 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 1999 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2000 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2001 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 2002 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED51 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2003 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED51_SHIFT 2 2004 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED52 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2005 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED52_SHIFT 3 2006 #define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2007 #define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2008 #define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2009 #define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN_SHIFT 5 2010 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables Used for future indication by the Driver on a doorbell */ 2011 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 2012 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2013 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN_SHIFT 7 2014 u8_t __state /* The state of the connection */; 2015 #elif defined(__LITTLE_ENDIAN) 2016 u8_t __state /* The state of the connection */; 2017 u8_t agg_vars1; 2018 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 2019 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2020 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2021 #define __XSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 2022 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED51 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2023 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED51_SHIFT 2 2024 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED52 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2025 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED52_SHIFT 3 2026 #define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2027 #define __XSTORM_FCOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2028 #define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2029 #define XSTORM_FCOE_AG_CONTEXT_NAGLE_EN_SHIFT 5 2030 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables Used for future indication by the Driver on a doorbell */ 2031 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 2032 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2033 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED_UNA_GT_NXT_EN_SHIFT 7 2034 u16_t agg_val1 /* aggregated value 1 */; 2035 #endif 2036 #if defined(__BIG_ENDIAN) 2037 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2038 u8_t __agg_vars4 /* Various aggregative variables*/; 2039 u8_t agg_vars3; 2040 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2041 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2042 #define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2043 #define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF_SHIFT 6 2044 u8_t agg_vars2; 2045 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2046 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_SHIFT 0 2047 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2048 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 2049 #define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2050 #define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2051 #define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2052 #define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2053 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2054 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1_SHIFT 5 2055 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2056 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2057 #elif defined(__LITTLE_ENDIAN) 2058 u8_t agg_vars2; 2059 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2060 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_SHIFT 0 2061 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2062 #define __XSTORM_FCOE_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 2063 #define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2064 #define __XSTORM_FCOE_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2065 #define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2066 #define __XSTORM_FCOE_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2067 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2068 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE1_SHIFT 5 2069 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2070 #define __XSTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2071 u8_t agg_vars3; 2072 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2073 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2074 #define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2075 #define __XSTORM_FCOE_AG_CONTEXT_AUX19_CF_SHIFT 6 2076 u8_t __agg_vars4 /* Various aggregative variables*/; 2077 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2078 #endif 2079 u32_t more_to_send /* The number of bytes left to send */; 2080 #if defined(__BIG_ENDIAN) 2081 u16_t agg_vars5; 2082 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2083 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5_SHIFT 0 2084 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2085 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2086 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2087 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2088 #define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2089 #define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE_SHIFT 14 2090 u16_t sq_cons /* The SQ consumer updated by Xstorm after consuming aother WQE */; 2091 #elif defined(__LITTLE_ENDIAN) 2092 u16_t sq_cons /* The SQ consumer updated by Xstorm after consuming aother WQE */; 2093 u16_t agg_vars5; 2094 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2095 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE5_SHIFT 0 2096 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2097 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2098 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2099 #define XSTORM_FCOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2100 #define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2101 #define __XSTORM_FCOE_AG_CONTEXT_CONFQ_DEC_RULE_SHIFT 14 2102 #endif 2103 struct xstorm_fcoe_extra_ag_context_section __extra_section /* Extra context section */; 2104 #if defined(__BIG_ENDIAN) 2105 u16_t agg_vars7; 2106 #define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2107 #define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 2108 #define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG (0x1<<3) /* BitField agg_vars7Various aggregative variables auxiliary flag 13 */ 2109 #define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG_SHIFT 3 2110 #define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF (0x3<<4) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 18 */ 2111 #define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF_SHIFT 4 2112 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3 (0x3<<6) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2113 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3_SHIFT 6 2114 #define XSTORM_FCOE_AG_CONTEXT_AUX1_CF (0x3<<8) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 1 */ 2115 #define XSTORM_FCOE_AG_CONTEXT_AUX1_CF_SHIFT 8 2116 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED62 (0x1<<10) /* BitField agg_vars7Various aggregative variables Mask the check of the completion sequence on retransmit */ 2117 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED62_SHIFT 10 2118 #define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<11) /* BitField agg_vars7Various aggregative variables Enable decision rules based on aux1_cf */ 2119 #define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 2120 #define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG (0x1<<12) /* BitField agg_vars7Various aggregative variables auxiliary flag 10 */ 2121 #define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG_SHIFT 12 2122 #define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG (0x1<<13) /* BitField agg_vars7Various aggregative variables auxiliary flag 11 */ 2123 #define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG_SHIFT 13 2124 #define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG (0x1<<14) /* BitField agg_vars7Various aggregative variables auxiliary flag 12 */ 2125 #define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG_SHIFT 14 2126 #define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG (0x1<<15) /* BitField agg_vars7Various aggregative variables auxiliary flag 2 */ 2127 #define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG_SHIFT 15 2128 u8_t agg_val3_th /* Aggregated value 3 - threshold */; 2129 u8_t agg_vars6; 2130 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6 (0x7<<0) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2131 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6_SHIFT 0 2132 #define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE (0x7<<3) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2133 #define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE_SHIFT 3 2134 #define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE (0x3<<6) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2135 #define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE_SHIFT 6 2136 #elif defined(__LITTLE_ENDIAN) 2137 u8_t agg_vars6; 2138 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6 (0x7<<0) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2139 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE6_SHIFT 0 2140 #define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE (0x7<<3) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2141 #define __XSTORM_FCOE_AG_CONTEXT_XFRQ_DEC_RULE_SHIFT 3 2142 #define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE (0x3<<6) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2143 #define __XSTORM_FCOE_AG_CONTEXT_SQ_DEC_RULE_SHIFT 6 2144 u8_t agg_val3_th /* Aggregated value 3 - threshold */; 2145 u16_t agg_vars7; 2146 #define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2147 #define __XSTORM_FCOE_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 2148 #define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG (0x1<<3) /* BitField agg_vars7Various aggregative variables auxiliary flag 13 */ 2149 #define __XSTORM_FCOE_AG_CONTEXT_AUX13_FLAG_SHIFT 3 2150 #define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF (0x3<<4) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 18 */ 2151 #define __XSTORM_FCOE_AG_CONTEXT_QUEUE0_CF_SHIFT 4 2152 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3 (0x3<<6) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2153 #define XSTORM_FCOE_AG_CONTEXT_DECISION_RULE3_SHIFT 6 2154 #define XSTORM_FCOE_AG_CONTEXT_AUX1_CF (0x3<<8) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 1 */ 2155 #define XSTORM_FCOE_AG_CONTEXT_AUX1_CF_SHIFT 8 2156 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED62 (0x1<<10) /* BitField agg_vars7Various aggregative variables Mask the check of the completion sequence on retransmit */ 2157 #define __XSTORM_FCOE_AG_CONTEXT_RESERVED62_SHIFT 10 2158 #define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<11) /* BitField agg_vars7Various aggregative variables Enable decision rules based on aux1_cf */ 2159 #define __XSTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 2160 #define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG (0x1<<12) /* BitField agg_vars7Various aggregative variables auxiliary flag 10 */ 2161 #define __XSTORM_FCOE_AG_CONTEXT_AUX10_FLAG_SHIFT 12 2162 #define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG (0x1<<13) /* BitField agg_vars7Various aggregative variables auxiliary flag 11 */ 2163 #define __XSTORM_FCOE_AG_CONTEXT_AUX11_FLAG_SHIFT 13 2164 #define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG (0x1<<14) /* BitField agg_vars7Various aggregative variables auxiliary flag 12 */ 2165 #define __XSTORM_FCOE_AG_CONTEXT_AUX12_FLAG_SHIFT 14 2166 #define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG (0x1<<15) /* BitField agg_vars7Various aggregative variables auxiliary flag 2 */ 2167 #define __XSTORM_FCOE_AG_CONTEXT_AUX2_FLAG_SHIFT 15 2168 #endif 2169 #if defined(__BIG_ENDIAN) 2170 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2171 u16_t __agg_val11 /* aggregated value 11 */; 2172 #elif defined(__LITTLE_ENDIAN) 2173 u16_t __agg_val11 /* aggregated value 11 */; 2174 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2175 #endif 2176 #if defined(__BIG_ENDIAN) 2177 u8_t __reserved1; 2178 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2179 u16_t __agg_val9 /* aggregated value 9 */; 2180 #elif defined(__LITTLE_ENDIAN) 2181 u16_t __agg_val9 /* aggregated value 9 */; 2182 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2183 u8_t __reserved1; 2184 #endif 2185 #if defined(__BIG_ENDIAN) 2186 u16_t confq_cons /* CONFQ Consumer */; 2187 u16_t confq_prod /* CONFQ Producer, updated by Ustorm - AggVal2 */; 2188 #elif defined(__LITTLE_ENDIAN) 2189 u16_t confq_prod /* CONFQ Producer, updated by Ustorm - AggVal2 */; 2190 u16_t confq_cons /* CONFQ Consumer */; 2191 #endif 2192 u32_t agg_vars8; 2193 #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0) /* BitField agg_vars8Various aggregative variables Misc aggregated variable 2 */ 2194 #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2_SHIFT 0 2195 #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3 (0xFF<<24) /* BitField agg_vars8Various aggregative variables Misc aggregated variable 3 */ 2196 #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3_SHIFT 24 2197 #if defined(__BIG_ENDIAN) 2198 u16_t __cache_wqe_db /* Misc aggregated variable 0 */; 2199 u16_t sq_prod /* The SQ Producer updated by Xstorm after reading a bunch of WQEs into the context */; 2200 #elif defined(__LITTLE_ENDIAN) 2201 u16_t sq_prod /* The SQ Producer updated by Xstorm after reading a bunch of WQEs into the context */; 2202 u16_t __cache_wqe_db /* Misc aggregated variable 0 */; 2203 #endif 2204 #if defined(__BIG_ENDIAN) 2205 u8_t agg_val3 /* Aggregated value 3 */; 2206 u8_t agg_val6 /* Aggregated value 6 */; 2207 u8_t agg_val5_th /* Aggregated value 5 - threshold */; 2208 u8_t agg_val5 /* Aggregated value 5 */; 2209 #elif defined(__LITTLE_ENDIAN) 2210 u8_t agg_val5 /* Aggregated value 5 */; 2211 u8_t agg_val5_th /* Aggregated value 5 - threshold */; 2212 u8_t agg_val6 /* Aggregated value 6 */; 2213 u8_t agg_val3 /* Aggregated value 3 */; 2214 #endif 2215 #if defined(__BIG_ENDIAN) 2216 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 2217 u16_t agg_limit1 /* aggregated limit 1 */; 2218 #elif defined(__LITTLE_ENDIAN) 2219 u16_t agg_limit1 /* aggregated limit 1 */; 2220 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 2221 #endif 2222 u32_t completion_seq /* The sequence number of the start completion point (BD) */; 2223 u32_t confq_pbl_base_lo /* The CONFQ PBL base low address resides in host memory */; 2224 u32_t confq_pbl_base_hi /* The CONFQ PBL base hihj address resides in host memory */; 2225 }; 2226 2227 2228 2229 /* 2230 * The tcp aggregative context section of Xstorm 2231 */ 2232 struct xstorm_tcp_tcp_ag_context_section 2233 { 2234 #if defined(__BIG_ENDIAN) 2235 u8_t tcp_agg_vars1; 2236 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 2237 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 2238 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 2239 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 2240 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 2241 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 2242 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 2243 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 2244 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 2245 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 2246 u8_t __da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 2247 u16_t mss /* MSS used for nagle algorithm and for transmission */; 2248 #elif defined(__LITTLE_ENDIAN) 2249 u16_t mss /* MSS used for nagle algorithm and for transmission */; 2250 u8_t __da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 2251 u8_t tcp_agg_vars1; 2252 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 2253 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 2254 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 2255 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 2256 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 2257 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 2258 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 2259 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 2260 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 2261 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 2262 #endif 2263 u32_t snd_nxt /* The current sequence number to send */; 2264 u32_t tx_wnd /* The Current transmission window in bytes */; 2265 u32_t snd_una /* The current Send UNA sequence number */; 2266 u32_t local_adv_wnd /* The current local advertised window to FE. */; 2267 #if defined(__BIG_ENDIAN) 2268 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 2269 u8_t __tx_dest /* aggregated value 8 */; 2270 u16_t tcp_agg_vars2; 2271 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 2272 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 2273 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 2274 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 2275 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 2276 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 2277 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 2278 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 2279 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 2280 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 2281 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 2282 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 2283 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 2284 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 2285 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 2286 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 2287 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 2288 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 2289 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 2290 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 2291 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 2292 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 2293 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 2294 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 2295 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 2296 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 2297 #elif defined(__LITTLE_ENDIAN) 2298 u16_t tcp_agg_vars2; 2299 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 2300 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 2301 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 2302 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 2303 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 2304 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 2305 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 2306 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 2307 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 2308 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 2309 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 2310 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 2311 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 2312 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 2313 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 2314 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 2315 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 2316 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 2317 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 2318 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 2319 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 2320 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 2321 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 2322 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 2323 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 2324 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 2325 u8_t __tx_dest /* aggregated value 8 */; 2326 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 2327 #endif 2328 u32_t ack_to_far_end /* The ACK sequence to send to far end */; 2329 u32_t rto_timer /* The RTO timer value */; 2330 u32_t ka_timer /* The KA timer value */; 2331 u32_t ts_to_echo /* The time stamp value to echo to far end */; 2332 #if defined(__BIG_ENDIAN) 2333 u16_t __agg_val7_th /* aggregated value 7 - threshold */; 2334 u16_t __agg_val7 /* aggregated value 7 */; 2335 #elif defined(__LITTLE_ENDIAN) 2336 u16_t __agg_val7 /* aggregated value 7 */; 2337 u16_t __agg_val7_th /* aggregated value 7 - threshold */; 2338 #endif 2339 #if defined(__BIG_ENDIAN) 2340 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 2341 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 2342 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 2343 u8_t __force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 2344 #elif defined(__LITTLE_ENDIAN) 2345 u8_t __force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 2346 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 2347 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 2348 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 2349 #endif 2350 u32_t tcp_agg_vars6; 2351 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux7_cf */ 2352 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 0 2353 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN (0x1<<1) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux8_cf */ 2354 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN_SHIFT 1 2355 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux9_cf */ 2356 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 2 2357 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux10_cf */ 2358 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 3 2359 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG (0x1<<4) /* BitField tcp_agg_vars6Various aggregative variables auxiliary flag 6 */ 2360 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG_SHIFT 4 2361 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG (0x1<<5) /* BitField tcp_agg_vars6Various aggregative variables auxiliary flag 7 */ 2362 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG_SHIFT 5 2363 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF (0x3<<6) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 5 */ 2364 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF_SHIFT 6 2365 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF (0x3<<8) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 9 */ 2366 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_SHIFT 8 2367 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF (0x3<<10) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 10 */ 2368 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_SHIFT 10 2369 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF (0x3<<12) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 11 */ 2370 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_SHIFT 12 2371 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF (0x3<<14) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 12 */ 2372 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_SHIFT 14 2373 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF (0x3<<16) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 13 */ 2374 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF_SHIFT 16 2375 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF (0x3<<18) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 14 */ 2376 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF_SHIFT 18 2377 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF (0x3<<20) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 15 */ 2378 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF_SHIFT 20 2379 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF (0x3<<22) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 16 */ 2380 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF_SHIFT 22 2381 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF (0x3<<24) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 17 */ 2382 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF_SHIFT 24 2383 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG (0x1<<26) /* BitField tcp_agg_vars6Various aggregative variables Can be also used as general purpose if ECN is not used */ 2384 #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT 26 2385 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71 (0x1<<27) /* BitField tcp_agg_vars6Various aggregative variables Can be also used as general purpose if ECN is not used */ 2386 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71_SHIFT 27 2387 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY (0x1<<28) /* BitField tcp_agg_vars6Various aggregative variables This flag is set if the Force ACK count is set by the TSTORM. On QM output it is cleared. */ 2388 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY_SHIFT 28 2389 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG (0x1<<29) /* BitField tcp_agg_vars6Various aggregative variables Indicates that the connection is in autostop mode */ 2390 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG_SHIFT 29 2391 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG (0x1<<30) /* BitField tcp_agg_vars6Various aggregative variables This bit uses like a one shot that the TSTORM fires and the XSTORM arms. Used to allow a single TS update for each transmission */ 2392 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG_SHIFT 30 2393 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG (0x1<<31) /* BitField tcp_agg_vars6Various aggregative variables This bit is set by the TSTORM when need to cancel precious fast retransmit */ 2394 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG_SHIFT 31 2395 #if defined(__BIG_ENDIAN) 2396 u16_t __agg_misc6 /* Misc aggregated variable 6 */; 2397 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 2398 #elif defined(__LITTLE_ENDIAN) 2399 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 2400 u16_t __agg_misc6 /* Misc aggregated variable 6 */; 2401 #endif 2402 u32_t __agg_val10 /* aggregated value 10 */; 2403 u32_t __agg_val10_th /* aggregated value 10 - threshold */; 2404 #if defined(__BIG_ENDIAN) 2405 u16_t __reserved3; 2406 u8_t __reserved2; 2407 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 2408 #elif defined(__LITTLE_ENDIAN) 2409 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 2410 u8_t __reserved2; 2411 u16_t __reserved3; 2412 #endif 2413 }; 2414 2415 /* 2416 * The iscsi aggregative context of Xstorm 2417 */ 2418 struct xstorm_iscsi_ag_context 2419 { 2420 #if defined(__BIG_ENDIAN) 2421 u16_t agg_val1 /* aggregated value 1 */; 2422 u8_t agg_vars1; 2423 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 2424 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2425 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2426 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 2427 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2428 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 2429 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2430 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 2431 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2432 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2433 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2434 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5 2435 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables Used for future indication by the Driver on a doorbell */ 2436 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 2437 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2438 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 2439 u8_t state /* The state of the connection */; 2440 #elif defined(__LITTLE_ENDIAN) 2441 u8_t state /* The state of the connection */; 2442 u8_t agg_vars1; 2443 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 2444 #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2445 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2446 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 2447 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2448 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 2449 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2450 #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 2451 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2452 #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2453 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2454 #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5 2455 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables Used for future indication by the Driver on a doorbell */ 2456 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 2457 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2458 #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 2459 u16_t agg_val1 /* aggregated value 1 */; 2460 #endif 2461 #if defined(__BIG_ENDIAN) 2462 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2463 u8_t __agg_vars4 /* Various aggregative variables*/; 2464 u8_t agg_vars3; 2465 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2466 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2467 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2468 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6 2469 u8_t agg_vars2; 2470 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2471 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0 2472 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2473 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 2474 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2475 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2476 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2477 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2478 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2479 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5 2480 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2481 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2482 #elif defined(__LITTLE_ENDIAN) 2483 u8_t agg_vars2; 2484 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2485 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0 2486 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2487 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 2488 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2489 #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2490 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2491 #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2492 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2493 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5 2494 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2495 #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2496 u8_t agg_vars3; 2497 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2498 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2499 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2500 #define __XSTORM_ISCSI_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6 2501 u8_t __agg_vars4 /* Various aggregative variables*/; 2502 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2503 #endif 2504 u32_t more_to_send /* The number of bytes left to send */; 2505 #if defined(__BIG_ENDIAN) 2506 u16_t agg_vars5; 2507 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2508 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0 2509 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2510 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2511 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2512 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2513 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2514 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14 2515 u16_t sq_cons /* aggregated value 4 - threshold */; 2516 #elif defined(__LITTLE_ENDIAN) 2517 u16_t sq_cons /* aggregated value 4 - threshold */; 2518 u16_t agg_vars5; 2519 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2520 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0 2521 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2522 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2523 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2524 #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2525 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2526 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14 2527 #endif 2528 struct xstorm_tcp_tcp_ag_context_section tcp /* TCP context section, shared in TOE and ISCSI */; 2529 #if defined(__BIG_ENDIAN) 2530 u16_t agg_vars7; 2531 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2532 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 2533 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3) /* BitField agg_vars7Various aggregative variables auxiliary flag 13 */ 2534 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3 2535 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4) /* BitField agg_vars7Various aggregative variables Sync Tstorm and Xstorm */ 2536 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4 2537 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2538 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6 2539 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 1 */ 2540 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8 2541 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) /* BitField agg_vars7Various aggregative variables Mask the check of the completion sequence on retransmit */ 2542 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 2543 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11) /* BitField agg_vars7Various aggregative variables Enable decision rules based on aux1_cf */ 2544 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 2545 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12) /* BitField agg_vars7Various aggregative variables auxiliary flag 10 */ 2546 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12 2547 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13) /* BitField agg_vars7Various aggregative variables auxiliary flag 11 */ 2548 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13 2549 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14) /* BitField agg_vars7Various aggregative variables auxiliary flag 12 */ 2550 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14 2551 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15) /* BitField agg_vars7Various aggregative variables auxiliary flag 2 */ 2552 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15 2553 u8_t agg_val3_th /* Aggregated value 3 - threshold */; 2554 u8_t agg_vars6; 2555 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2556 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0 2557 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2558 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3 2559 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2560 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6 2561 #elif defined(__LITTLE_ENDIAN) 2562 u8_t agg_vars6; 2563 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2564 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0 2565 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2566 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3 2567 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6) /* BitField agg_vars6Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2568 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6 2569 u8_t agg_val3_th /* Aggregated value 3 - threshold */; 2570 u16_t agg_vars7; 2571 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ,3-GT_CYC,4-GT_ABS,5-LT_CYC,6-LT_ABS */ 2572 #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 2573 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3) /* BitField agg_vars7Various aggregative variables auxiliary flag 13 */ 2574 #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3 2575 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4) /* BitField agg_vars7Various aggregative variables Sync Tstorm and Xstorm */ 2576 #define __XSTORM_ISCSI_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4 2577 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6) /* BitField agg_vars7Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2578 #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6 2579 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8) /* BitField agg_vars7Various aggregative variables auxiliary counter flag 1 */ 2580 #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8 2581 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) /* BitField agg_vars7Various aggregative variables Mask the check of the completion sequence on retransmit */ 2582 #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 2583 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11) /* BitField agg_vars7Various aggregative variables Enable decision rules based on aux1_cf */ 2584 #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 2585 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12) /* BitField agg_vars7Various aggregative variables auxiliary flag 10 */ 2586 #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12 2587 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13) /* BitField agg_vars7Various aggregative variables auxiliary flag 11 */ 2588 #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13 2589 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14) /* BitField agg_vars7Various aggregative variables auxiliary flag 12 */ 2590 #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14 2591 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15) /* BitField agg_vars7Various aggregative variables auxiliary flag 2 */ 2592 #define __XSTORM_ISCSI_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15 2593 #endif 2594 #if defined(__BIG_ENDIAN) 2595 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2596 u16_t __gen_data /* Used for Iscsi. In connection establishment, it uses as rxMss, and in connection termination, it uses as command Id: 1=L5CM_TX_ACK_ON_FIN_CMD 2=L5CM_SET_MSL_TIMER_CMD 3=L5CM_TX_RST_CMD */; 2597 #elif defined(__LITTLE_ENDIAN) 2598 u16_t __gen_data /* Used for Iscsi. In connection establishment, it uses as rxMss, and in connection termination, it uses as command Id: 1=L5CM_TX_ACK_ON_FIN_CMD 2=L5CM_SET_MSL_TIMER_CMD 3=L5CM_TX_RST_CMD */; 2599 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2600 #endif 2601 #if defined(__BIG_ENDIAN) 2602 u8_t __reserved1; 2603 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2604 u16_t __agg_val9 /* aggregated value 9 */; 2605 #elif defined(__LITTLE_ENDIAN) 2606 u16_t __agg_val9 /* aggregated value 9 */; 2607 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2608 u8_t __reserved1; 2609 #endif 2610 #if defined(__BIG_ENDIAN) 2611 u16_t hq_prod /* The HQ producer threashold to compare the HQ consumer, which is the current HQ producer +1 - AggVal2Th */; 2612 u16_t hq_cons /* HQ Consumer, updated by Cstorm - AggVal2 */; 2613 #elif defined(__LITTLE_ENDIAN) 2614 u16_t hq_cons /* HQ Consumer, updated by Cstorm - AggVal2 */; 2615 u16_t hq_prod /* The HQ producer threashold to compare the HQ consumer, which is the current HQ producer +1 - AggVal2Th */; 2616 #endif 2617 u32_t agg_vars8; 2618 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0) /* BitField agg_vars8Various aggregative variables Misc aggregated variable 2 */ 2619 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2_SHIFT 0 2620 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3 (0xFF<<24) /* BitField agg_vars8Various aggregative variables Misc aggregated variable 3 */ 2621 #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3_SHIFT 24 2622 #if defined(__BIG_ENDIAN) 2623 u16_t r2tq_prod /* Misc aggregated variable 0 */; 2624 u16_t sq_prod /* SQ Producer */; 2625 #elif defined(__LITTLE_ENDIAN) 2626 u16_t sq_prod /* SQ Producer */; 2627 u16_t r2tq_prod /* Misc aggregated variable 0 */; 2628 #endif 2629 #if defined(__BIG_ENDIAN) 2630 u8_t agg_val3 /* Aggregated value 3 */; 2631 u8_t agg_val6 /* Aggregated value 6 */; 2632 u8_t agg_val5_th /* Aggregated value 5 - threshold */; 2633 u8_t agg_val5 /* Aggregated value 5 */; 2634 #elif defined(__LITTLE_ENDIAN) 2635 u8_t agg_val5 /* Aggregated value 5 */; 2636 u8_t agg_val5_th /* Aggregated value 5 - threshold */; 2637 u8_t agg_val6 /* Aggregated value 6 */; 2638 u8_t agg_val3 /* Aggregated value 3 */; 2639 #endif 2640 #if defined(__BIG_ENDIAN) 2641 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 2642 u16_t agg_limit1 /* aggregated limit 1 */; 2643 #elif defined(__LITTLE_ENDIAN) 2644 u16_t agg_limit1 /* aggregated limit 1 */; 2645 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 2646 #endif 2647 u32_t hq_cons_tcp_seq /* TCP sequence of the HQ BD pointed by hq_cons */; 2648 u32_t exp_stat_sn /* expected status SN, updated by Ustorm */; 2649 u32_t rst_seq_num /* spare aggregated variable 5 */; 2650 }; 2651 2652 2653 2654 /* 2655 * The toe aggregative context section of Xstorm 2656 */ 2657 struct xstorm_toe_tcp_ag_context_section 2658 { 2659 #if defined(__BIG_ENDIAN) 2660 u8_t tcp_agg_vars1; 2661 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 2662 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 2663 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 2664 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 2665 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 2666 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 2667 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 2668 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 2669 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 2670 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 2671 u8_t __da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 2672 u16_t mss /* MSS used for nagle algorithm and for transmission */; 2673 #elif defined(__LITTLE_ENDIAN) 2674 u16_t mss /* MSS used for nagle algorithm and for transmission */; 2675 u8_t __da_cnt /* Counts the number of ACK requests received from the TSTORM with no registration to QM. */; 2676 u8_t tcp_agg_vars1; 2677 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) /* BitField tcp_agg_vars1Various aggregative variables Counter flag used to rewind the DA timer */ 2678 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 2679 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 2 */ 2680 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 2681 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) /* BitField tcp_agg_vars1Various aggregative variables auxiliary counter flag 3 */ 2682 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 2683 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) /* BitField tcp_agg_vars1Various aggregative variables If set enables sending clear commands as port of the DA decision rules */ 2684 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 2685 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) /* BitField tcp_agg_vars1Various aggregative variables Indicates that there was a delayed ack timer expiration */ 2686 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 2687 #endif 2688 u32_t snd_nxt /* The current sequence number to send */; 2689 u32_t tx_wnd /* The Current transmission window in bytes */; 2690 u32_t snd_una /* The current Send UNA sequence number */; 2691 u32_t local_adv_wnd /* The current local advertised window to FE. */; 2692 #if defined(__BIG_ENDIAN) 2693 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 2694 u8_t __tx_dest /* aggregated value 8 */; 2695 u16_t tcp_agg_vars2; 2696 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 2697 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 2698 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 2699 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 2700 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 2701 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 2702 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 2703 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 2704 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 2705 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 2706 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 2707 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 2708 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 2709 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 2710 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 2711 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 2712 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 2713 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 2714 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 2715 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 2716 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 2717 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 2718 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 2719 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 2720 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 2721 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 2722 #elif defined(__LITTLE_ENDIAN) 2723 u16_t tcp_agg_vars2; 2724 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) /* BitField tcp_agg_vars2Various aggregative variables Used in TOE to indicate that FIN is sent on a BD to bypass the naggle rule */ 2725 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 2726 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) /* BitField tcp_agg_vars2Various aggregative variables Enables the tx window based decision */ 2727 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 2728 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) /* BitField tcp_agg_vars2Various aggregative variables The DA Timer status. If set indicates that the delayed ACK timer is active. */ 2729 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 2730 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 3 */ 2731 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 2732 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 4 */ 2733 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 2734 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) /* BitField tcp_agg_vars2Various aggregative variables Enable DA for the specific connection */ 2735 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 2736 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux2_cf */ 2737 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 2738 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) /* BitField tcp_agg_vars2Various aggregative variables Enable decision rules based on aux3_cf */ 2739 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 2740 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) /* BitField tcp_agg_vars2Various aggregative variables Enable Decision rule based on tx_fin_flag */ 2741 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 2742 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) /* BitField tcp_agg_vars2Various aggregative variables auxiliary flag 1 */ 2743 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 2744 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) /* BitField tcp_agg_vars2Various aggregative variables counter flag for setting the rto timer */ 2745 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 2746 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) /* BitField tcp_agg_vars2Various aggregative variables timestamp was updated counter flag */ 2747 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 2748 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) /* BitField tcp_agg_vars2Various aggregative variables auxiliary counter flag 8 */ 2749 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 2750 u8_t __tx_dest /* aggregated value 8 */; 2751 u8_t __agg_val8_th /* aggregated value 8 - threshold */; 2752 #endif 2753 u32_t ack_to_far_end /* The ACK sequence to send to far end */; 2754 u32_t rto_timer /* The RTO timer value */; 2755 u32_t ka_timer /* The KA timer value */; 2756 u32_t ts_to_echo /* The time stamp value to echo to far end */; 2757 #if defined(__BIG_ENDIAN) 2758 u16_t __agg_val7_th /* aggregated value 7 - threshold */; 2759 u16_t __agg_val7 /* aggregated value 7 */; 2760 #elif defined(__LITTLE_ENDIAN) 2761 u16_t __agg_val7 /* aggregated value 7 */; 2762 u16_t __agg_val7_th /* aggregated value 7 - threshold */; 2763 #endif 2764 #if defined(__BIG_ENDIAN) 2765 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 2766 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 2767 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 2768 u8_t __force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 2769 #elif defined(__LITTLE_ENDIAN) 2770 u8_t __force_pure_ack_cnt /* The number of force ACK commands arrived from the TSTORM */; 2771 u8_t __tcp_agg_vars3 /* Various aggregative variables*/; 2772 u8_t __tcp_agg_vars4 /* Various aggregative variables*/; 2773 u8_t __tcp_agg_vars5 /* Various aggregative variables*/; 2774 #endif 2775 u32_t tcp_agg_vars6; 2776 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux7_cf */ 2777 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 0 2778 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN (0x1<<1) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux8_cf */ 2779 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN_SHIFT 1 2780 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux9_cf */ 2781 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 2 2782 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3) /* BitField tcp_agg_vars6Various aggregative variables Enable decision rules based on aux10_cf */ 2783 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 3 2784 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX6_FLAG (0x1<<4) /* BitField tcp_agg_vars6Various aggregative variables auxiliary flag 6 */ 2785 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX6_FLAG_SHIFT 4 2786 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX7_FLAG (0x1<<5) /* BitField tcp_agg_vars6Various aggregative variables auxiliary flag 7 */ 2787 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX7_FLAG_SHIFT 5 2788 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX5_CF (0x3<<6) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 5 */ 2789 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX5_CF_SHIFT 6 2790 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX9_CF (0x3<<8) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 9 */ 2791 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX9_CF_SHIFT 8 2792 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF (0x3<<10) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 10 */ 2793 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX10_CF_SHIFT 10 2794 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX11_CF (0x3<<12) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 11 */ 2795 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX11_CF_SHIFT 12 2796 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX12_CF (0x3<<14) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 12 */ 2797 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX12_CF_SHIFT 14 2798 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX13_CF (0x3<<16) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 13 */ 2799 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX13_CF_SHIFT 16 2800 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX14_CF (0x3<<18) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 14 */ 2801 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX14_CF_SHIFT 18 2802 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX15_CF (0x3<<20) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 15 */ 2803 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX15_CF_SHIFT 20 2804 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX16_CF (0x3<<22) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 16 */ 2805 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX16_CF_SHIFT 22 2806 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX17_CF (0x3<<24) /* BitField tcp_agg_vars6Various aggregative variables auxiliary counter flag 17 */ 2807 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_AUX17_CF_SHIFT 24 2808 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ECE_FLAG (0x1<<26) /* BitField tcp_agg_vars6Various aggregative variables Can be also used as general purpose if ECN is not used */ 2809 #define XSTORM_TOE_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT 26 2810 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED71 (0x1<<27) /* BitField tcp_agg_vars6Various aggregative variables Can be also used as general purpose if ECN is not used */ 2811 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_RESERVED71_SHIFT 27 2812 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY (0x1<<28) /* BitField tcp_agg_vars6Various aggregative variables This flag is set if the Force ACK count is set by the TSTORM. On QM output it is cleared. */ 2813 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY_SHIFT 28 2814 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG (0x1<<29) /* BitField tcp_agg_vars6Various aggregative variables Indicates that the connection is in autostop mode */ 2815 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG_SHIFT 29 2816 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG (0x1<<30) /* BitField tcp_agg_vars6Various aggregative variables This bit uses like a one shot that the TSTORM fires and the XSTORM arms. Used to allow a single TS update for each transmission */ 2817 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG_SHIFT 30 2818 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG (0x1<<31) /* BitField tcp_agg_vars6Various aggregative variables This bit is set by the TSTORM when need to cancel precious fast retransmit */ 2819 #define __XSTORM_TOE_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG_SHIFT 31 2820 #if defined(__BIG_ENDIAN) 2821 u16_t __agg_misc6 /* Misc aggregated variable 6 */; 2822 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 2823 #elif defined(__LITTLE_ENDIAN) 2824 u16_t __tcp_agg_vars7 /* Various aggregative variables*/; 2825 u16_t __agg_misc6 /* Misc aggregated variable 6 */; 2826 #endif 2827 u32_t __agg_val10 /* aggregated value 10 */; 2828 u32_t __agg_val10_th /* aggregated value 10 - threshold */; 2829 #if defined(__BIG_ENDIAN) 2830 u16_t __reserved3; 2831 u8_t __reserved2; 2832 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 2833 #elif defined(__LITTLE_ENDIAN) 2834 u8_t __da_only_cnt /* counts delayed acks and not window updates */; 2835 u8_t __reserved2; 2836 u16_t __reserved3; 2837 #endif 2838 }; 2839 2840 /* 2841 * The toe aggregative context of Xstorm 2842 */ 2843 struct xstorm_toe_ag_context 2844 { 2845 #if defined(__BIG_ENDIAN) 2846 u16_t agg_val1 /* aggregated value 1 */; 2847 u8_t agg_vars1; 2848 #define __XSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 2849 #define __XSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2850 #define __XSTORM_TOE_AG_CONTEXT_RESERVED50 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2851 #define __XSTORM_TOE_AG_CONTEXT_RESERVED50_SHIFT 1 2852 #define __XSTORM_TOE_AG_CONTEXT_RESERVED51 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2853 #define __XSTORM_TOE_AG_CONTEXT_RESERVED51_SHIFT 2 2854 #define __XSTORM_TOE_AG_CONTEXT_RESERVED52 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2855 #define __XSTORM_TOE_AG_CONTEXT_RESERVED52_SHIFT 3 2856 #define __XSTORM_TOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2857 #define __XSTORM_TOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2858 #define XSTORM_TOE_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2859 #define XSTORM_TOE_AG_CONTEXT_NAGLE_EN_SHIFT 5 2860 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables used to indicate last doorbell for specific connection */ 2861 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_SHIFT 6 2862 #define __XSTORM_TOE_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2863 #define __XSTORM_TOE_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 2864 u8_t __state /* The state of the connection */; 2865 #elif defined(__LITTLE_ENDIAN) 2866 u8_t __state /* The state of the connection */; 2867 u8_t agg_vars1; 2868 #define __XSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 0 */ 2869 #define __XSTORM_TOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 2870 #define __XSTORM_TOE_AG_CONTEXT_RESERVED50 (0x1<<1) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 1 */ 2871 #define __XSTORM_TOE_AG_CONTEXT_RESERVED50_SHIFT 1 2872 #define __XSTORM_TOE_AG_CONTEXT_RESERVED51 (0x1<<2) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 2 */ 2873 #define __XSTORM_TOE_AG_CONTEXT_RESERVED51_SHIFT 2 2874 #define __XSTORM_TOE_AG_CONTEXT_RESERVED52 (0x1<<3) /* BitField agg_vars1Various aggregative variables The connection is currently registered to the QM with queue index 3 */ 2875 #define __XSTORM_TOE_AG_CONTEXT_RESERVED52_SHIFT 3 2876 #define __XSTORM_TOE_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) /* BitField agg_vars1Various aggregative variables Enables the decision rule of more_to_Send > 0 */ 2877 #define __XSTORM_TOE_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 2878 #define XSTORM_TOE_AG_CONTEXT_NAGLE_EN (0x1<<5) /* BitField agg_vars1Various aggregative variables Enables the nagle decision */ 2879 #define XSTORM_TOE_AG_CONTEXT_NAGLE_EN_SHIFT 5 2880 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG (0x1<<6) /* BitField agg_vars1Various aggregative variables used to indicate last doorbell for specific connection */ 2881 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_SHIFT 6 2882 #define __XSTORM_TOE_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) /* BitField agg_vars1Various aggregative variables Enable decision rules based on equality between snd_una and snd_nxt */ 2883 #define __XSTORM_TOE_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 2884 u16_t agg_val1 /* aggregated value 1 */; 2885 #endif 2886 #if defined(__BIG_ENDIAN) 2887 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2888 u8_t __agg_vars4 /* Various aggregative variables*/; 2889 u8_t agg_vars3; 2890 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2891 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2892 #define __XSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q1_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2893 #define __XSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q1_CF_SHIFT 6 2894 u8_t agg_vars2; 2895 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2896 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_SHIFT 0 2897 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2898 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_EN_SHIFT 2 2899 #define __XSTORM_TOE_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2900 #define __XSTORM_TOE_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2901 #define __XSTORM_TOE_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2902 #define __XSTORM_TOE_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2903 #define XSTORM_TOE_AG_CONTEXT_RESERVED53 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2904 #define XSTORM_TOE_AG_CONTEXT_RESERVED53_SHIFT 5 2905 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2906 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2907 #elif defined(__LITTLE_ENDIAN) 2908 u8_t agg_vars2; 2909 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF (0x3<<0) /* BitField agg_vars2Various aggregative variables auxiliary counter flag 4 */ 2910 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_SHIFT 0 2911 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_EN (0x1<<2) /* BitField agg_vars2Various aggregative variables Enable decision rule based on dq_spare_flag */ 2912 #define __XSTORM_TOE_AG_CONTEXT_DQ_FLUSH_FLAG_EN_SHIFT 2 2913 #define __XSTORM_TOE_AG_CONTEXT_AUX8_FLAG (0x1<<3) /* BitField agg_vars2Various aggregative variables auxiliary flag 8 */ 2914 #define __XSTORM_TOE_AG_CONTEXT_AUX8_FLAG_SHIFT 3 2915 #define __XSTORM_TOE_AG_CONTEXT_AUX9_FLAG (0x1<<4) /* BitField agg_vars2Various aggregative variables auxiliary flag 9 */ 2916 #define __XSTORM_TOE_AG_CONTEXT_AUX9_FLAG_SHIFT 4 2917 #define XSTORM_TOE_AG_CONTEXT_RESERVED53 (0x3<<5) /* BitField agg_vars2Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2918 #define XSTORM_TOE_AG_CONTEXT_RESERVED53_SHIFT 5 2919 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) /* BitField agg_vars2Various aggregative variables Enable decision rules based on aux4_cf */ 2920 #define __XSTORM_TOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 2921 u8_t agg_vars3; 2922 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) /* BitField agg_vars3Various aggregative variables The physical queue number of queue index 2 */ 2923 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 2924 #define __XSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q1_CF (0x3<<6) /* BitField agg_vars3Various aggregative variables auxiliary counter flag 19 */ 2925 #define __XSTORM_TOE_AG_CONTEXT_QUEUES_FLUSH_Q1_CF_SHIFT 6 2926 u8_t __agg_vars4 /* Various aggregative variables*/; 2927 u8_t cdu_reserved /* Used by the CDU for validation and debugging */; 2928 #endif 2929 u32_t more_to_send /* The number of bytes left to send */; 2930 #if defined(__BIG_ENDIAN) 2931 u16_t agg_vars5; 2932 #define __XSTORM_TOE_AG_CONTEXT_RESERVED54 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2933 #define __XSTORM_TOE_AG_CONTEXT_RESERVED54_SHIFT 0 2934 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2935 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2936 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2937 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2938 #define __XSTORM_TOE_AG_CONTEXT_RESERVED56 (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2939 #define __XSTORM_TOE_AG_CONTEXT_RESERVED56_SHIFT 14 2940 u16_t __agg_val4_th /* aggregated value 4 - threshold */; 2941 #elif defined(__LITTLE_ENDIAN) 2942 u16_t __agg_val4_th /* aggregated value 4 - threshold */; 2943 u16_t agg_vars5; 2944 #define __XSTORM_TOE_AG_CONTEXT_RESERVED54 (0x3<<0) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2945 #define __XSTORM_TOE_AG_CONTEXT_RESERVED54_SHIFT 0 2946 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 0 */ 2947 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 2948 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) /* BitField agg_vars5Various aggregative variables The physical queue number of queue index 1 */ 2949 #define XSTORM_TOE_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 2950 #define __XSTORM_TOE_AG_CONTEXT_RESERVED56 (0x3<<14) /* BitField agg_vars5Various aggregative variables 0-NOP,1-EQ,2-NEQ */ 2951 #define __XSTORM_TOE_AG_CONTEXT_RESERVED56_SHIFT 14 2952 #endif 2953 struct xstorm_toe_tcp_ag_context_section tcp /* TCP context section, shared in TOE and ISCSI */; 2954 #if defined(__BIG_ENDIAN) 2955 u16_t __agg_vars7 /* Various aggregative variables*/; 2956 u8_t __agg_val3_th /* Aggregated value 3 - threshold */; 2957 u8_t __agg_vars6 /* Various aggregative variables*/; 2958 #elif defined(__LITTLE_ENDIAN) 2959 u8_t __agg_vars6 /* Various aggregative variables*/; 2960 u8_t __agg_val3_th /* Aggregated value 3 - threshold */; 2961 u16_t __agg_vars7 /* Various aggregative variables*/; 2962 #endif 2963 #if defined(__BIG_ENDIAN) 2964 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2965 u16_t __agg_val11 /* aggregated value 11 */; 2966 #elif defined(__LITTLE_ENDIAN) 2967 u16_t __agg_val11 /* aggregated value 11 */; 2968 u16_t __agg_val11_th /* aggregated value 11 - threshold */; 2969 #endif 2970 #if defined(__BIG_ENDIAN) 2971 u8_t __reserved1; 2972 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2973 u16_t __agg_val9 /* aggregated value 9 */; 2974 #elif defined(__LITTLE_ENDIAN) 2975 u16_t __agg_val9 /* aggregated value 9 */; 2976 u8_t __agg_val6_th /* aggregated value 6 - threshold */; 2977 u8_t __reserved1; 2978 #endif 2979 #if defined(__BIG_ENDIAN) 2980 u16_t __agg_val2_th /* Aggregated value 2 - threshold */; 2981 u16_t cmp_bd_cons /* BD Consumer from the Completor */; 2982 #elif defined(__LITTLE_ENDIAN) 2983 u16_t cmp_bd_cons /* BD Consumer from the Completor */; 2984 u16_t __agg_val2_th /* Aggregated value 2 - threshold */; 2985 #endif 2986 u32_t __agg_vars8 /* Various aggregative variables*/; 2987 #if defined(__BIG_ENDIAN) 2988 u16_t __agg_misc0 /* Misc aggregated variable 0 */; 2989 u16_t __agg_val4 /* aggregated value 4 */; 2990 #elif defined(__LITTLE_ENDIAN) 2991 u16_t __agg_val4 /* aggregated value 4 */; 2992 u16_t __agg_misc0 /* Misc aggregated variable 0 */; 2993 #endif 2994 #if defined(__BIG_ENDIAN) 2995 u8_t __agg_val3 /* Aggregated value 3 */; 2996 u8_t __agg_val6 /* Aggregated value 6 */; 2997 u8_t __agg_val5_th /* Aggregated value 5 - threshold */; 2998 u8_t __agg_val5 /* Aggregated value 5 */; 2999 #elif defined(__LITTLE_ENDIAN) 3000 u8_t __agg_val5 /* Aggregated value 5 */; 3001 u8_t __agg_val5_th /* Aggregated value 5 - threshold */; 3002 u8_t __agg_val6 /* Aggregated value 6 */; 3003 u8_t __agg_val3 /* Aggregated value 3 */; 3004 #endif 3005 #if defined(__BIG_ENDIAN) 3006 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 3007 u16_t __bd_ind_max_val /* modulo value for bd_prod */; 3008 #elif defined(__LITTLE_ENDIAN) 3009 u16_t __bd_ind_max_val /* modulo value for bd_prod */; 3010 u16_t __agg_misc1 /* Spare value for aggregation. NOTE: this value is used in the retransmit decision rule if CmpSeqDecMask is 0. In that case it is intended to be CmpBdSize. */; 3011 #endif 3012 u32_t cmp_bd_start_seq /* The sequence number of the start completion point (BD) */; 3013 u32_t cmp_bd_page_0_to_31 /* Misc aggregated variable 4 */; 3014 u32_t cmp_bd_page_32_to_63 /* spare aggregated variable 5 */; 3015 }; 3016 3017 3018 3019 /* 3020 * doorbell message sent to the chip 3021 */ 3022 struct doorbell 3023 { 3024 #if defined(__BIG_ENDIAN) 3025 u16_t zero_fill2 /* driver must zero this field! */; 3026 u8_t zero_fill1 /* driver must zero this field! */; 3027 struct doorbell_hdr_t header; 3028 #elif defined(__LITTLE_ENDIAN) 3029 struct doorbell_hdr_t header; 3030 u8_t zero_fill1 /* driver must zero this field! */; 3031 u16_t zero_fill2 /* driver must zero this field! */; 3032 #endif 3033 }; 3034 3035 3036 3037 /* 3038 * doorbell message sent to the chip 3039 */ 3040 struct doorbell_set_prod 3041 { 3042 #if defined(__BIG_ENDIAN) 3043 u16_t prod /* Producer index to be set */; 3044 u8_t zero_fill1 /* driver must zero this field! */; 3045 struct doorbell_hdr_t header; 3046 #elif defined(__LITTLE_ENDIAN) 3047 struct doorbell_hdr_t header; 3048 u8_t zero_fill1 /* driver must zero this field! */; 3049 u16_t prod /* Producer index to be set */; 3050 #endif 3051 }; 3052 3053 3054 struct regpair_native_t 3055 { 3056 u32_t lo /* low word for reg-pair */; 3057 u32_t hi /* high word for reg-pair */; 3058 }; 3059 3060 3061 struct regpair_t 3062 { 3063 u32_t lo /* low word for reg-pair */; 3064 u32_t hi /* high word for reg-pair */; 3065 }; 3066 3067 3068 3069 3070 3071 3072 3073 /* 3074 * Classify rule opcodes in E2/E3 3075 */ 3076 enum classify_rule 3077 { 3078 CLASSIFY_RULE_OPCODE_MAC /* Add/remove a MAC address */, 3079 CLASSIFY_RULE_OPCODE_VLAN /* Add/remove a VLAN */, 3080 CLASSIFY_RULE_OPCODE_PAIR /* Add/remove a MAC-VLAN pair */, 3081 CLASSIFY_RULE_OPCODE_VXLAN /* Add/remove a VXLAN entry (Inner MAC / VNI pair) */, 3082 MAX_CLASSIFY_RULE}; 3083 3084 3085 /* 3086 * Classify rule types in E2/E3 3087 */ 3088 enum classify_rule_action_type 3089 { 3090 CLASSIFY_RULE_REMOVE, 3091 CLASSIFY_RULE_ADD, 3092 MAX_CLASSIFY_RULE_ACTION_TYPE}; 3093 3094 3095 /* 3096 * client init ramrod data $$KEEP_ENDIANNESS$$ 3097 */ 3098 struct client_init_general_data 3099 { 3100 u8_t client_id /* client_id */; 3101 u8_t statistics_counter_id /* statistics counter id */; 3102 u8_t statistics_en_flg /* statistics en flg */; 3103 u8_t is_fcoe_flg /* is this an fcoe connection. (1 bit is used) */; 3104 u8_t activate_flg /* if 0 - the client is deactivate else the client is activate client (1 bit is used) */; 3105 u8_t sp_client_id /* the slow path rings client Id. */; 3106 u16_t mtu /* Host MTU from client config */; 3107 u8_t statistics_zero_flg /* if set FW will reset the statistic counter of this client */; 3108 u8_t func_id /* PCI function ID (0-71) */; 3109 u8_t cos /* The connection cos, if applicable */; 3110 u8_t traffic_type; 3111 u8_t fp_hsi_ver /* Hsi version */; 3112 u8_t reserved0[3]; 3113 }; 3114 3115 3116 /* 3117 * client init rx data $$KEEP_ENDIANNESS$$ 3118 */ 3119 struct client_init_rx_data 3120 { 3121 u8_t tpa_en; 3122 #define CLIENT_INIT_RX_DATA_TPA_EN_IPV4 (0x1<<0) /* BitField tpa_entpa_enable tpa enable flg ipv4 */ 3123 #define CLIENT_INIT_RX_DATA_TPA_EN_IPV4_SHIFT 0 3124 #define CLIENT_INIT_RX_DATA_TPA_EN_IPV6 (0x1<<1) /* BitField tpa_entpa_enable tpa enable flg ipv6 */ 3125 #define CLIENT_INIT_RX_DATA_TPA_EN_IPV6_SHIFT 1 3126 #define CLIENT_INIT_RX_DATA_TPA_MODE (0x1<<2) /* BitField tpa_entpa_enable tpa mode (LRO or GRO) (use enum tpa_mode) */ 3127 #define CLIENT_INIT_RX_DATA_TPA_MODE_SHIFT 2 3128 #define CLIENT_INIT_RX_DATA_RESERVED5 (0x1F<<3) /* BitField tpa_entpa_enable */ 3129 #define CLIENT_INIT_RX_DATA_RESERVED5_SHIFT 3 3130 u8_t vmqueue_mode_en_flg /* If set, working in VMQueue mode (always consume one sge) */; 3131 u8_t extra_data_over_sgl_en_flg /* if set, put over sgl data from end of input message */; 3132 u8_t cache_line_alignment_log_size /* The log size of cache line alignment in bytes. Must be a power of 2. */; 3133 u8_t enable_dynamic_hc /* If set, dynamic HC is enabled */; 3134 u8_t max_sges_for_packet /* The maximal number of SGEs that can be used for one packet. depends on MTU and SGE size. must be 0 if SGEs are disabled */; 3135 u8_t client_qzone_id /* used in E2 only, to specify the HW queue zone ID used for this client rx producers */; 3136 u8_t drop_ip_cs_err_flg /* If set, this client drops packets with IP checksum error */; 3137 u8_t drop_tcp_cs_err_flg /* If set, this client drops packets with TCP checksum error */; 3138 u8_t drop_ttl0_flg /* If set, this client drops packets with TTL=0 */; 3139 u8_t drop_udp_cs_err_flg /* If set, this client drops packets with UDP checksum error */; 3140 u8_t inner_vlan_removal_enable_flg /* If set, inner VLAN removal is enabled for this client */; 3141 u8_t outer_vlan_removal_enable_flg /* If set, outer VLAN removal is enabled for this client */; 3142 u8_t status_block_id /* rx status block id */; 3143 u8_t rx_sb_index_number /* status block indices */; 3144 u8_t dont_verify_rings_pause_thr_flg /* If set, the rings pause thresholds will not be verified by firmware. */; 3145 u8_t max_tpa_queues /* maximal TPA queues allowed for this client */; 3146 u8_t silent_vlan_removal_flg /* if set, and the vlan is equal to requested vlan according to mask, the vlan will be remove without notifying the driver */; 3147 u16_t max_bytes_on_bd /* Maximum bytes that can be placed on a BD. The BD allocated size should include 2 more bytes (ip alignment) and alignment size (in case the address is not aligned) */; 3148 u16_t sge_buff_size /* Size of the buffers pointed by SGEs */; 3149 u8_t approx_mcast_engine_id /* In Everest2, if is_approx_mcast is set, this field specified which approximate multicast engine is associate with this client */; 3150 u8_t rss_engine_id /* In Everest2, if rss_mode is set, this field specified which RSS engine is associate with this client */; 3151 struct regpair_t bd_page_base /* BD page base address at the host */; 3152 struct regpair_t sge_page_base /* SGE page base address at the host */; 3153 struct regpair_t cqe_page_base /* Completion queue base address */; 3154 u8_t is_leading_rss; 3155 u8_t is_approx_mcast; 3156 u16_t max_agg_size /* maximal size for the aggregated TPA packets, reprted by the host */; 3157 u16_t state; 3158 #define CLIENT_INIT_RX_DATA_UCAST_DROP_ALL (0x1<<0) /* BitField staterx filters state drop all unicast packets */ 3159 #define CLIENT_INIT_RX_DATA_UCAST_DROP_ALL_SHIFT 0 3160 #define CLIENT_INIT_RX_DATA_UCAST_ACCEPT_ALL (0x1<<1) /* BitField staterx filters state accept all unicast packets (subject to vlan) */ 3161 #define CLIENT_INIT_RX_DATA_UCAST_ACCEPT_ALL_SHIFT 1 3162 #define CLIENT_INIT_RX_DATA_UCAST_ACCEPT_UNMATCHED (0x1<<2) /* BitField staterx filters state accept all unmatched unicast packets (subject to vlan) */ 3163 #define CLIENT_INIT_RX_DATA_UCAST_ACCEPT_UNMATCHED_SHIFT 2 3164 #define CLIENT_INIT_RX_DATA_MCAST_DROP_ALL (0x1<<3) /* BitField staterx filters state drop all multicast packets */ 3165 #define CLIENT_INIT_RX_DATA_MCAST_DROP_ALL_SHIFT 3 3166 #define CLIENT_INIT_RX_DATA_MCAST_ACCEPT_ALL (0x1<<4) /* BitField staterx filters state accept all multicast packets (subject to vlan) */ 3167 #define CLIENT_INIT_RX_DATA_MCAST_ACCEPT_ALL_SHIFT 4 3168 #define CLIENT_INIT_RX_DATA_BCAST_ACCEPT_ALL (0x1<<5) /* BitField staterx filters state accept all broadcast packets (subject to vlan) */ 3169 #define CLIENT_INIT_RX_DATA_BCAST_ACCEPT_ALL_SHIFT 5 3170 #define CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN (0x1<<6) /* BitField staterx filters state accept packets matched only by MAC (without checking vlan) */ 3171 #define CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN_SHIFT 6 3172 #define CLIENT_INIT_RX_DATA_RESERVED2 (0x1FF<<7) /* BitField staterx filters state */ 3173 #define CLIENT_INIT_RX_DATA_RESERVED2_SHIFT 7 3174 u16_t cqe_pause_thr_low /* number of remaining cqes under which, we send pause message */; 3175 u16_t cqe_pause_thr_high /* number of remaining cqes above which, we send un-pause message */; 3176 u16_t bd_pause_thr_low /* number of remaining bds under which, we send pause message */; 3177 u16_t bd_pause_thr_high /* number of remaining bds above which, we send un-pause message */; 3178 u16_t sge_pause_thr_low /* number of remaining sges under which, we send pause message */; 3179 u16_t sge_pause_thr_high /* number of remaining sges above which, we send un-pause message */; 3180 u16_t rx_cos_mask /* the bits that will be set on pfc/ safc paket whith will be genratet when this ring is full. for regular flow control set this to 1 */; 3181 u16_t silent_vlan_value /* The vlan to compare, in case, silent vlan is set */; 3182 u16_t silent_vlan_mask /* The vlan mask, in case, silent vlan is set */; 3183 u8_t handle_ptp_pkts_flg /* If set, this client handles PTP Packets */; 3184 u8_t reserved6[3]; 3185 u32_t reserved7; 3186 }; 3187 3188 /* 3189 * client init tx data $$KEEP_ENDIANNESS$$ 3190 */ 3191 struct client_init_tx_data 3192 { 3193 u8_t enforce_security_flg /* if set, security checks will be made for this connection */; 3194 u8_t tx_status_block_id /* the number of status block to update */; 3195 u8_t tx_sb_index_number /* the index to use inside the status block */; 3196 u8_t tss_leading_client_id /* client ID of the leading TSS client, for TX classification source knock out */; 3197 u8_t tx_switching_flg /* if set, tx switching will be done to packets on this connection */; 3198 u8_t anti_spoofing_flg /* if set, anti spoofing check will be done to packets on this connection */; 3199 u16_t default_vlan /* default vlan tag (id+pri). (valid if default_vlan_flg is set) */; 3200 struct regpair_t tx_bd_page_base /* BD page base address at the host for TxBdCons */; 3201 u16_t state; 3202 #define CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL (0x1<<0) /* BitField statetx filters state accept all unicast packets (subject to vlan) */ 3203 #define CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL_SHIFT 0 3204 #define CLIENT_INIT_TX_DATA_MCAST_ACCEPT_ALL (0x1<<1) /* BitField statetx filters state accept all multicast packets (subject to vlan) */ 3205 #define CLIENT_INIT_TX_DATA_MCAST_ACCEPT_ALL_SHIFT 1 3206 #define CLIENT_INIT_TX_DATA_BCAST_ACCEPT_ALL (0x1<<2) /* BitField statetx filters state accept all broadcast packets (subject to vlan) */ 3207 #define CLIENT_INIT_TX_DATA_BCAST_ACCEPT_ALL_SHIFT 2 3208 #define CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN (0x1<<3) /* BitField statetx filters state accept packets matched only by MAC (without checking vlan) */ 3209 #define CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN_SHIFT 3 3210 #define CLIENT_INIT_TX_DATA_RESERVED0 (0xFFF<<4) /* BitField statetx filters state */ 3211 #define CLIENT_INIT_TX_DATA_RESERVED0_SHIFT 4 3212 u8_t default_vlan_flg /* is default vlan valid for this client. */; 3213 u8_t force_default_pri_flg /* if set, force default priority */; 3214 u8_t tunnel_lso_inc_ip_id /* In case of LSO over IPv4 tunnel, whether to increment IP ID on external IP header or internal IP header */; 3215 u8_t refuse_outband_vlan_flg /* if set, the FW will not add outband vlan on packet (even if will exist on BD). */; 3216 u8_t tunnel_non_lso_pcsum_location /* In case of non-Lso encapsulated packets with L4 checksum offload, the pseudo checksum location - on packet or on BD. */; 3217 u8_t tunnel_non_lso_outer_ip_csum_location /* In case of non-Lso encapsulated packets with outer L3 ip checksum offload, the pseudo checksum location - on packet or on BD. */; 3218 }; 3219 3220 /* 3221 * client init ramrod data $$KEEP_ENDIANNESS$$ 3222 */ 3223 struct client_init_ramrod_data 3224 { 3225 struct client_init_general_data general /* client init general data */; 3226 struct client_init_rx_data rx /* client init rx data */; 3227 struct client_init_tx_data tx /* client init tx data */; 3228 }; 3229 3230 3231 3232 3233 /* 3234 * client update ramrod data $$KEEP_ENDIANNESS$$ 3235 */ 3236 struct client_update_ramrod_data 3237 { 3238 u8_t client_id /* the client to update */; 3239 u8_t func_id /* PCI function ID this client belongs to (0-71) */; 3240 u8_t inner_vlan_removal_enable_flg /* If set, inner VLAN removal is enabled for this client, will be change according to change flag */; 3241 u8_t inner_vlan_removal_change_flg /* If set, inner VLAN removal flag will be set according to the enable flag */; 3242 u8_t outer_vlan_removal_enable_flg /* If set, outer VLAN removal is enabled for this client, will be change according to change flag */; 3243 u8_t outer_vlan_removal_change_flg /* If set, outer VLAN removal flag will be set according to the enable flag */; 3244 u8_t anti_spoofing_enable_flg /* If set, anti spoofing is enabled for this client, will be change according to change flag */; 3245 u8_t anti_spoofing_change_flg /* If set, anti spoofing flag will be set according to anti spoofing flag */; 3246 u8_t activate_flg /* if 0 - the client is deactivate else the client is activate client (1 bit is used) */; 3247 u8_t activate_change_flg /* If set, activate_flg will be checked */; 3248 u16_t default_vlan /* default vlan tag (id+pri). (valid if default_vlan_flg is set) */; 3249 u8_t default_vlan_enable_flg; 3250 u8_t default_vlan_change_flg; 3251 u16_t silent_vlan_value /* The vlan to compare, in case, silent vlan is set */; 3252 u16_t silent_vlan_mask /* The vlan mask, in case, silent vlan is set */; 3253 u8_t silent_vlan_removal_flg /* if set, and the vlan is equal to requested vlan according to mask, the vlan will be remove without notifying the driver */; 3254 u8_t silent_vlan_change_flg; 3255 u8_t refuse_outband_vlan_flg /* If set, the FW will not add outband vlan on packet (even if will exist on BD). */; 3256 u8_t refuse_outband_vlan_change_flg /* If set, refuse_outband_vlan_flg will be updated. */; 3257 u8_t tx_switching_flg /* If set, tx switching will be done to packets on this connection. */; 3258 u8_t tx_switching_change_flg /* If set, tx_switching_flg will be updated. */; 3259 u8_t handle_ptp_pkts_flg /* If set, this client handles PTP Packets */; 3260 u8_t handle_ptp_pkts_change_flg /* If set, handle_ptp_pkts_flg will be updated. */; 3261 u16_t reserved1; 3262 u32_t echo /* echo value to be sent to driver on event ring */; 3263 }; 3264 3265 3266 /* 3267 * The eth storm context of Cstorm 3268 */ 3269 struct cstorm_eth_st_context 3270 { 3271 u32_t __reserved0[4]; 3272 }; 3273 3274 3275 struct double_regpair 3276 { 3277 u32_t regpair0_lo /* low word for reg-pair0 */; 3278 u32_t regpair0_hi /* high word for reg-pair0 */; 3279 u32_t regpair1_lo /* low word for reg-pair1 */; 3280 u32_t regpair1_hi /* high word for reg-pair1 */; 3281 }; 3282 3283 3284 /* 3285 * 2nd parse bd type used in ethernet tx BDs 3286 */ 3287 enum eth_2nd_parse_bd_type 3288 { 3289 ETH_2ND_PARSE_BD_TYPE_LSO_TUNNEL, 3290 MAX_ETH_2ND_PARSE_BD_TYPE}; 3291 3292 3293 /* 3294 * Ethernet address typesm used in ethernet tx BDs 3295 */ 3296 enum eth_addr_type 3297 { 3298 UNKNOWN_ADDRESS, 3299 UNICAST_ADDRESS, 3300 MULTICAST_ADDRESS, 3301 BROADCAST_ADDRESS, 3302 MAX_ETH_ADDR_TYPE}; 3303 3304 3305 /* 3306 * $$KEEP_ENDIANNESS$$ 3307 */ 3308 struct eth_classify_cmd_header 3309 { 3310 u8_t cmd_general_data; 3311 #define ETH_CLASSIFY_CMD_HEADER_RX_CMD (0x1<<0) /* BitField cmd_general_data should this cmd be applied for Rx */ 3312 #define ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT 0 3313 #define ETH_CLASSIFY_CMD_HEADER_TX_CMD (0x1<<1) /* BitField cmd_general_data should this cmd be applied for Tx */ 3314 #define ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT 1 3315 #define ETH_CLASSIFY_CMD_HEADER_OPCODE (0x3<<2) /* BitField cmd_general_data command opcode for MAC/VLAN/PAIR/VXLAN (use enum classify_rule) */ 3316 #define ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT 2 3317 #define ETH_CLASSIFY_CMD_HEADER_IS_ADD (0x1<<4) /* BitField cmd_general_data (use enum classify_rule_action_type) */ 3318 #define ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT 4 3319 #define ETH_CLASSIFY_CMD_HEADER_RESERVED0 (0x7<<5) /* BitField cmd_general_data */ 3320 #define ETH_CLASSIFY_CMD_HEADER_RESERVED0_SHIFT 5 3321 u8_t func_id /* the function id */; 3322 u8_t client_id; 3323 u8_t reserved1; 3324 }; 3325 3326 3327 /* 3328 * header for eth classification config ramrod $$KEEP_ENDIANNESS$$ 3329 */ 3330 struct eth_classify_header 3331 { 3332 u8_t rule_cnt /* number of rules in classification config ramrod */; 3333 u8_t reserved0; 3334 u16_t reserved1; 3335 u32_t echo /* echo value to be sent to driver on event ring */; 3336 }; 3337 3338 3339 /* 3340 * Command for adding/removing a MAC classification rule $$KEEP_ENDIANNESS$$ 3341 */ 3342 struct eth_classify_mac_cmd 3343 { 3344 struct eth_classify_cmd_header header; 3345 u16_t reserved0; 3346 u16_t inner_mac; 3347 u16_t mac_lsb; 3348 u16_t mac_mid; 3349 u16_t mac_msb; 3350 u16_t reserved1; 3351 }; 3352 3353 3354 /* 3355 * Command for adding/removing a MAC-VLAN pair classification rule $$KEEP_ENDIANNESS$$ 3356 */ 3357 struct eth_classify_pair_cmd 3358 { 3359 struct eth_classify_cmd_header header; 3360 u16_t reserved0; 3361 u16_t inner_mac; 3362 u16_t mac_lsb; 3363 u16_t mac_mid; 3364 u16_t mac_msb; 3365 u16_t vlan; 3366 }; 3367 3368 3369 /* 3370 * Command for adding/removing a VLAN classification rule $$KEEP_ENDIANNESS$$ 3371 */ 3372 struct eth_classify_vlan_cmd 3373 { 3374 struct eth_classify_cmd_header header; 3375 u32_t reserved0; 3376 u32_t reserved1; 3377 u16_t reserved2; 3378 u16_t vlan; 3379 }; 3380 3381 /* 3382 * Command for adding/removing a VXLAN classification rule $$KEEP_ENDIANNESS$$ 3383 */ 3384 struct eth_classify_vxlan_cmd 3385 { 3386 struct eth_classify_cmd_header header; 3387 u32_t vni; 3388 u16_t inner_mac_lsb; 3389 u16_t inner_mac_mid; 3390 u16_t inner_mac_msb; 3391 u16_t reserved1; 3392 }; 3393 3394 /* 3395 * union for eth classification rule $$KEEP_ENDIANNESS$$ 3396 */ 3397 union eth_classify_rule_cmd 3398 { 3399 struct eth_classify_mac_cmd mac; 3400 struct eth_classify_vlan_cmd vlan; 3401 struct eth_classify_pair_cmd pair; 3402 struct eth_classify_vxlan_cmd vxlan; 3403 }; 3404 3405 /* 3406 * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ 3407 */ 3408 struct eth_classify_rules_ramrod_data 3409 { 3410 struct eth_classify_header header; 3411 union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; 3412 }; 3413 3414 3415 3416 3417 3418 /* 3419 * The data contain client ID need to the ramrod $$KEEP_ENDIANNESS$$ 3420 */ 3421 struct eth_common_ramrod_data 3422 { 3423 u32_t client_id /* id of this client. (5 bits are used) */; 3424 u32_t reserved1; 3425 }; 3426 3427 3428 /* 3429 * The eth storm context of Ustorm 3430 */ 3431 struct ustorm_eth_st_context 3432 { 3433 u32_t reserved0[52]; 3434 }; 3435 3436 /* 3437 * The eth storm context of Tstorm 3438 */ 3439 struct tstorm_eth_st_context 3440 { 3441 u32_t __reserved0[28]; 3442 }; 3443 3444 /* 3445 * The eth storm context of Xstorm 3446 */ 3447 struct xstorm_eth_st_context 3448 { 3449 u32_t reserved0[60]; 3450 }; 3451 3452 /* 3453 * Ethernet connection context 3454 */ 3455 struct eth_context 3456 { 3457 struct ustorm_eth_st_context ustorm_st_context /* Ustorm storm context */; 3458 struct tstorm_eth_st_context tstorm_st_context /* Tstorm storm context */; 3459 struct xstorm_eth_ag_context xstorm_ag_context /* Xstorm aggregative context */; 3460 struct tstorm_eth_ag_context tstorm_ag_context /* Tstorm aggregative context */; 3461 struct cstorm_eth_ag_context cstorm_ag_context /* Cstorm aggregative context */; 3462 struct ustorm_eth_ag_context ustorm_ag_context /* Ustorm aggregative context */; 3463 struct timers_block_context timers_context /* Timers block context */; 3464 struct xstorm_eth_st_context xstorm_st_context /* Xstorm storm context */; 3465 struct cstorm_eth_st_context cstorm_st_context /* Cstorm storm context */; 3466 }; 3467 3468 3469 /* 3470 * union for sgl and raw data. 3471 */ 3472 union eth_sgl_or_raw_data 3473 { 3474 u16_t sgl[8] /* Scatter-gather list of SGEs used by this packet. This list includes the indices of the SGEs. */; 3475 u32_t raw_data[4] /* raw data from Tstorm to the driver. */; 3476 }; 3477 3478 /* 3479 * eth FP end aggregation CQE parameters struct $$KEEP_ENDIANNESS$$ 3480 */ 3481 struct eth_end_agg_rx_cqe 3482 { 3483 u8_t type_error_flags; 3484 #define ETH_END_AGG_RX_CQE_TYPE (0x3<<0) /* BitField type_error_flags (use enum eth_rx_cqe_type) */ 3485 #define ETH_END_AGG_RX_CQE_TYPE_SHIFT 0 3486 #define ETH_END_AGG_RX_CQE_SGL_RAW_SEL (0x1<<2) /* BitField type_error_flags (use enum eth_rx_fp_sel) */ 3487 #define ETH_END_AGG_RX_CQE_SGL_RAW_SEL_SHIFT 2 3488 #define ETH_END_AGG_RX_CQE_RESERVED0 (0x1F<<3) /* BitField type_error_flags */ 3489 #define ETH_END_AGG_RX_CQE_RESERVED0_SHIFT 3 3490 u8_t reserved1; 3491 u8_t queue_index /* The aggregation queue index of this packet */; 3492 u8_t reserved2; 3493 u32_t timestamp_delta /* timestamp delta between first packet to last packet in aggregation */; 3494 u16_t num_of_coalesced_segs /* Num of coalesced segments. */; 3495 u16_t pkt_len /* Packet length */; 3496 u8_t pure_ack_count /* Number of pure acks coalesced. */; 3497 u8_t reserved3; 3498 u16_t reserved4; 3499 union eth_sgl_or_raw_data sgl_or_raw_data /* union for sgl and raw data. */; 3500 u32_t reserved5[8]; 3501 }; 3502 3503 3504 /* 3505 * regular eth FP CQE parameters struct $$KEEP_ENDIANNESS$$ 3506 */ 3507 struct eth_fast_path_rx_cqe 3508 { 3509 u8_t type_error_flags; 3510 #define ETH_FAST_PATH_RX_CQE_TYPE (0x3<<0) /* BitField type_error_flags (use enum eth_rx_cqe_type) */ 3511 #define ETH_FAST_PATH_RX_CQE_TYPE_SHIFT 0 3512 #define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x1<<2) /* BitField type_error_flags (use enum eth_rx_fp_sel) */ 3513 #define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 2 3514 #define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<3) /* BitField type_error_flags Physical layer errors */ 3515 #define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 3 3516 #define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<4) /* BitField type_error_flags IP checksum error */ 3517 #define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 4 3518 #define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<5) /* BitField type_error_flags TCP/UDP checksum error */ 3519 #define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 5 3520 #define ETH_FAST_PATH_RX_CQE_PTP_PKT (0x1<<6) /* BitField type_error_flags Is a PTP Timesync Packet */ 3521 #define ETH_FAST_PATH_RX_CQE_PTP_PKT_SHIFT 6 3522 #define ETH_FAST_PATH_RX_CQE_RESERVED0 (0x1<<7) /* BitField type_error_flags */ 3523 #define ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT 7 3524 u8_t status_flags; 3525 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE (0x7<<0) /* BitField status_flags (use enum eth_rss_hash_type) */ 3526 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT 0 3527 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG (0x1<<3) /* BitField status_flags RSS hashing on/off */ 3528 #define ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG_SHIFT 3 3529 #define ETH_FAST_PATH_RX_CQE_BROADCAST_FLG (0x1<<4) /* BitField status_flags if set to 1, this is a broadcast packet */ 3530 #define ETH_FAST_PATH_RX_CQE_BROADCAST_FLG_SHIFT 4 3531 #define ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG (0x1<<5) /* BitField status_flags if set to 1, the MAC address was matched in the tstorm CAM search */ 3532 #define ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG_SHIFT 5 3533 #define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG (0x1<<6) /* BitField status_flags IP checksum validation was not performed (if packet is not IPv4) */ 3534 #define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG_SHIFT 6 3535 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG (0x1<<7) /* BitField status_flags TCP/UDP checksum validation was not performed (if packet is not TCP/UDP or IPv6 extheaders exist) */ 3536 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7 3537 u8_t queue_index /* The aggregation queue index of this packet */; 3538 u8_t placement_offset /* Placement offset from the start of the BD, in bytes */; 3539 u32_t rss_hash_result /* RSS toeplitz hash result */; 3540 u16_t vlan_tag /* Ethernet VLAN tag field */; 3541 u16_t pkt_len_or_gro_seg_len /* Packet length (for non-TPA CQE) or GRO Segment Length (for TPA in GRO Mode) otherwise 0 */; 3542 u16_t len_on_bd /* Number of bytes placed on the BD */; 3543 struct parsing_flags pars_flags; 3544 union eth_sgl_or_raw_data sgl_or_raw_data /* union for sgl and raw data. */; 3545 u32_t reserved1[8]; 3546 }; 3547 3548 3549 /* 3550 * Command for setting classification flags for a client $$KEEP_ENDIANNESS$$ 3551 */ 3552 struct eth_filter_rules_cmd 3553 { 3554 u8_t cmd_general_data; 3555 #define ETH_FILTER_RULES_CMD_RX_CMD (0x1<<0) /* BitField cmd_general_data should this cmd be applied for Rx */ 3556 #define ETH_FILTER_RULES_CMD_RX_CMD_SHIFT 0 3557 #define ETH_FILTER_RULES_CMD_TX_CMD (0x1<<1) /* BitField cmd_general_data should this cmd be applied for Tx */ 3558 #define ETH_FILTER_RULES_CMD_TX_CMD_SHIFT 1 3559 #define ETH_FILTER_RULES_CMD_RESERVED0 (0x3F<<2) /* BitField cmd_general_data */ 3560 #define ETH_FILTER_RULES_CMD_RESERVED0_SHIFT 2 3561 u8_t func_id /* the function id */; 3562 u8_t client_id /* the client id */; 3563 u8_t reserved1; 3564 u16_t state; 3565 #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL (0x1<<0) /* BitField state drop all unicast packets */ 3566 #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL_SHIFT 0 3567 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL (0x1<<1) /* BitField state accept all unicast packets (subject to vlan) */ 3568 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL_SHIFT 1 3569 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED (0x1<<2) /* BitField state accept all unmatched unicast packets */ 3570 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED_SHIFT 2 3571 #define ETH_FILTER_RULES_CMD_MCAST_DROP_ALL (0x1<<3) /* BitField state drop all multicast packets */ 3572 #define ETH_FILTER_RULES_CMD_MCAST_DROP_ALL_SHIFT 3 3573 #define ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL (0x1<<4) /* BitField state accept all multicast packets (subject to vlan) */ 3574 #define ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL_SHIFT 4 3575 #define ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL (0x1<<5) /* BitField state accept all broadcast packets (subject to vlan) */ 3576 #define ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL_SHIFT 5 3577 #define ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN (0x1<<6) /* BitField state accept packets matched only by MAC (without checking vlan) */ 3578 #define ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN_SHIFT 6 3579 #define ETH_FILTER_RULES_CMD_RESERVED2 (0x1FF<<7) /* BitField state */ 3580 #define ETH_FILTER_RULES_CMD_RESERVED2_SHIFT 7 3581 u16_t reserved3; 3582 struct regpair_t reserved4; 3583 }; 3584 3585 3586 /* 3587 * parameters for eth classification filters ramrod $$KEEP_ENDIANNESS$$ 3588 */ 3589 struct eth_filter_rules_ramrod_data 3590 { 3591 struct eth_classify_header header; 3592 struct eth_filter_rules_cmd rules[FILTER_RULES_COUNT]; 3593 }; 3594 3595 3596 /* 3597 * Hsi version 3598 */ 3599 enum eth_fp_hsi_ver 3600 { 3601 ETH_FP_HSI_VER_0 /* Hsi which does not support tunnelling */, 3602 ETH_FP_HSI_VER_1 /* Hsi does support tunnelling */, 3603 ETH_FP_HSI_VER_2 /* Hsi which supports tunneling and UFP */, 3604 MAX_ETH_FP_HSI_VER}; 3605 3606 3607 /* 3608 * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ 3609 */ 3610 struct eth_general_rules_ramrod_data 3611 { 3612 struct eth_classify_header header; 3613 union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; 3614 }; 3615 3616 3617 /* 3618 * The data for Halt ramrod 3619 */ 3620 struct eth_halt_ramrod_data 3621 { 3622 u32_t client_id /* id of this client. (5 bits are used) */; 3623 u32_t reserved0; 3624 }; 3625 3626 3627 /* 3628 * destination and source mac address. 3629 */ 3630 struct eth_mac_addresses 3631 { 3632 #if defined(__BIG_ENDIAN) 3633 u16_t dst_mid /* destination mac address 16 middle bits */; 3634 u16_t dst_lo /* destination mac address 16 low bits */; 3635 #elif defined(__LITTLE_ENDIAN) 3636 u16_t dst_lo /* destination mac address 16 low bits */; 3637 u16_t dst_mid /* destination mac address 16 middle bits */; 3638 #endif 3639 #if defined(__BIG_ENDIAN) 3640 u16_t src_lo /* source mac address 16 low bits */; 3641 u16_t dst_hi /* destination mac address 16 high bits */; 3642 #elif defined(__LITTLE_ENDIAN) 3643 u16_t dst_hi /* destination mac address 16 high bits */; 3644 u16_t src_lo /* source mac address 16 low bits */; 3645 #endif 3646 #if defined(__BIG_ENDIAN) 3647 u16_t src_hi /* source mac address 16 high bits */; 3648 u16_t src_mid /* source mac address 16 middle bits */; 3649 #elif defined(__LITTLE_ENDIAN) 3650 u16_t src_mid /* source mac address 16 middle bits */; 3651 u16_t src_hi /* source mac address 16 high bits */; 3652 #endif 3653 }; 3654 3655 3656 /* 3657 * tunneling related data. 3658 */ 3659 struct eth_tunnel_data 3660 { 3661 #if defined(__BIG_ENDIAN) 3662 u16_t dst_mid /* destination mac address 16 middle bits */; 3663 u16_t dst_lo /* destination mac address 16 low bits */; 3664 #elif defined(__LITTLE_ENDIAN) 3665 u16_t dst_lo /* destination mac address 16 low bits */; 3666 u16_t dst_mid /* destination mac address 16 middle bits */; 3667 #endif 3668 #if defined(__BIG_ENDIAN) 3669 u16_t fw_ip_hdr_csum /* Fw Ip header checksum (with ALL ip header fields) for the outer IP header */; 3670 u16_t dst_hi /* destination mac address 16 high bits */; 3671 #elif defined(__LITTLE_ENDIAN) 3672 u16_t dst_hi /* destination mac address 16 high bits */; 3673 u16_t fw_ip_hdr_csum /* Fw Ip header checksum (with ALL ip header fields) for the outer IP header */; 3674 #endif 3675 #if defined(__BIG_ENDIAN) 3676 u8_t flags; 3677 #define ETH_TUNNEL_DATA_IP_HDR_TYPE_OUTER (0x1<<0) /* BitField flags Set in case outer IP header is ipV6 */ 3678 #define ETH_TUNNEL_DATA_IP_HDR_TYPE_OUTER_SHIFT 0 3679 #define ETH_TUNNEL_DATA_RESERVED (0x7F<<1) /* BitField flags Should be set with 0 */ 3680 #define ETH_TUNNEL_DATA_RESERVED_SHIFT 1 3681 u8_t ip_hdr_start_inner_w /* Inner IP header offset in WORDs (16-bit) from start of packet */; 3682 u16_t pseudo_csum /* Pseudo checksum with length field=0 */; 3683 #elif defined(__LITTLE_ENDIAN) 3684 u16_t pseudo_csum /* Pseudo checksum with length field=0 */; 3685 u8_t ip_hdr_start_inner_w /* Inner IP header offset in WORDs (16-bit) from start of packet */; 3686 u8_t flags; 3687 #define ETH_TUNNEL_DATA_IP_HDR_TYPE_OUTER (0x1<<0) /* BitField flags Set in case outer IP header is ipV6 */ 3688 #define ETH_TUNNEL_DATA_IP_HDR_TYPE_OUTER_SHIFT 0 3689 #define ETH_TUNNEL_DATA_RESERVED (0x7F<<1) /* BitField flags Should be set with 0 */ 3690 #define ETH_TUNNEL_DATA_RESERVED_SHIFT 1 3691 #endif 3692 }; 3693 3694 /* 3695 * union for mac addresses and for tunneling data. considered as tunneling data only if (tunnel_exist == 1). 3696 */ 3697 union eth_mac_addr_or_tunnel_data 3698 { 3699 struct eth_mac_addresses mac_addr /* destination and source mac addresses. */; 3700 struct eth_tunnel_data tunnel_data /* tunneling related data. */; 3701 }; 3702 3703 3704 /* 3705 * Command for setting multicast classification for a client $$KEEP_ENDIANNESS$$ 3706 */ 3707 struct eth_multicast_rules_cmd 3708 { 3709 u8_t cmd_general_data; 3710 #define ETH_MULTICAST_RULES_CMD_RX_CMD (0x1<<0) /* BitField cmd_general_data should this cmd be applied for Rx */ 3711 #define ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT 0 3712 #define ETH_MULTICAST_RULES_CMD_TX_CMD (0x1<<1) /* BitField cmd_general_data should this cmd be applied for Tx */ 3713 #define ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT 1 3714 #define ETH_MULTICAST_RULES_CMD_IS_ADD (0x1<<2) /* BitField cmd_general_data 1 for add rule, 0 for remove rule */ 3715 #define ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT 2 3716 #define ETH_MULTICAST_RULES_CMD_RESERVED0 (0x1F<<3) /* BitField cmd_general_data */ 3717 #define ETH_MULTICAST_RULES_CMD_RESERVED0_SHIFT 3 3718 u8_t func_id /* the function id */; 3719 u8_t bin_id /* the bin to add this function to (0-255) */; 3720 u8_t engine_id /* the approximate multicast engine id */; 3721 u32_t reserved2; 3722 struct regpair_t reserved3; 3723 }; 3724 3725 3726 /* 3727 * parameters for multicast classification ramrod $$KEEP_ENDIANNESS$$ 3728 */ 3729 struct eth_multicast_rules_ramrod_data 3730 { 3731 struct eth_classify_header header; 3732 struct eth_multicast_rules_cmd rules[MULTICAST_RULES_COUNT]; 3733 }; 3734 3735 3736 /* 3737 * Place holder for ramrods protocol specific data 3738 */ 3739 struct ramrod_data 3740 { 3741 u32_t data_lo; 3742 u32_t data_hi; 3743 }; 3744 3745 /* 3746 * union for ramrod data for Ethernet protocol (CQE) (force size of 16 bits) 3747 */ 3748 union eth_ramrod_data 3749 { 3750 struct ramrod_data general; 3751 }; 3752 3753 3754 /* 3755 * RSS toeplitz hash type, as reported in CQE 3756 */ 3757 enum eth_rss_hash_type 3758 { 3759 DEFAULT_HASH_TYPE, 3760 IPV4_HASH_TYPE, 3761 TCP_IPV4_HASH_TYPE, 3762 IPV6_HASH_TYPE, 3763 TCP_IPV6_HASH_TYPE, 3764 VLAN_PRI_HASH_TYPE, 3765 E1HOV_PRI_HASH_TYPE, 3766 DSCP_HASH_TYPE, 3767 MAX_ETH_RSS_HASH_TYPE}; 3768 3769 3770 /* 3771 * Ethernet RSS mode 3772 */ 3773 enum eth_rss_mode 3774 { 3775 ETH_RSS_MODE_DISABLED, 3776 ETH_RSS_MODE_REGULAR /* Regular (ndis-like) RSS */, 3777 ETH_RSS_MODE_VLAN_PRI /* RSS based on inner-vlan priority field */, 3778 ETH_RSS_MODE_E1HOV_PRI /* RSS based on outer-vlan priority field */, 3779 ETH_RSS_MODE_IP_DSCP /* RSS based on IPv4 DSCP field */, 3780 ETH_RSS_MODE_ESX51 /* RSS mode for Vmware ESX 5.1 (Only do RSS for VXLAN packets) */, 3781 MAX_ETH_RSS_MODE}; 3782 3783 3784 /* 3785 * parameters for RSS update ramrod (E2) $$KEEP_ENDIANNESS$$ 3786 */ 3787 struct eth_rss_update_ramrod_data 3788 { 3789 u8_t rss_engine_id; 3790 u8_t rss_mode /* The RSS mode for this function */; 3791 u16_t capabilities; 3792 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY (0x1<<0) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV4 2-tuple capability */ 3793 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY_SHIFT 0 3794 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY (0x1<<1) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV4 4-tuple capability for TCP */ 3795 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY_SHIFT 1 3796 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY (0x1<<2) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV4 4-tuple capability for UDP */ 3797 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY_SHIFT 2 3798 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_VXLAN_CAPABILITY (0x1<<3) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV4 4-tuple capability for VXLAN Tunnels */ 3799 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_VXLAN_CAPABILITY_SHIFT 3 3800 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY (0x1<<4) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV6 2-tuple capability */ 3801 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY_SHIFT 4 3802 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY (0x1<<5) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV6 4-tuple capability for TCP */ 3803 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY_SHIFT 5 3804 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY (0x1<<6) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV6 4-tuple capability for UDP */ 3805 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY_SHIFT 6 3806 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_VXLAN_CAPABILITY (0x1<<7) /* BitField capabilitiesFunction RSS capabilities configuration of the IpV6 4-tuple capability for VXLAN Tunnels */ 3807 #define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_VXLAN_CAPABILITY_SHIFT 7 3808 #define ETH_RSS_UPDATE_RAMROD_DATA_EN_5_TUPLE_CAPABILITY (0x1<<8) /* BitField capabilitiesFunction RSS capabilities configuration of the 5-tuple capability */ 3809 #define ETH_RSS_UPDATE_RAMROD_DATA_EN_5_TUPLE_CAPABILITY_SHIFT 8 3810 #define ETH_RSS_UPDATE_RAMROD_DATA_NVGRE_KEY_ENTROPY_CAPABILITY (0x1<<9) /* BitField capabilitiesFunction RSS capabilities configuration of NVGRE key entropy capability. Requires gre_inner_hdrs_capability is not set. */ 3811 #define ETH_RSS_UPDATE_RAMROD_DATA_NVGRE_KEY_ENTROPY_CAPABILITY_SHIFT 9 3812 #define ETH_RSS_UPDATE_RAMROD_DATA_GRE_INNER_HDRS_CAPABILITY (0x1<<10) /* BitField capabilitiesFunction RSS capabilities configuration of GRE Inner Headers capability. Requires nvgre_key_entropy_capability is not set. */ 3813 #define ETH_RSS_UPDATE_RAMROD_DATA_GRE_INNER_HDRS_CAPABILITY_SHIFT 10 3814 #define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY (0x1<<11) /* BitField capabilitiesFunction RSS capabilities if set update the rss keys */ 3815 #define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT 11 3816 #define ETH_RSS_UPDATE_RAMROD_DATA_RESERVED (0xF<<12) /* BitField capabilitiesFunction RSS capabilities */ 3817 #define ETH_RSS_UPDATE_RAMROD_DATA_RESERVED_SHIFT 12 3818 u8_t rss_result_mask /* The mask for the lower byte of RSS result - defines which section of the indirection table will be used. To enable all table put here 0x7F */; 3819 u8_t reserved3; 3820 u16_t reserved4; 3821 u8_t indirection_table[T_ETH_INDIRECTION_TABLE_SIZE] /* RSS indirection table */; 3822 u32_t rss_key[T_ETH_RSS_KEY] /* RSS key supplied as by OS */; 3823 u32_t echo; 3824 u32_t reserved5; 3825 }; 3826 3827 3828 /* 3829 * The eth Rx Buffer Descriptor 3830 */ 3831 struct eth_rx_bd 3832 { 3833 u32_t addr_lo /* Single continuous buffer low pointer */; 3834 u32_t addr_hi /* Single continuous buffer high pointer */; 3835 }; 3836 3837 3838 struct eth_rx_bd_next_page 3839 { 3840 u32_t addr_lo /* Next page low pointer */; 3841 u32_t addr_hi /* Next page high pointer */; 3842 u8_t reserved[8]; 3843 }; 3844 3845 3846 /* 3847 * Eth Rx Cqe structure- general structure for ramrods $$KEEP_ENDIANNESS$$ 3848 */ 3849 struct common_ramrod_eth_rx_cqe 3850 { 3851 u8_t ramrod_type; 3852 #define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x3<<0) /* BitField ramrod_type (use enum eth_rx_cqe_type) */ 3853 #define COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT 0 3854 #define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<2) /* BitField ramrod_type */ 3855 #define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 2 3856 #define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x1F<<3) /* BitField ramrod_type */ 3857 #define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 3 3858 u8_t conn_type /* only 3 bits are used */; 3859 u16_t reserved1 /* protocol specific data */; 3860 u32_t conn_and_cmd_data; 3861 #define COMMON_RAMROD_ETH_RX_CQE_CID (0xFFFFFF<<0) /* BitField conn_and_cmd_data */ 3862 #define COMMON_RAMROD_ETH_RX_CQE_CID_SHIFT 0 3863 #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24) /* BitField conn_and_cmd_data command id of the ramrod- use RamrodCommandIdEnum */ 3864 #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24 3865 struct ramrod_data protocol_data /* protocol specific data */; 3866 u32_t echo; 3867 u32_t reserved2[11]; 3868 }; 3869 3870 /* 3871 * Rx Last CQE in page (in ETH) 3872 */ 3873 struct eth_rx_cqe_next_page 3874 { 3875 u32_t addr_lo /* Next page low pointer */; 3876 u32_t addr_hi /* Next page high pointer */; 3877 u32_t reserved[14]; 3878 }; 3879 3880 /* 3881 * union for all eth rx cqe types (fix their sizes) 3882 */ 3883 union eth_rx_cqe 3884 { 3885 struct eth_fast_path_rx_cqe fast_path_cqe; 3886 struct common_ramrod_eth_rx_cqe ramrod_cqe; 3887 struct eth_rx_cqe_next_page next_page_cqe; 3888 struct eth_end_agg_rx_cqe end_agg_cqe; 3889 }; 3890 3891 3892 3893 /* 3894 * Values for RX ETH CQE type field 3895 */ 3896 enum eth_rx_cqe_type 3897 { 3898 RX_ETH_CQE_TYPE_ETH_FASTPATH /* Fast path CQE */, 3899 RX_ETH_CQE_TYPE_ETH_RAMROD /* Slow path CQE */, 3900 RX_ETH_CQE_TYPE_ETH_START_AGG /* Fast path CQE */, 3901 RX_ETH_CQE_TYPE_ETH_STOP_AGG /* Slow path CQE */, 3902 MAX_ETH_RX_CQE_TYPE}; 3903 3904 3905 /* 3906 * Type of SGL/Raw field in ETH RX fast path CQE 3907 */ 3908 enum eth_rx_fp_sel 3909 { 3910 ETH_FP_CQE_REGULAR /* Regular CQE- no extra data */, 3911 ETH_FP_CQE_RAW /* Extra data is raw data- iscsi OOO */, 3912 MAX_ETH_RX_FP_SEL}; 3913 3914 3915 /* 3916 * The eth Rx SGE Descriptor 3917 */ 3918 struct eth_rx_sge 3919 { 3920 u32_t addr_lo /* Single continuous buffer low pointer */; 3921 u32_t addr_hi /* Single continuous buffer high pointer */; 3922 }; 3923 3924 3925 3926 /* 3927 * common data for all protocols $$KEEP_ENDIANNESS$$ 3928 */ 3929 struct spe_hdr_t 3930 { 3931 u32_t conn_and_cmd_data; 3932 #define SPE_HDR_T_CID (0xFFFFFF<<0) /* BitField conn_and_cmd_data */ 3933 #define SPE_HDR_T_CID_SHIFT 0 3934 #define SPE_HDR_T_CMD_ID (0xFFUL<<24) /* BitField conn_and_cmd_data command id of the ramrod- use enum common_spqe_cmd_id/eth_spqe_cmd_id/toe_spqe_cmd_id */ 3935 #define SPE_HDR_T_CMD_ID_SHIFT 24 3936 u16_t type; 3937 #define SPE_HDR_T_CONN_TYPE (0xFF<<0) /* BitField type connection type. (3 bits are used) (use enum connection_type) */ 3938 #define SPE_HDR_T_CONN_TYPE_SHIFT 0 3939 #define SPE_HDR_T_FUNCTION_ID (0xFF<<8) /* BitField type */ 3940 #define SPE_HDR_T_FUNCTION_ID_SHIFT 8 3941 u16_t reserved1; 3942 }; 3943 3944 /* 3945 * specific data for ethernet slow path element 3946 */ 3947 union eth_specific_data 3948 { 3949 u8_t protocol_data[8] /* to fix this structure size to 8 bytes */; 3950 struct regpair_t client_update_ramrod_data /* The address of the data for client update ramrod */; 3951 struct regpair_t client_init_ramrod_init_data /* The data for client setup ramrod */; 3952 struct eth_halt_ramrod_data halt_ramrod_data /* Includes the client id to be deleted */; 3953 struct regpair_t update_data_addr /* physical address of the eth_rss_update_ramrod_data struct, as allocated by the driver */; 3954 struct eth_common_ramrod_data common_ramrod_data /* The data contain client ID need to the ramrod */; 3955 struct regpair_t classify_cfg_addr /* physical address of the eth_classify_rules_ramrod_data struct, as allocated by the driver */; 3956 struct regpair_t filter_cfg_addr /* physical address of the eth_filter_cfg_ramrod_data struct, as allocated by the driver */; 3957 struct regpair_t mcast_cfg_addr /* physical address of the eth_mcast_cfg_ramrod_data struct, as allocated by the driver */; 3958 }; 3959 3960 /* 3961 * Ethernet slow path element 3962 */ 3963 struct eth_spe 3964 { 3965 struct spe_hdr_t hdr /* common data for all protocols */; 3966 union eth_specific_data data /* data specific to ethernet protocol */; 3967 }; 3968 3969 3970 3971 /* 3972 * Ethernet command ID for slow path elements 3973 */ 3974 enum eth_spqe_cmd_id 3975 { 3976 RAMROD_CMD_ID_ETH_UNUSED, 3977 RAMROD_CMD_ID_ETH_CLIENT_SETUP /* Setup a new L2 client */, 3978 RAMROD_CMD_ID_ETH_HALT /* Halt an L2 client */, 3979 RAMROD_CMD_ID_ETH_FORWARD_SETUP /* Setup a new FW channel */, 3980 RAMROD_CMD_ID_ETH_TX_QUEUE_SETUP /* Setup a new Tx only queue */, 3981 RAMROD_CMD_ID_ETH_CLIENT_UPDATE /* Update an L2 client configuration */, 3982 RAMROD_CMD_ID_ETH_EMPTY /* Empty ramrod - used to synchronize iSCSI OOO */, 3983 RAMROD_CMD_ID_ETH_TERMINATE /* Terminate an L2 client */, 3984 RAMROD_CMD_ID_ETH_TPA_UPDATE /* update the tpa roles in L2 client */, 3985 RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES /* Add/remove classification filters for L2 client (in E2/E3 only) */, 3986 RAMROD_CMD_ID_ETH_FILTER_RULES /* Add/remove classification filters for L2 client (in E2/E3 only) */, 3987 RAMROD_CMD_ID_ETH_MULTICAST_RULES /* Add/remove multicast classification bin (in E2/E3 only) */, 3988 RAMROD_CMD_ID_ETH_RSS_UPDATE /* Update RSS configuration */, 3989 RAMROD_CMD_ID_ETH_SET_MAC /* Update RSS configuration */, 3990 MAX_ETH_SPQE_CMD_ID}; 3991 3992 3993 /* 3994 * eth tpa update command 3995 */ 3996 enum eth_tpa_update_command 3997 { 3998 TPA_UPDATE_NONE_COMMAND /* nop command */, 3999 TPA_UPDATE_ENABLE_COMMAND /* enable command */, 4000 TPA_UPDATE_DISABLE_COMMAND /* disable command */, 4001 MAX_ETH_TPA_UPDATE_COMMAND}; 4002 4003 4004 4005 /* 4006 * In case of LSO over IPv4 tunnel, whether to increment IP ID on external IP header or internal IP header 4007 */ 4008 enum eth_tunnel_lso_inc_ip_id 4009 { 4010 EXT_HEADER /* Increment IP ID of external header (HW works on external, FW works on internal */, 4011 INT_HEADER /* Increment IP ID of internal header (HW works on internal, FW works on external */, 4012 MAX_ETH_TUNNEL_LSO_INC_IP_ID}; 4013 4014 4015 /* 4016 * In case tunnel exist and L4 checksum offload (or outer ip header checksum), the pseudo checksum location, on packet or on BD. 4017 */ 4018 enum eth_tunnel_non_lso_csum_location 4019 { 4020 CSUM_ON_PKT /* checksum is on the packet. */, 4021 CSUM_ON_BD /* checksum is on the BD. */, 4022 MAX_ETH_TUNNEL_NON_LSO_CSUM_LOCATION}; 4023 4024 4025 /* 4026 * Tx regular BD structure $$KEEP_ENDIANNESS$$ 4027 */ 4028 struct eth_tx_bd 4029 { 4030 u32_t addr_lo /* Single continuous buffer low pointer */; 4031 u32_t addr_hi /* Single continuous buffer high pointer */; 4032 u16_t total_pkt_bytes /* Size of the entire packet, valid for non-LSO packets */; 4033 u16_t nbytes /* Size of the data represented by the BD */; 4034 u8_t reserved[4] /* keeps same size as other eth tx bd types */; 4035 }; 4036 4037 4038 /* 4039 * structure for easy accessibility to assembler 4040 */ 4041 struct eth_tx_bd_flags 4042 { 4043 u8_t as_bitfield; 4044 #define ETH_TX_BD_FLAGS_IP_CSUM (0x1<<0) /* BitField as_bitfield IP CKSUM flag,Relevant in START */ 4045 #define ETH_TX_BD_FLAGS_IP_CSUM_SHIFT 0 4046 #define ETH_TX_BD_FLAGS_L4_CSUM (0x1<<1) /* BitField as_bitfield L4 CKSUM flag,Relevant in START */ 4047 #define ETH_TX_BD_FLAGS_L4_CSUM_SHIFT 1 4048 #define ETH_TX_BD_FLAGS_VLAN_MODE (0x3<<2) /* BitField as_bitfield 00 - no vlan; 01 - inband Vlan; 10 outband Vlan (use enum eth_tx_vlan_type) */ 4049 #define ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT 2 4050 #define ETH_TX_BD_FLAGS_START_BD (0x1<<4) /* BitField as_bitfield Start of packet BD */ 4051 #define ETH_TX_BD_FLAGS_START_BD_SHIFT 4 4052 #define ETH_TX_BD_FLAGS_IS_UDP (0x1<<5) /* BitField as_bitfield flag that indicates that the current packet is a udp packet */ 4053 #define ETH_TX_BD_FLAGS_IS_UDP_SHIFT 5 4054 #define ETH_TX_BD_FLAGS_SW_LSO (0x1<<6) /* BitField as_bitfield LSO flag, Relevant in START */ 4055 #define ETH_TX_BD_FLAGS_SW_LSO_SHIFT 6 4056 #define ETH_TX_BD_FLAGS_IPV6 (0x1<<7) /* BitField as_bitfield set in case ipV6 packet, Relevant in START */ 4057 #define ETH_TX_BD_FLAGS_IPV6_SHIFT 7 4058 }; 4059 4060 /* 4061 * The eth Tx Buffer Descriptor $$KEEP_ENDIANNESS$$ 4062 */ 4063 struct eth_tx_start_bd 4064 { 4065 u32_t addr_lo /* Single continuous buffer low pointer */; 4066 u32_t addr_hi /* Single continuous buffer high pointer */; 4067 u16_t nbd /* Num of BDs in packet: include parsInfoBD, Relevant in START(only in Everest) */; 4068 u16_t nbytes /* Size of the data represented by the BD */; 4069 u16_t vlan_or_ethertype /* Vlan structure: vlan_id is in lsb, then cfi and then priority vlan_id 12 bits (lsb), cfi 1 bit, priority 3 bits. In E2, this field should be set with etherType for VFs with no vlan */; 4070 struct eth_tx_bd_flags bd_flags; 4071 u8_t general_data; 4072 #define ETH_TX_START_BD_HDR_NBDS (0x7<<0) /* BitField general_data contains the number of BDs that contain Ethernet/IP/TCP headers, for full/partial LSO modes */ 4073 #define ETH_TX_START_BD_HDR_NBDS_SHIFT 0 4074 #define ETH_TX_START_BD_NO_ADDED_TAGS (0x1<<3) /* BitField general_data If set, do not add any additional tags to the packet including MF Tags, Default VLAN or VLAN for the sake of DCB */ 4075 #define ETH_TX_START_BD_NO_ADDED_TAGS_SHIFT 3 4076 #define ETH_TX_START_BD_FORCE_VLAN_MODE (0x1<<4) /* BitField general_data force vlan mode according to bds (vlan mode can change accroding to global configuration) */ 4077 #define ETH_TX_START_BD_FORCE_VLAN_MODE_SHIFT 4 4078 #define ETH_TX_START_BD_PARSE_NBDS (0x3<<5) /* BitField general_data Determines the number of parsing BDs in packet. Number of parsing BDs in packet is (parse_nbds+1). */ 4079 #define ETH_TX_START_BD_PARSE_NBDS_SHIFT 5 4080 #define ETH_TX_START_BD_TUNNEL_EXIST (0x1<<7) /* BitField general_data set in case of tunneling encapsulated packet */ 4081 #define ETH_TX_START_BD_TUNNEL_EXIST_SHIFT 7 4082 }; 4083 4084 /* 4085 * Tx parsing BD structure for ETH E1/E1h $$KEEP_ENDIANNESS$$ 4086 */ 4087 struct eth_tx_parse_bd_e1x 4088 { 4089 u16_t global_data; 4090 #define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W (0xF<<0) /* BitField global_data IP header Offset in WORDs from start of packet */ 4091 #define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W_SHIFT 0 4092 #define ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE (0x3<<4) /* BitField global_data marks ethernet address type (use enum eth_addr_type) */ 4093 #define ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT 4 4094 #define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN (0x1<<6) /* BitField global_data */ 4095 #define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN_SHIFT 6 4096 #define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN (0x1<<7) /* BitField global_data */ 4097 #define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT 7 4098 #define ETH_TX_PARSE_BD_E1X_NS_FLG (0x1<<8) /* BitField global_data an optional addition to ECN that protects against accidental or malicious concealment of marked packets from the TCP sender. */ 4099 #define ETH_TX_PARSE_BD_E1X_NS_FLG_SHIFT 8 4100 #define ETH_TX_PARSE_BD_E1X_RESERVED0 (0x7F<<9) /* BitField global_data reserved bit, should be set with 0 */ 4101 #define ETH_TX_PARSE_BD_E1X_RESERVED0_SHIFT 9 4102 u8_t tcp_flags; 4103 #define ETH_TX_PARSE_BD_E1X_FIN_FLG (0x1<<0) /* BitField tcp_flagsState flags End of data flag */ 4104 #define ETH_TX_PARSE_BD_E1X_FIN_FLG_SHIFT 0 4105 #define ETH_TX_PARSE_BD_E1X_SYN_FLG (0x1<<1) /* BitField tcp_flagsState flags Synchronize sequence numbers flag */ 4106 #define ETH_TX_PARSE_BD_E1X_SYN_FLG_SHIFT 1 4107 #define ETH_TX_PARSE_BD_E1X_RST_FLG (0x1<<2) /* BitField tcp_flagsState flags Reset connection flag */ 4108 #define ETH_TX_PARSE_BD_E1X_RST_FLG_SHIFT 2 4109 #define ETH_TX_PARSE_BD_E1X_PSH_FLG (0x1<<3) /* BitField tcp_flagsState flags Push flag */ 4110 #define ETH_TX_PARSE_BD_E1X_PSH_FLG_SHIFT 3 4111 #define ETH_TX_PARSE_BD_E1X_ACK_FLG (0x1<<4) /* BitField tcp_flagsState flags Acknowledgment number valid flag */ 4112 #define ETH_TX_PARSE_BD_E1X_ACK_FLG_SHIFT 4 4113 #define ETH_TX_PARSE_BD_E1X_URG_FLG (0x1<<5) /* BitField tcp_flagsState flags Urgent pointer valid flag */ 4114 #define ETH_TX_PARSE_BD_E1X_URG_FLG_SHIFT 5 4115 #define ETH_TX_PARSE_BD_E1X_ECE_FLG (0x1<<6) /* BitField tcp_flagsState flags ECN-Echo */ 4116 #define ETH_TX_PARSE_BD_E1X_ECE_FLG_SHIFT 6 4117 #define ETH_TX_PARSE_BD_E1X_CWR_FLG (0x1<<7) /* BitField tcp_flagsState flags Congestion Window Reduced */ 4118 #define ETH_TX_PARSE_BD_E1X_CWR_FLG_SHIFT 7 4119 u8_t ip_hlen_w /* IP header length in WORDs */; 4120 u16_t total_hlen_w /* IP+TCP+ETH */; 4121 u16_t tcp_pseudo_csum /* Checksum of pseudo header with length field=0 */; 4122 u16_t lso_mss /* for LSO mode */; 4123 u16_t ip_id /* for LSO mode */; 4124 u32_t tcp_send_seq /* for LSO mode */; 4125 }; 4126 4127 /* 4128 * Tx parsing BD structure for ETH E2 $$KEEP_ENDIANNESS$$ 4129 */ 4130 struct eth_tx_parse_bd_e2 4131 { 4132 union eth_mac_addr_or_tunnel_data data /* union for mac addresses and for tunneling data. considered as tunneling data only if (tunnel_exist == 1). */; 4133 u32_t parsing_data; 4134 #define ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W (0x7FF<<0) /* BitField parsing_data TCP/UDP header Offset in WORDs from start of packet */ 4135 #define ETH_TX_PARSE_BD_E2_L4_HDR_START_OFFSET_W_SHIFT 0 4136 #define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW (0xF<<11) /* BitField parsing_data TCP header size in DOUBLE WORDS */ 4137 #define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT 11 4138 #define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR (0x1<<15) /* BitField parsing_data a flag to indicate an ipv6 packet with extension headers. If set on LSO packet, pseudo CS should be placed in TCP CS field without length field */ 4139 #define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR_SHIFT 15 4140 #define ETH_TX_PARSE_BD_E2_LSO_MSS (0x3FFF<<16) /* BitField parsing_data for LSO mode */ 4141 #define ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT 16 4142 #define ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE (0x3<<30) /* BitField parsing_data marks ethernet address type (use enum eth_addr_type) */ 4143 #define ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT 30 4144 }; 4145 4146 /* 4147 * Tx 2nd parsing BD structure for ETH packet $$KEEP_ENDIANNESS$$ 4148 */ 4149 struct eth_tx_parse_2nd_bd 4150 { 4151 u16_t global_data; 4152 #define ETH_TX_PARSE_2ND_BD_IP_HDR_START_OUTER_W (0xF<<0) /* BitField global_data Outer IP header offset in WORDs (16-bit) from start of packet */ 4153 #define ETH_TX_PARSE_2ND_BD_IP_HDR_START_OUTER_W_SHIFT 0 4154 #define ETH_TX_PARSE_2ND_BD_RESERVED0 (0x1<<4) /* BitField global_data should be set with 0 */ 4155 #define ETH_TX_PARSE_2ND_BD_RESERVED0_SHIFT 4 4156 #define ETH_TX_PARSE_2ND_BD_LLC_SNAP_EN (0x1<<5) /* BitField global_data */ 4157 #define ETH_TX_PARSE_2ND_BD_LLC_SNAP_EN_SHIFT 5 4158 #define ETH_TX_PARSE_2ND_BD_NS_FLG (0x1<<6) /* BitField global_data an optional addition to ECN that protects against accidental or malicious concealment of marked packets from the TCP sender. */ 4159 #define ETH_TX_PARSE_2ND_BD_NS_FLG_SHIFT 6 4160 #define ETH_TX_PARSE_2ND_BD_TUNNEL_UDP_EXIST (0x1<<7) /* BitField global_data Set in case UDP header exists in tunnel outer hedears. */ 4161 #define ETH_TX_PARSE_2ND_BD_TUNNEL_UDP_EXIST_SHIFT 7 4162 #define ETH_TX_PARSE_2ND_BD_IP_HDR_LEN_OUTER_W (0x1F<<8) /* BitField global_data Outer IP header length in WORDs (16-bit). Valid only for IpV4. */ 4163 #define ETH_TX_PARSE_2ND_BD_IP_HDR_LEN_OUTER_W_SHIFT 8 4164 #define ETH_TX_PARSE_2ND_BD_RESERVED1 (0x7<<13) /* BitField global_data should be set with 0 */ 4165 #define ETH_TX_PARSE_2ND_BD_RESERVED1_SHIFT 13 4166 u8_t bd_type; 4167 #define ETH_TX_PARSE_2ND_BD_TYPE (0xF<<0) /* BitField bd_type Type of bd (use enum eth_2nd_parse_bd_type) */ 4168 #define ETH_TX_PARSE_2ND_BD_TYPE_SHIFT 0 4169 #define ETH_TX_PARSE_2ND_BD_RESERVED2 (0xF<<4) /* BitField bd_type */ 4170 #define ETH_TX_PARSE_2ND_BD_RESERVED2_SHIFT 4 4171 u8_t reserved3; 4172 u8_t tcp_flags; 4173 #define ETH_TX_PARSE_2ND_BD_FIN_FLG (0x1<<0) /* BitField tcp_flagsState flags End of data flag */ 4174 #define ETH_TX_PARSE_2ND_BD_FIN_FLG_SHIFT 0 4175 #define ETH_TX_PARSE_2ND_BD_SYN_FLG (0x1<<1) /* BitField tcp_flagsState flags Synchronize sequence numbers flag */ 4176 #define ETH_TX_PARSE_2ND_BD_SYN_FLG_SHIFT 1 4177 #define ETH_TX_PARSE_2ND_BD_RST_FLG (0x1<<2) /* BitField tcp_flagsState flags Reset connection flag */ 4178 #define ETH_TX_PARSE_2ND_BD_RST_FLG_SHIFT 2 4179 #define ETH_TX_PARSE_2ND_BD_PSH_FLG (0x1<<3) /* BitField tcp_flagsState flags Push flag */ 4180 #define ETH_TX_PARSE_2ND_BD_PSH_FLG_SHIFT 3 4181 #define ETH_TX_PARSE_2ND_BD_ACK_FLG (0x1<<4) /* BitField tcp_flagsState flags Acknowledgment number valid flag */ 4182 #define ETH_TX_PARSE_2ND_BD_ACK_FLG_SHIFT 4 4183 #define ETH_TX_PARSE_2ND_BD_URG_FLG (0x1<<5) /* BitField tcp_flagsState flags Urgent pointer valid flag */ 4184 #define ETH_TX_PARSE_2ND_BD_URG_FLG_SHIFT 5 4185 #define ETH_TX_PARSE_2ND_BD_ECE_FLG (0x1<<6) /* BitField tcp_flagsState flags ECN-Echo */ 4186 #define ETH_TX_PARSE_2ND_BD_ECE_FLG_SHIFT 6 4187 #define ETH_TX_PARSE_2ND_BD_CWR_FLG (0x1<<7) /* BitField tcp_flagsState flags Congestion Window Reduced */ 4188 #define ETH_TX_PARSE_2ND_BD_CWR_FLG_SHIFT 7 4189 u8_t reserved4; 4190 u8_t tunnel_udp_hdr_start_w /* Offset (in WORDs) from start of packet to tunnel UDP header. (if exist) */; 4191 u8_t fw_ip_hdr_to_payload_w /* In IpV4, the length (in WORDs) from the FW IpV4 header start to the payload start. In IpV6, the length (in WORDs) from the FW IpV6 header end to the payload start. However, if extension headers are included, their length is counted here as well. */; 4192 u16_t fw_ip_csum_wo_len_flags_frag /* For the IP header which is set by the FW, the IP checksum without length, flags and fragment offset. */; 4193 u16_t hw_ip_id /* The IP ID to be set by HW for LSO packets in tunnel mode. */; 4194 u32_t tcp_send_seq /* The TCP sequence number for LSO packets. */; 4195 }; 4196 4197 /* 4198 * The last BD in the BD memory will hold a pointer to the next BD memory 4199 */ 4200 struct eth_tx_next_bd 4201 { 4202 u32_t addr_lo /* Single continuous buffer low pointer */; 4203 u32_t addr_hi /* Single continuous buffer high pointer */; 4204 u8_t reserved[8] /* keeps same size as other eth tx bd types */; 4205 }; 4206 4207 /* 4208 * union for 4 Bd types 4209 */ 4210 union eth_tx_bd_types 4211 { 4212 struct eth_tx_start_bd start_bd /* the first bd in a packets */; 4213 struct eth_tx_bd reg_bd /* the common bd */; 4214 struct eth_tx_parse_bd_e1x parse_bd_e1x /* parsing info BD for e1/e1h */; 4215 struct eth_tx_parse_bd_e2 parse_bd_e2 /* parsing info BD for e2 */; 4216 struct eth_tx_parse_2nd_bd parse_2nd_bd /* 2nd parsing info BD */; 4217 struct eth_tx_next_bd next_bd /* Bd that contains the address of the next page */; 4218 }; 4219 4220 /* 4221 * array of 13 bds as appears in the eth xstorm context 4222 */ 4223 struct eth_tx_bds_array 4224 { 4225 union eth_tx_bd_types bds[13]; 4226 }; 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 /* 4237 * VLAN mode on TX BDs 4238 */ 4239 enum eth_tx_vlan_type 4240 { 4241 X_ETH_NO_VLAN, 4242 X_ETH_OUTBAND_VLAN, 4243 X_ETH_INBAND_VLAN, 4244 X_ETH_FW_ADDED_VLAN /* Driver should not use this! */, 4245 MAX_ETH_TX_VLAN_TYPE}; 4246 4247 4248 /* 4249 * Ethernet VLAN filtering mode in E1x 4250 */ 4251 enum eth_vlan_filter_mode 4252 { 4253 ETH_VLAN_FILTER_ANY_VLAN /* Dont filter by vlan */, 4254 ETH_VLAN_FILTER_SPECIFIC_VLAN /* Only the vlan_id is allowed */, 4255 ETH_VLAN_FILTER_CLASSIFY /* Vlan will be added to CAM for classification */, 4256 MAX_ETH_VLAN_FILTER_MODE}; 4257 4258 4259 /* 4260 * MAC filtering configuration command header $$KEEP_ENDIANNESS$$ 4261 */ 4262 struct mac_configuration_hdr 4263 { 4264 u8_t length /* number of entries valid in this command (6 bits) */; 4265 u8_t offset /* offset of the first entry in the list */; 4266 u16_t client_id /* the client id which this ramrod is sent on. 5b is used. */; 4267 u32_t echo /* echo value to be sent to driver on event ring */; 4268 }; 4269 4270 /* 4271 * MAC address in list for ramrod $$KEEP_ENDIANNESS$$ 4272 */ 4273 struct mac_configuration_entry 4274 { 4275 u16_t lsb_mac_addr /* 2 LSB of MAC address (should be given in big endien - driver should do hton to this number!!!) */; 4276 u16_t middle_mac_addr /* 2 middle bytes of MAC address (should be given in big endien - driver should do hton to this number!!!) */; 4277 u16_t msb_mac_addr /* 2 MSB of MAC address (should be given in big endien - driver should do hton to this number!!!) */; 4278 u16_t vlan_id /* The inner vlan id (12b). Used either in vlan_in_cam for mac_valn pair or for vlan filtering */; 4279 u8_t pf_id /* The pf id, for multi function mode */; 4280 u8_t flags; 4281 #define MAC_CONFIGURATION_ENTRY_ACTION_TYPE (0x1<<0) /* BitField flags configures the action to be done in cam (used only is slow path handlers) (use enum set_mac_action_type) */ 4282 #define MAC_CONFIGURATION_ENTRY_ACTION_TYPE_SHIFT 0 4283 #define MAC_CONFIGURATION_ENTRY_RDMA_MAC (0x1<<1) /* BitField flags If set, this MAC also belongs to RDMA client */ 4284 #define MAC_CONFIGURATION_ENTRY_RDMA_MAC_SHIFT 1 4285 #define MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE (0x3<<2) /* BitField flags (use enum eth_vlan_filter_mode) */ 4286 #define MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE_SHIFT 2 4287 #define MAC_CONFIGURATION_ENTRY_OVERRIDE_VLAN_REMOVAL (0x1<<4) /* BitField flags BitField flags 0 - cant remove vlan 1 - can remove vlan. relevant only to everest1 */ 4288 #define MAC_CONFIGURATION_ENTRY_OVERRIDE_VLAN_REMOVAL_SHIFT 4 4289 #define MAC_CONFIGURATION_ENTRY_BROADCAST (0x1<<5) /* BitField flags BitField flags 0 - not broadcast 1 - broadcast. relevant only to everest1 */ 4290 #define MAC_CONFIGURATION_ENTRY_BROADCAST_SHIFT 5 4291 #define MAC_CONFIGURATION_ENTRY_RESERVED1 (0x3<<6) /* BitField flags */ 4292 #define MAC_CONFIGURATION_ENTRY_RESERVED1_SHIFT 6 4293 u16_t reserved0; 4294 u32_t clients_bit_vector /* Bit vector for the clients which should receive this MAC. */; 4295 }; 4296 4297 /* 4298 * MAC filtering configuration command 4299 */ 4300 struct mac_configuration_cmd 4301 { 4302 struct mac_configuration_hdr hdr /* header */; 4303 struct mac_configuration_entry config_table[64] /* table of 64 MAC configuration entries: addresses and target table entries */; 4304 }; 4305 4306 4307 4308 4309 /* 4310 * Set-MAC command type (in E1x) 4311 */ 4312 enum set_mac_action_type 4313 { 4314 T_ETH_MAC_COMMAND_INVALIDATE, 4315 T_ETH_MAC_COMMAND_SET, 4316 MAX_SET_MAC_ACTION_TYPE}; 4317 4318 4319 /* 4320 * Ethernet TPA Modes 4321 */ 4322 enum tpa_mode 4323 { 4324 TPA_LRO /* LRO mode TPA */, 4325 TPA_GRO /* GRO mode TPA */, 4326 MAX_TPA_MODE}; 4327 4328 4329 /* 4330 * tpa update ramrod data $$KEEP_ENDIANNESS$$ 4331 */ 4332 struct tpa_update_ramrod_data 4333 { 4334 u8_t update_ipv4 /* none, enable or disable */; 4335 u8_t update_ipv6 /* none, enable or disable */; 4336 u8_t client_id /* client init flow control data */; 4337 u8_t max_tpa_queues /* maximal TPA queues allowed for this client */; 4338 u8_t max_sges_for_packet /* The maximal number of SGEs that can be used for one packet. depends on MTU and SGE size. must be 0 if SGEs are disabled */; 4339 u8_t complete_on_both_clients /* If set and the client has different sp_client, completion will be sent to both rings */; 4340 u8_t dont_verify_rings_pause_thr_flg /* If set, the rings pause thresholds will not be verified by firmware. */; 4341 u8_t tpa_mode /* TPA mode to use (LRO or GRO) */; 4342 u16_t sge_buff_size /* Size of the buffers pointed by SGEs */; 4343 u16_t max_agg_size /* maximal size for the aggregated TPA packets, reprted by the host */; 4344 u32_t sge_page_base_lo /* The address to fetch the next sges from (low) */; 4345 u32_t sge_page_base_hi /* The address to fetch the next sges from (high) */; 4346 u16_t sge_pause_thr_low /* number of remaining sges under which, we send pause message */; 4347 u16_t sge_pause_thr_high /* number of remaining sges above which, we send un-pause message */; 4348 }; 4349 4350 4351 /* 4352 * approximate-match multicast filtering for E1H per function in Tstorm 4353 */ 4354 struct tstorm_eth_approximate_match_multicast_filtering 4355 { 4356 u32_t mcast_add_hash_bit_array[8] /* Bit array for multicast hash filtering.Each bit supports a hash function result if to accept this multicast dst address. */; 4357 }; 4358 4359 4360 /* 4361 * Common configuration parameters per function in Tstorm $$KEEP_ENDIANNESS$$ 4362 */ 4363 struct tstorm_eth_function_common_config 4364 { 4365 u16_t config_flags; 4366 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0) /* BitField config_flagsGeneral configuration flags configuration of the port RSS IpV4 2-tupple capability */ 4367 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0 4368 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1) /* BitField config_flagsGeneral configuration flags configuration of the port RSS IpV4 4-tupple capability */ 4369 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1 4370 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2) /* BitField config_flagsGeneral configuration flags configuration of the port RSS IpV4 2-tupple capability */ 4371 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2 4372 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3) /* BitField config_flagsGeneral configuration flags configuration of the port RSS IpV6 4-tupple capability */ 4373 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3 4374 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE (0x7<<4) /* BitField config_flagsGeneral configuration flags RSS mode of operation (use enum eth_rss_mode) */ 4375 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT 4 4376 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE (0x1<<7) /* BitField config_flagsGeneral configuration flags 0 - Dont filter by vlan, 1 - Filter according to the vlans specificied in mac_filter_config */ 4377 #define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE_SHIFT 7 4378 #define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0xFF<<8) /* BitField config_flagsGeneral configuration flags */ 4379 #define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 8 4380 u8_t rss_result_mask /* The mask for the lower byte of RSS result - defines which section of the indirection table will be used. To enable all table put here 0x7F */; 4381 u8_t reserved1; 4382 u16_t vlan_id[2] /* VLANs of this function. VLAN filtering is determine according to vlan_filtering_enable. */; 4383 }; 4384 4385 4386 /* 4387 * MAC filtering configuration parameters per port in Tstorm $$KEEP_ENDIANNESS$$ 4388 */ 4389 struct tstorm_eth_mac_filter_config 4390 { 4391 u32_t ucast_drop_all /* bit vector in which the clients which drop all unicast packets are set */; 4392 u32_t ucast_accept_all /* bit vector in which clients that accept all unicast packets are set */; 4393 u32_t mcast_drop_all /* bit vector in which the clients which drop all multicast packets are set */; 4394 u32_t mcast_accept_all /* bit vector in which clients that accept all multicast packets are set */; 4395 u32_t bcast_accept_all /* bit vector in which clients that accept all broadcast packets are set */; 4396 u32_t vlan_filter[2] /* bit vector for VLAN filtering. Clients which enforce filtering of vlan[x] should be marked in vlan_filter[x]. In E1 only vlan_filter[1] is checked. The primary vlan is taken from the CAM target table. */; 4397 u32_t unmatched_unicast /* bit vector in which clients that accept unmatched unicast packets are set */; 4398 }; 4399 4400 4401 4402 /* 4403 * tx only queue init ramrod data $$KEEP_ENDIANNESS$$ 4404 */ 4405 struct tx_queue_init_ramrod_data 4406 { 4407 struct client_init_general_data general /* client init general data */; 4408 struct client_init_tx_data tx /* client init tx data */; 4409 }; 4410 4411 4412 /* 4413 * Three RX producers for ETH 4414 */ 4415 struct ustorm_eth_rx_producers 4416 { 4417 #if defined(__BIG_ENDIAN) 4418 u16_t bd_prod /* Producer of the RX BD ring */; 4419 u16_t cqe_prod /* Producer of the RX CQE ring */; 4420 #elif defined(__LITTLE_ENDIAN) 4421 u16_t cqe_prod /* Producer of the RX CQE ring */; 4422 u16_t bd_prod /* Producer of the RX BD ring */; 4423 #endif 4424 #if defined(__BIG_ENDIAN) 4425 u16_t reserved; 4426 u16_t sge_prod /* Producer of the RX SGE ring */; 4427 #elif defined(__LITTLE_ENDIAN) 4428 u16_t sge_prod /* Producer of the RX SGE ring */; 4429 u16_t reserved; 4430 #endif 4431 }; 4432 4433 4434 4435 4436 /* 4437 * ABTS info $$KEEP_ENDIANNESS$$ 4438 */ 4439 struct fcoe_abts_info 4440 { 4441 u16_t aborted_task_id /* Task ID to be aborted */; 4442 u16_t reserved0; 4443 u32_t reserved1; 4444 }; 4445 4446 4447 /* 4448 * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ 4449 */ 4450 struct fcoe_abts_rsp_union 4451 { 4452 u8_t r_ctl /* Only R_CTL part of the FC header in ABTS ACC or BA_RJT messages is placed */; 4453 u8_t rsrv[3]; 4454 u32_t abts_rsp_payload[7] /* The payload of the ABTS ACC (12B) or the BA_RJT (4B) */; 4455 }; 4456 4457 4458 /* 4459 * 4 regs size $$KEEP_ENDIANNESS$$ 4460 */ 4461 struct fcoe_bd_ctx 4462 { 4463 u32_t buf_addr_hi /* Higher buffer host address */; 4464 u32_t buf_addr_lo /* Lower buffer host address */; 4465 u16_t buf_len /* Buffer length (in bytes) */; 4466 u16_t rsrv0; 4467 u16_t flags /* BD flags */; 4468 u16_t rsrv1; 4469 }; 4470 4471 4472 /* 4473 * FCoE cached sges context $$KEEP_ENDIANNESS$$ 4474 */ 4475 struct fcoe_cached_sge_ctx 4476 { 4477 struct regpair_t cur_buf_addr /* Current buffer address (in initialization it is the first cached buffer) */; 4478 u16_t cur_buf_rem /* Remaining data in current buffer (in bytes) */; 4479 u16_t second_buf_rem /* Remaining data in second buffer (in bytes) */; 4480 struct regpair_t second_buf_addr /* Second cached buffer address */; 4481 }; 4482 4483 4484 /* 4485 * Cleanup info $$KEEP_ENDIANNESS$$ 4486 */ 4487 struct fcoe_cleanup_info 4488 { 4489 u16_t cleaned_task_id /* Task ID to be cleaned */; 4490 u16_t rolled_tx_seq_cnt /* Tx sequence count */; 4491 u32_t rolled_tx_data_offset /* Tx data offset */; 4492 }; 4493 4494 4495 /* 4496 * Fcp RSP flags $$KEEP_ENDIANNESS$$ 4497 */ 4498 struct fcoe_fcp_rsp_flags 4499 { 4500 u8_t flags; 4501 #define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID (0x1<<0) /* BitField flags */ 4502 #define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID_SHIFT 0 4503 #define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID (0x1<<1) /* BitField flags */ 4504 #define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID_SHIFT 1 4505 #define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER (0x1<<2) /* BitField flags */ 4506 #define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER_SHIFT 2 4507 #define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER (0x1<<3) /* BitField flags */ 4508 #define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER_SHIFT 3 4509 #define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ (0x1<<4) /* BitField flags */ 4510 #define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ_SHIFT 4 4511 #define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS (0x7<<5) /* BitField flags */ 4512 #define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS_SHIFT 5 4513 }; 4514 4515 /* 4516 * Fcp RSP payload $$KEEP_ENDIANNESS$$ 4517 */ 4518 struct fcoe_fcp_rsp_payload 4519 { 4520 struct regpair_t reserved0; 4521 u32_t fcp_resid; 4522 u8_t scsi_status_code; 4523 struct fcoe_fcp_rsp_flags fcp_flags; 4524 u16_t retry_delay_timer; 4525 u32_t fcp_rsp_len; 4526 u32_t fcp_sns_len; 4527 }; 4528 4529 /* 4530 * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ 4531 */ 4532 struct fcoe_fcp_rsp_union 4533 { 4534 struct fcoe_fcp_rsp_payload payload; 4535 struct regpair_t reserved0; 4536 }; 4537 4538 /* 4539 * FC header $$KEEP_ENDIANNESS$$ 4540 */ 4541 struct fcoe_fc_hdr 4542 { 4543 u8_t s_id[3]; 4544 u8_t cs_ctl; 4545 u8_t d_id[3]; 4546 u8_t r_ctl; 4547 u16_t seq_cnt; 4548 u8_t df_ctl; 4549 u8_t seq_id; 4550 u8_t f_ctl[3]; 4551 u8_t type; 4552 u32_t parameters; 4553 u16_t rx_id; 4554 u16_t ox_id; 4555 }; 4556 4557 /* 4558 * FC header union $$KEEP_ENDIANNESS$$ 4559 */ 4560 struct fcoe_mp_rsp_union 4561 { 4562 struct fcoe_fc_hdr fc_hdr /* FC header copied into task context (middle path flows) */; 4563 u32_t mp_payload_len /* Length of the MP payload that was placed */; 4564 u32_t rsrv; 4565 }; 4566 4567 /* 4568 * Completion information $$KEEP_ENDIANNESS$$ 4569 */ 4570 union fcoe_comp_flow_info 4571 { 4572 struct fcoe_fcp_rsp_union fcp_rsp /* FCP_RSP payload */; 4573 struct fcoe_abts_rsp_union abts_rsp /* ABTS ACC R_CTL part of the FC header ABTS ACC or BA_RJT payload frame */; 4574 struct fcoe_mp_rsp_union mp_rsp /* FC header copied into task context (middle path flows) */; 4575 u32_t opaque[8]; 4576 }; 4577 4578 4579 /* 4580 * External ABTS info $$KEEP_ENDIANNESS$$ 4581 */ 4582 struct fcoe_ext_abts_info 4583 { 4584 u32_t rsrv0[6]; 4585 struct fcoe_abts_info ctx /* ABTS information. Initialized by Xstorm */; 4586 }; 4587 4588 4589 /* 4590 * External cleanup info $$KEEP_ENDIANNESS$$ 4591 */ 4592 struct fcoe_ext_cleanup_info 4593 { 4594 u32_t rsrv0[6]; 4595 struct fcoe_cleanup_info ctx /* Cleanup information */; 4596 }; 4597 4598 4599 /* 4600 * Fcoe FW Tx sequence context $$KEEP_ENDIANNESS$$ 4601 */ 4602 struct fcoe_fw_tx_seq_ctx 4603 { 4604 u32_t data_offset /* The amount of data transmitted so far (equal to FCP_DATA PARAMETER field) */; 4605 u16_t seq_cnt /* The last SEQ_CNT transmitted */; 4606 u16_t rsrv0; 4607 }; 4608 4609 /* 4610 * Fcoe external FW Tx sequence context $$KEEP_ENDIANNESS$$ 4611 */ 4612 struct fcoe_ext_fw_tx_seq_ctx 4613 { 4614 u32_t rsrv0[6]; 4615 struct fcoe_fw_tx_seq_ctx ctx /* TX sequence context */; 4616 }; 4617 4618 4619 /* 4620 * FCoE multiple sges context $$KEEP_ENDIANNESS$$ 4621 */ 4622 struct fcoe_mul_sges_ctx 4623 { 4624 struct regpair_t cur_sge_addr /* Current BD address */; 4625 u16_t cur_sge_off /* Offset in current BD (in bytes) */; 4626 u8_t cur_sge_idx /* Current BD index in BD list */; 4627 u8_t sgl_size /* Total number of BDs */; 4628 }; 4629 4630 /* 4631 * FCoE external multiple sges context $$KEEP_ENDIANNESS$$ 4632 */ 4633 struct fcoe_ext_mul_sges_ctx 4634 { 4635 struct fcoe_mul_sges_ctx mul_sgl /* SGL context */; 4636 struct regpair_t rsrv0; 4637 }; 4638 4639 4640 /* 4641 * FCP CMD payload $$KEEP_ENDIANNESS$$ 4642 */ 4643 struct fcoe_fcp_cmd_payload 4644 { 4645 u32_t opaque[8]; 4646 }; 4647 4648 4649 4650 4651 4652 /* 4653 * Fcp xfr rdy payload $$KEEP_ENDIANNESS$$ 4654 */ 4655 struct fcoe_fcp_xfr_rdy_payload 4656 { 4657 u32_t burst_len; 4658 u32_t data_ro; 4659 }; 4660 4661 4662 /* 4663 * FC frame $$KEEP_ENDIANNESS$$ 4664 */ 4665 struct fcoe_fc_frame 4666 { 4667 struct fcoe_fc_hdr fc_hdr; 4668 u32_t reserved0[2]; 4669 }; 4670 4671 4672 4673 4674 /* 4675 * FCoE KCQ CQE parameters $$KEEP_ENDIANNESS$$ 4676 */ 4677 union fcoe_kcqe_params 4678 { 4679 u32_t reserved0[4]; 4680 }; 4681 4682 /* 4683 * FCoE KCQ CQE $$KEEP_ENDIANNESS$$ 4684 */ 4685 struct fcoe_kcqe 4686 { 4687 u32_t fcoe_conn_id /* Drivers connection ID (only 16 bits are used) */; 4688 u32_t completion_status /* 0=command completed succesfuly, 1=command failed */; 4689 u32_t fcoe_conn_context_id /* Context ID of the FCoE connection */; 4690 union fcoe_kcqe_params params /* command-specific parameters */; 4691 u16_t qe_self_seq /* Self identifying sequence number */; 4692 u8_t op_code /* FCoE KCQ opcode */; 4693 u8_t flags; 4694 #define FCOE_KCQE_RESERVED0 (0x7<<0) /* BitField flags */ 4695 #define FCOE_KCQE_RESERVED0_SHIFT 0 4696 #define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3) /* BitField flags Everest only - indicates whether this KCQE is a ramrod completion */ 4697 #define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 3 4698 #define FCOE_KCQE_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5,iSCSI,FCoE) */ 4699 #define FCOE_KCQE_LAYER_CODE_SHIFT 4 4700 #define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7) /* BitField flags Indicates whether this KCQE is linked with the next KCQE */ 4701 #define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 7 4702 }; 4703 4704 4705 4706 /* 4707 * FCoE KWQE header $$KEEP_ENDIANNESS$$ 4708 */ 4709 struct fcoe_kwqe_header 4710 { 4711 u8_t op_code /* FCoE KWQE opcode */; 4712 u8_t flags; 4713 #define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0) /* BitField flags */ 4714 #define FCOE_KWQE_HEADER_RESERVED0_SHIFT 0 4715 #define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5) */ 4716 #define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 4 4717 #define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7) /* BitField flags */ 4718 #define FCOE_KWQE_HEADER_RESERVED1_SHIFT 7 4719 }; 4720 4721 /* 4722 * FCoE firmware init request 1 $$KEEP_ENDIANNESS$$ 4723 */ 4724 struct fcoe_kwqe_init1 4725 { 4726 u16_t num_tasks /* Number of tasks in global task list */; 4727 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4728 u32_t task_list_pbl_addr_lo /* Lower 32-bit of Task List page table */; 4729 u32_t task_list_pbl_addr_hi /* Higher 32-bit of Task List page table */; 4730 u32_t dummy_buffer_addr_lo /* Lower 32-bit of dummy buffer */; 4731 u32_t dummy_buffer_addr_hi /* Higher 32-bit of dummy buffer */; 4732 u16_t sq_num_wqes /* Number of entries in the Send Queue */; 4733 u16_t rq_num_wqes /* Number of entries in the Receive Queue */; 4734 u16_t rq_buffer_log_size /* Log of the size of a single buffer (entry) in the RQ */; 4735 u16_t cq_num_wqes /* Number of entries in the Completion Queue */; 4736 u16_t mtu /* Max transmission unit */; 4737 u8_t num_sessions_log /* Log of the number of sessions */; 4738 u8_t flags; 4739 #define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0) /* BitField flags log of page size value */ 4740 #define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 0 4741 #define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4) /* BitField flags */ 4742 #define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 4 4743 #define FCOE_KWQE_INIT1_CLASSIFY_FAILED_ALLOWED (0x1<<7) /* BitField flags Special MF mode where classification failure indication from HW is allowed */ 4744 #define FCOE_KWQE_INIT1_CLASSIFY_FAILED_ALLOWED_SHIFT 7 4745 }; 4746 4747 /* 4748 * FCoE firmware init request 2 $$KEEP_ENDIANNESS$$ 4749 */ 4750 struct fcoe_kwqe_init2 4751 { 4752 u8_t hsi_major_version /* Implies on a change broken previous HSI */; 4753 u8_t hsi_minor_version /* Implies on a change which does not broken previous HSI */; 4754 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4755 u32_t hash_tbl_pbl_addr_lo /* Lower 32-bit of Hash table PBL */; 4756 u32_t hash_tbl_pbl_addr_hi /* Higher 32-bit of Hash table PBL */; 4757 u32_t t2_hash_tbl_addr_lo /* Lower 32-bit of T2 Hash table */; 4758 u32_t t2_hash_tbl_addr_hi /* Higher 32-bit of T2 Hash table */; 4759 u32_t t2_ptr_hash_tbl_addr_lo /* Lower 32-bit of T2 ptr Hash table */; 4760 u32_t t2_ptr_hash_tbl_addr_hi /* Higher 32-bit of T2 ptr Hash table */; 4761 u32_t free_list_count /* T2 free list count */; 4762 }; 4763 4764 /* 4765 * FCoE firmware init request 3 $$KEEP_ENDIANNESS$$ 4766 */ 4767 struct fcoe_kwqe_init3 4768 { 4769 u16_t reserved0; 4770 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4771 u32_t error_bit_map_lo /* 32 lower bits of error bitmap: 1=error, 0=warning */; 4772 u32_t error_bit_map_hi /* 32 upper bits of error bitmap: 1=error, 0=warning */; 4773 u8_t perf_config /* 0= no performance acceleration, 1=cached connection, 2=cached tasks, 3=both */; 4774 u8_t reserved21[3]; 4775 u32_t reserved2[4]; 4776 }; 4777 4778 /* 4779 * FCoE connection offload request 1 $$KEEP_ENDIANNESS$$ 4780 */ 4781 struct fcoe_kwqe_conn_offload1 4782 { 4783 u16_t fcoe_conn_id /* Drivers connection ID. Should be sent in KCQEs to speed-up drivers access to connection data. */; 4784 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4785 u32_t sq_addr_lo /* Lower 32-bit of SQ */; 4786 u32_t sq_addr_hi /* Higher 32-bit of SQ */; 4787 u32_t rq_pbl_addr_lo /* Lower 32-bit of RQ page table */; 4788 u32_t rq_pbl_addr_hi /* Higher 32-bit of RQ page table */; 4789 u32_t rq_first_pbe_addr_lo /* Lower 32-bit of first RQ pbe */; 4790 u32_t rq_first_pbe_addr_hi /* Higher 32-bit of first RQ pbe */; 4791 u16_t rq_prod /* Initial RQ producer */; 4792 u16_t reserved0; 4793 }; 4794 4795 /* 4796 * FCoE connection offload request 2 $$KEEP_ENDIANNESS$$ 4797 */ 4798 struct fcoe_kwqe_conn_offload2 4799 { 4800 u16_t tx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by target, received during both FLOGI and PLOGI, minimum value should be taken */; 4801 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4802 u32_t cq_addr_lo /* Lower 32-bit of CQ */; 4803 u32_t cq_addr_hi /* Higher 32-bit of CQ */; 4804 u32_t xferq_addr_lo /* Lower 32-bit of XFERQ */; 4805 u32_t xferq_addr_hi /* Higher 32-bit of XFERQ */; 4806 u32_t conn_db_addr_lo /* Lower 32-bit of Conn DB (RQ prod and CQ arm bit) */; 4807 u32_t conn_db_addr_hi /* Higher 32-bit of Conn DB (RQ prod and CQ arm bit) */; 4808 u32_t reserved1; 4809 }; 4810 4811 /* 4812 * FCoE connection offload request 3 $$KEEP_ENDIANNESS$$ 4813 */ 4814 struct fcoe_kwqe_conn_offload3 4815 { 4816 u16_t vlan_tag; 4817 #define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0) /* BitField vlan_tag Vlan id */ 4818 #define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 0 4819 #define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12) /* BitField vlan_tag Canonical format indicator */ 4820 #define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 12 4821 #define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13) /* BitField vlan_tag Vlan priority */ 4822 #define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 13 4823 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4824 u8_t s_id[3] /* Source ID, received during FLOGI */; 4825 u8_t tx_max_conc_seqs_c3 /* Maximum concurrent Sequences for Class 3 supported by target, received during PLOGI */; 4826 u8_t d_id[3] /* Destination ID, received after inquiry of the fabric network */; 4827 u8_t flags; 4828 #define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0) /* BitField flags Supporting multiple N_Port IDs indication, received during FLOGI */ 4829 #define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 0 4830 #define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1) /* BitField flags E_D_TOV resolution (0 - msec, 1 - nsec), negotiated in PLOGI */ 4831 #define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 1 4832 #define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2) /* BitField flags Continuously increasing SEQ_CNT indication, received during PLOGI */ 4833 #define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 2 4834 #define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3) /* BitField flags Confirmation request supported */ 4835 #define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 3 4836 #define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4) /* BitField flags REC allowed */ 4837 #define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 4 4838 #define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5) /* BitField flags Class 2 valid, received during PLOGI */ 4839 #define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 5 4840 #define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6) /* BitField flags ACK_0 capability supporting by target, received furing PLOGI */ 4841 #define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 6 4842 #define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7) /* BitField flags Is inner vlan exist */ 4843 #define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 7 4844 u32_t reserved; 4845 u32_t confq_first_pbe_addr_lo /* The first page used when handling CONFQ - low address */; 4846 u32_t confq_first_pbe_addr_hi /* The first page used when handling CONFQ - high address */; 4847 u16_t tx_total_conc_seqs /* Total concurrent Sequences for all Classes supported by target, received during PLOGI */; 4848 u16_t rx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by us, sent during FLOGI/PLOGI */; 4849 u16_t rx_total_conc_seqs /* Total concurrent Sequences for all Classes supported by us, sent during PLOGI */; 4850 u8_t rx_max_conc_seqs_c3 /* Maximum Concurrent Sequences for Class 3 supported by us, sent during PLOGI */; 4851 u8_t rx_open_seqs_exch_c3 /* Maximum Open Sequences per Exchange for Class 3 supported by us, sent during PLOGI */; 4852 }; 4853 4854 /* 4855 * FCoE connection offload request 4 $$KEEP_ENDIANNESS$$ 4856 */ 4857 struct fcoe_kwqe_conn_offload4 4858 { 4859 u8_t e_d_tov_timer_val /* E_D_TOV timer value in milliseconds/20, negotiated in PLOGI */; 4860 u8_t reserved2; 4861 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4862 u8_t src_mac_addr_lo[2] /* Lower 16-bit of source MAC address */; 4863 u8_t src_mac_addr_mid[2] /* Mid 16-bit of source MAC address */; 4864 u8_t src_mac_addr_hi[2] /* Higher 16-bit of source MAC address */; 4865 u8_t dst_mac_addr_hi[2] /* Higher 16-bit of destination MAC address */; 4866 u8_t dst_mac_addr_lo[2] /* Lower 16-bit destination MAC address */; 4867 u8_t dst_mac_addr_mid[2] /* Mid 16-bit destination MAC address */; 4868 u32_t lcq_addr_lo /* Lower 32-bit of LCQ */; 4869 u32_t lcq_addr_hi /* Higher 32-bit of LCQ */; 4870 u32_t confq_pbl_base_addr_lo /* CONFQ PBL low address */; 4871 u32_t confq_pbl_base_addr_hi /* CONFQ PBL high address */; 4872 }; 4873 4874 /* 4875 * FCoE connection enable request $$KEEP_ENDIANNESS$$ 4876 */ 4877 struct fcoe_kwqe_conn_enable_disable 4878 { 4879 u16_t reserved0; 4880 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4881 u8_t src_mac_addr_lo[2] /* Lower 16-bit of source MAC address (HBAs MAC address) */; 4882 u8_t src_mac_addr_mid[2] /* Mid 16-bit of source MAC address (HBAs MAC address) */; 4883 u8_t src_mac_addr_hi[2] /* Higher 16-bit of source MAC address (HBAs MAC address) */; 4884 u16_t vlan_tag; 4885 #define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0) /* BitField vlan_tagVlan tag Vlan id */ 4886 #define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 0 4887 #define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12) /* BitField vlan_tagVlan tag Canonical format indicator */ 4888 #define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 12 4889 #define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13) /* BitField vlan_tagVlan tag Vlan priority */ 4890 #define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 13 4891 u8_t dst_mac_addr_lo[2] /* Lower 16-bit of destination MAC address (FCFs MAC address) */; 4892 u8_t dst_mac_addr_mid[2] /* Mid 16-bit of destination MAC address (FCFs MAC address) */; 4893 u8_t dst_mac_addr_hi[2] /* Higher 16-bit of destination MAC address (FCFs MAC address) */; 4894 u16_t reserved1; 4895 u8_t s_id[3] /* Source ID, received during FLOGI */; 4896 u8_t vlan_flag /* Vlan flag */; 4897 u8_t d_id[3] /* Destination ID, received after inquiry of the fabric network */; 4898 u8_t reserved3; 4899 u32_t context_id /* Context ID (cid) of the connection */; 4900 u32_t conn_id /* FCoE Connection ID */; 4901 u32_t reserved4; 4902 }; 4903 4904 /* 4905 * FCoE connection destroy request $$KEEP_ENDIANNESS$$ 4906 */ 4907 struct fcoe_kwqe_conn_destroy 4908 { 4909 u16_t reserved0; 4910 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4911 u32_t context_id /* Context ID (cid) of the connection */; 4912 u32_t conn_id /* FCoE Connection ID */; 4913 u32_t reserved1[5]; 4914 }; 4915 4916 /* 4917 * FCoe destroy request $$KEEP_ENDIANNESS$$ 4918 */ 4919 struct fcoe_kwqe_destroy 4920 { 4921 u16_t reserved0; 4922 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4923 u32_t reserved1[7]; 4924 }; 4925 4926 /* 4927 * FCoe statistics request $$KEEP_ENDIANNESS$$ 4928 */ 4929 struct fcoe_kwqe_stat 4930 { 4931 u16_t reserved0; 4932 struct fcoe_kwqe_header hdr /* KWQ WQE header */; 4933 u32_t stat_params_addr_lo /* Statistics host address */; 4934 u32_t stat_params_addr_hi /* Statistics host address */; 4935 u32_t reserved1[5]; 4936 }; 4937 4938 /* 4939 * FCoE KWQ WQE $$KEEP_ENDIANNESS$$ 4940 */ 4941 union fcoe_kwqe 4942 { 4943 struct fcoe_kwqe_init1 init1; 4944 struct fcoe_kwqe_init2 init2; 4945 struct fcoe_kwqe_init3 init3; 4946 struct fcoe_kwqe_conn_offload1 conn_offload1; 4947 struct fcoe_kwqe_conn_offload2 conn_offload2; 4948 struct fcoe_kwqe_conn_offload3 conn_offload3; 4949 struct fcoe_kwqe_conn_offload4 conn_offload4; 4950 struct fcoe_kwqe_conn_enable_disable conn_enable_disable; 4951 struct fcoe_kwqe_conn_destroy conn_destroy; 4952 struct fcoe_kwqe_destroy destroy; 4953 struct fcoe_kwqe_stat statistics; 4954 }; 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 /* 4972 * TX SGL context $$KEEP_ENDIANNESS$$ 4973 */ 4974 union fcoe_sgl_union_ctx 4975 { 4976 struct fcoe_cached_sge_ctx cached_sge /* Cached SGEs context */; 4977 struct fcoe_ext_mul_sges_ctx sgl /* SGL context */; 4978 u32_t opaque[5]; 4979 }; 4980 4981 /* 4982 * Data-In/ELS/BLS information $$KEEP_ENDIANNESS$$ 4983 */ 4984 struct fcoe_read_flow_info 4985 { 4986 union fcoe_sgl_union_ctx sgl_ctx /* The SGL that would be used for data placement (20 bytes) */; 4987 u32_t rsrv0[3]; 4988 }; 4989 4990 4991 /* 4992 * Fcoe stat context $$KEEP_ENDIANNESS$$ 4993 */ 4994 struct fcoe_s_stat_ctx 4995 { 4996 u8_t flags; 4997 #define FCOE_S_STAT_CTX_ACTIVE (0x1<<0) /* BitField flags Active Sequence indication (0 - not avtive; 1 - active) */ 4998 #define FCOE_S_STAT_CTX_ACTIVE_SHIFT 0 4999 #define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND (0x1<<1) /* BitField flags Abort Sequence requested indication */ 5000 #define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND_SHIFT 1 5001 #define FCOE_S_STAT_CTX_ABTS_PERFORMED (0x1<<2) /* BitField flags ABTS (on Sequence) protocol complete indication (0 - not completed; 1 -completed by Recipient) */ 5002 #define FCOE_S_STAT_CTX_ABTS_PERFORMED_SHIFT 2 5003 #define FCOE_S_STAT_CTX_SEQ_TIMEOUT (0x1<<3) /* BitField flags E_D_TOV timeout indication */ 5004 #define FCOE_S_STAT_CTX_SEQ_TIMEOUT_SHIFT 3 5005 #define FCOE_S_STAT_CTX_P_RJT (0x1<<4) /* BitField flags P_RJT transmitted indication */ 5006 #define FCOE_S_STAT_CTX_P_RJT_SHIFT 4 5007 #define FCOE_S_STAT_CTX_ACK_EOFT (0x1<<5) /* BitField flags ACK (EOFt) transmitted indication (0 - not tranmitted; 1 - transmitted) */ 5008 #define FCOE_S_STAT_CTX_ACK_EOFT_SHIFT 5 5009 #define FCOE_S_STAT_CTX_RSRV1 (0x3<<6) /* BitField flags */ 5010 #define FCOE_S_STAT_CTX_RSRV1_SHIFT 6 5011 }; 5012 5013 /* 5014 * Fcoe rx seq context $$KEEP_ENDIANNESS$$ 5015 */ 5016 struct fcoe_rx_seq_ctx 5017 { 5018 u8_t seq_id /* The Sequence ID */; 5019 struct fcoe_s_stat_ctx s_stat /* The Sequence status */; 5020 u16_t seq_cnt /* The lowest SEQ_CNT received for the Sequence */; 5021 u32_t low_exp_ro /* Report on the offset at the beginning of the Sequence */; 5022 u32_t high_exp_ro /* The highest expected relative offset. The next buffer offset to be received in case of XFER_RDY or in FCP_DATA */; 5023 }; 5024 5025 5026 /* 5027 * FCoE RX statistics parameters section#0 $$KEEP_ENDIANNESS$$ 5028 */ 5029 struct fcoe_rx_stat_params_section0 5030 { 5031 u32_t fcoe_rx_pkt_cnt /* Number of FCoE packets that were legally received */; 5032 u32_t fcoe_rx_byte_cnt /* Number of FCoE bytes that were legally received */; 5033 }; 5034 5035 5036 /* 5037 * FCoE RX statistics parameters section#1 $$KEEP_ENDIANNESS$$ 5038 */ 5039 struct fcoe_rx_stat_params_section1 5040 { 5041 u32_t fcoe_ver_cnt /* Number of packets with wrong FCoE version */; 5042 u32_t fcoe_rx_drop_pkt_cnt /* Number of FCoE packets that were dropped */; 5043 }; 5044 5045 5046 /* 5047 * FCoE RX statistics parameters section#2 $$KEEP_ENDIANNESS$$ 5048 */ 5049 struct fcoe_rx_stat_params_section2 5050 { 5051 u32_t fc_crc_cnt /* Number of packets with FC CRC error */; 5052 u32_t eofa_del_cnt /* Number of packets with EOFa delimiter */; 5053 u32_t miss_frame_cnt /* Number of missing packets */; 5054 u32_t seq_timeout_cnt /* Number of sequence timeout expirations (E_D_TOV) */; 5055 u32_t drop_seq_cnt /* Number of Sequences that were sropped */; 5056 u32_t fcoe_rx_drop_pkt_cnt /* Number of FCoE packets that were dropped */; 5057 u32_t fcp_rx_pkt_cnt /* Number of FCP packets that were legally received */; 5058 u32_t reserved0; 5059 }; 5060 5061 5062 /* 5063 * Fcoe rx_wr union context $$KEEP_ENDIANNESS$$ 5064 */ 5065 union fcoe_rx_wr_union_ctx 5066 { 5067 struct fcoe_read_flow_info read_info /* Data-In/ELS/BLS information */; 5068 union fcoe_comp_flow_info comp_info /* Completion information */; 5069 u32_t opaque[8]; 5070 }; 5071 5072 5073 5074 /* 5075 * FCoE SQ element $$KEEP_ENDIANNESS$$ 5076 */ 5077 struct fcoe_sqe 5078 { 5079 u16_t wqe; 5080 #define FCOE_SQE_TASK_ID (0x7FFF<<0) /* BitField wqe The task ID (OX_ID) to be processed */ 5081 #define FCOE_SQE_TASK_ID_SHIFT 0 5082 #define FCOE_SQE_TOGGLE_BIT (0x1<<15) /* BitField wqe Toggle bit updated by the driver */ 5083 #define FCOE_SQE_TOGGLE_BIT_SHIFT 15 5084 }; 5085 5086 5087 /* 5088 * FCoE TX statistics parameters $$KEEP_ENDIANNESS$$ 5089 */ 5090 struct fcoe_tx_stat_params 5091 { 5092 u32_t fcoe_tx_pkt_cnt /* Number of transmitted FCoE packets */; 5093 u32_t fcoe_tx_byte_cnt /* Number of transmitted FCoE bytes */; 5094 u32_t fcp_tx_pkt_cnt /* Number of transmitted FCP packets */; 5095 u32_t reserved0; 5096 }; 5097 5098 /* 5099 * FCoE statistics parameters $$KEEP_ENDIANNESS$$ 5100 */ 5101 struct fcoe_statistics_params 5102 { 5103 struct fcoe_tx_stat_params tx_stat /* FCoE TX statistics parameters */; 5104 struct fcoe_rx_stat_params_section0 rx_stat0 /* FCoE RX statistics parameters section#0 */; 5105 struct fcoe_rx_stat_params_section1 rx_stat1 /* FCoE RX statistics parameters section#1 */; 5106 struct fcoe_rx_stat_params_section2 rx_stat2 /* FCoE RX statistics parameters section#2 */; 5107 }; 5108 5109 5110 5111 /* 5112 * 14 regs $$KEEP_ENDIANNESS$$ 5113 */ 5114 struct fcoe_tce_tx_only 5115 { 5116 union fcoe_sgl_union_ctx sgl_ctx /* TX SGL context */; 5117 u32_t rsrv0; 5118 }; 5119 5120 /* 5121 * 32 bytes (8 regs) used for TX only purposes $$KEEP_ENDIANNESS$$ 5122 */ 5123 union fcoe_tx_wr_rx_rd_union_ctx 5124 { 5125 struct fcoe_fc_frame tx_frame /* Middle-path/ABTS/Data-Out information */; 5126 struct fcoe_fcp_cmd_payload fcp_cmd /* FCP_CMD payload */; 5127 struct fcoe_ext_cleanup_info cleanup /* Task ID to be cleaned */; 5128 struct fcoe_ext_abts_info abts /* Task ID to be aborted */; 5129 struct fcoe_ext_fw_tx_seq_ctx tx_seq /* TX sequence information */; 5130 u32_t opaque[8]; 5131 }; 5132 5133 /* 5134 * tce_tx_wr_rx_rd_const $$KEEP_ENDIANNESS$$ 5135 */ 5136 struct fcoe_tce_tx_wr_rx_rd_const 5137 { 5138 u8_t init_flags; 5139 #define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE (0x7<<0) /* BitField init_flags Task type - Write / Read / Middle / Unsolicited / ABTS / Cleanup */ 5140 #define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT 0 5141 #define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE (0x1<<3) /* BitField init_flags Tape/Disk device indication */ 5142 #define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT 3 5143 #define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE (0x1<<4) /* BitField init_flags Class 3/2 indication */ 5144 #define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT 4 5145 #define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE (0x3<<5) /* BitField init_flags Num of cached sge (0 - not cached sge) */ 5146 #define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT 5 5147 #define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV (0x1<<7) /* BitField init_flags Support REC_TOV flag, for FW use only */ 5148 #define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV_SHIFT 7 5149 u8_t tx_flags; 5150 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID (0x1<<0) /* BitField tx_flagsBoth TX and RX processing could read but only the TX could write Indication of TX valid task */ 5151 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID_SHIFT 0 5152 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE (0xF<<1) /* BitField tx_flagsBoth TX and RX processing could read but only the TX could write The TX state of the task */ 5153 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT 1 5154 #define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1 (0x1<<5) /* BitField tx_flagsBoth TX and RX processing could read but only the TX could write */ 5155 #define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1_SHIFT 5 5156 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT (0x1<<6) /* BitField tx_flagsBoth TX and RX processing could read but only the TX could write TX Sequence initiative indication */ 5157 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT_SHIFT 6 5158 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_COMP_TRNS (0x1<<7) /* BitField tx_flagsBoth TX and RX processing could read but only the TX could write Compelted full tranmission of this task */ 5159 #define FCOE_TCE_TX_WR_RX_RD_CONST_TX_COMP_TRNS_SHIFT 7 5160 u16_t rsrv3; 5161 u32_t verify_tx_seq /* Sequence counter snapshot in order to verify target did not send FCP_RSP before the actual transmission of PBF from the SGL */; 5162 }; 5163 5164 /* 5165 * tce_tx_wr_rx_rd $$KEEP_ENDIANNESS$$ 5166 */ 5167 struct fcoe_tce_tx_wr_rx_rd 5168 { 5169 union fcoe_tx_wr_rx_rd_union_ctx union_ctx /* 32 (8 regs) bytes used for TX only purposes */; 5170 struct fcoe_tce_tx_wr_rx_rd_const const_ctx /* Constant TX_WR_RX_RD */; 5171 }; 5172 5173 /* 5174 * tce_rx_wr_tx_rd_const $$KEEP_ENDIANNESS$$ 5175 */ 5176 struct fcoe_tce_rx_wr_tx_rd_const 5177 { 5178 u32_t data_2_trns /* The maximum amount of data that would be transferred in this task */; 5179 u32_t init_flags; 5180 #define FCOE_TCE_RX_WR_TX_RD_CONST_CID (0xFFFFFF<<0) /* BitField init_flags The CID of the connection (used by the CHIP) */ 5181 #define FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT 0 5182 #define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0 (0xFF<<24) /* BitField init_flags */ 5183 #define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0_SHIFT 24 5184 }; 5185 5186 /* 5187 * tce_rx_wr_tx_rd_var $$KEEP_ENDIANNESS$$ 5188 */ 5189 struct fcoe_tce_rx_wr_tx_rd_var 5190 { 5191 u16_t rx_flags; 5192 #define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1 (0xF<<0) /* BitField rx_flags */ 5193 #define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1_SHIFT 0 5194 #define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE (0x7<<4) /* BitField rx_flags The number of RQ WQEs that were consumed (for sense data only) */ 5195 #define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE_SHIFT 4 5196 #define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ (0x1<<7) /* BitField rx_flags Confirmation request indication */ 5197 #define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ_SHIFT 7 5198 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE (0xF<<8) /* BitField rx_flags The RX state of the task */ 5199 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE_SHIFT 8 5200 #define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME (0x1<<12) /* BitField rx_flags Indication on expecting to receive the first frame from target */ 5201 #define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT 12 5202 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT (0x1<<13) /* BitField rx_flags RX Sequence initiative indication */ 5203 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT_SHIFT 13 5204 #define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2 (0x1<<14) /* BitField rx_flags */ 5205 #define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2_SHIFT 14 5206 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID (0x1<<15) /* BitField rx_flags Indication of RX valid task */ 5207 #define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID_SHIFT 15 5208 u16_t rx_id /* The RX_ID read from incoming frame and to be used in subsequent transmitting frames */; 5209 struct fcoe_fcp_xfr_rdy_payload fcp_xfr_rdy /* Data-In/ELS/BLS information */; 5210 }; 5211 5212 /* 5213 * tce_rx_wr_tx_rd $$KEEP_ENDIANNESS$$ 5214 */ 5215 struct fcoe_tce_rx_wr_tx_rd 5216 { 5217 struct fcoe_tce_rx_wr_tx_rd_const const_ctx /* The RX_ID read from incoming frame and to be used in subsequent transmitting frames */; 5218 struct fcoe_tce_rx_wr_tx_rd_var var_ctx /* The RX_ID read from incoming frame and to be used in subsequent transmitting frames */; 5219 }; 5220 5221 /* 5222 * tce_rx_only $$KEEP_ENDIANNESS$$ 5223 */ 5224 struct fcoe_tce_rx_only 5225 { 5226 struct fcoe_rx_seq_ctx rx_seq_ctx /* The context of current receiving Sequence */; 5227 union fcoe_rx_wr_union_ctx union_ctx /* Read flow info/ Completion flow info */; 5228 }; 5229 5230 /* 5231 * task_ctx_entry $$KEEP_ENDIANNESS$$ 5232 */ 5233 struct fcoe_task_ctx_entry 5234 { 5235 struct fcoe_tce_tx_only txwr_only /* TX processing shall be the only one to read/write to this section */; 5236 struct fcoe_tce_tx_wr_rx_rd txwr_rxrd /* TX processing shall write and RX shall read from this section */; 5237 struct fcoe_tce_rx_wr_tx_rd rxwr_txrd /* RX processing shall write and TX shall read from this section */; 5238 struct fcoe_tce_rx_only rxwr_only /* RX processing shall be the only one to read/write to this section */; 5239 }; 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 /* 5252 * FCoE XFRQ element $$KEEP_ENDIANNESS$$ 5253 */ 5254 struct fcoe_xfrqe 5255 { 5256 u16_t wqe; 5257 #define FCOE_XFRQE_TASK_ID (0x7FFF<<0) /* BitField wqe The task ID (OX_ID) to be processed */ 5258 #define FCOE_XFRQE_TASK_ID_SHIFT 0 5259 #define FCOE_XFRQE_TOGGLE_BIT (0x1<<15) /* BitField wqe Toggle bit updated by the driver */ 5260 #define FCOE_XFRQE_TOGGLE_BIT_SHIFT 15 5261 }; 5262 5263 5264 /* 5265 * Cached SGEs $$KEEP_ENDIANNESS$$ 5266 */ 5267 struct common_fcoe_sgl 5268 { 5269 struct fcoe_bd_ctx sge[3]; 5270 }; 5271 5272 5273 /* 5274 * FCoE SQ\XFRQ element 5275 */ 5276 struct fcoe_cached_wqe 5277 { 5278 struct fcoe_sqe sqe /* SQ WQE */; 5279 struct fcoe_xfrqe xfrqe /* XFRQ WQE */; 5280 }; 5281 5282 5283 /* 5284 * FCoE connection enable\disable params passed by driver to FW in FCoE enable ramrod $$KEEP_ENDIANNESS$$ 5285 */ 5286 struct fcoe_conn_enable_disable_ramrod_params 5287 { 5288 struct fcoe_kwqe_conn_enable_disable enable_disable_kwqe; 5289 }; 5290 5291 5292 /* 5293 * FCoE connection offload params passed by driver to FW in FCoE offload ramrod $$KEEP_ENDIANNESS$$ 5294 */ 5295 struct fcoe_conn_offload_ramrod_params 5296 { 5297 struct fcoe_kwqe_conn_offload1 offload_kwqe1; 5298 struct fcoe_kwqe_conn_offload2 offload_kwqe2; 5299 struct fcoe_kwqe_conn_offload3 offload_kwqe3; 5300 struct fcoe_kwqe_conn_offload4 offload_kwqe4; 5301 }; 5302 5303 5304 struct ustorm_fcoe_mng_ctx 5305 { 5306 #if defined(__BIG_ENDIAN) 5307 u8_t mid_seq_proc_flag /* Middle Sequence received processing */; 5308 u8_t tce_in_cam_flag /* TCE in CAM indication */; 5309 u8_t tce_on_ior_flag /* TCE on IOR indication (TCE on IORs but not necessarily in CAM) */; 5310 u8_t en_cached_tce_flag /* TCE cached functionality enabled indication */; 5311 #elif defined(__LITTLE_ENDIAN) 5312 u8_t en_cached_tce_flag /* TCE cached functionality enabled indication */; 5313 u8_t tce_on_ior_flag /* TCE on IOR indication (TCE on IORs but not necessarily in CAM) */; 5314 u8_t tce_in_cam_flag /* TCE in CAM indication */; 5315 u8_t mid_seq_proc_flag /* Middle Sequence received processing */; 5316 #endif 5317 #if defined(__BIG_ENDIAN) 5318 u8_t tce_cam_addr /* CAM address of task context */; 5319 u8_t cached_conn_flag /* Cached locked connection indication */; 5320 u16_t rsrv0; 5321 #elif defined(__LITTLE_ENDIAN) 5322 u16_t rsrv0; 5323 u8_t cached_conn_flag /* Cached locked connection indication */; 5324 u8_t tce_cam_addr /* CAM address of task context */; 5325 #endif 5326 #if defined(__BIG_ENDIAN) 5327 u16_t dma_tce_ram_addr /* RAM address of task context when executing DMA operations (read/write) */; 5328 u16_t tce_ram_addr /* RAM address of task context (might be in cached table or in scratchpad) */; 5329 #elif defined(__LITTLE_ENDIAN) 5330 u16_t tce_ram_addr /* RAM address of task context (might be in cached table or in scratchpad) */; 5331 u16_t dma_tce_ram_addr /* RAM address of task context when executing DMA operations (read/write) */; 5332 #endif 5333 #if defined(__BIG_ENDIAN) 5334 u16_t ox_id /* Last OX_ID that has been used */; 5335 u16_t wr_done_seq /* Last task write done in the specific connection */; 5336 #elif defined(__LITTLE_ENDIAN) 5337 u16_t wr_done_seq /* Last task write done in the specific connection */; 5338 u16_t ox_id /* Last OX_ID that has been used */; 5339 #endif 5340 struct regpair_t task_addr /* Last task address in used */; 5341 }; 5342 5343 /* 5344 * Parameters initialized during offloaded according to FLOGI/PLOGI/PRLI and used in FCoE context section 5345 */ 5346 struct ustorm_fcoe_params 5347 { 5348 #if defined(__BIG_ENDIAN) 5349 u16_t fcoe_conn_id /* The connection ID that would be used by driver to identify the conneciton */; 5350 u16_t flags; 5351 #define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) /* BitField flags Supporting multiple N_Port IDs indication, received during FLOGI */ 5352 #define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 5353 #define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) /* BitField flags E_D_TOV resolution (0 - msec, 1 - nsec), negotiated in PLOGI */ 5354 #define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 5355 #define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) /* BitField flags Continuously increasing SEQ_CNT indication, received during PLOGI */ 5356 #define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 5357 #define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) /* BitField flags Confirmation request supported */ 5358 #define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 5359 #define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) /* BitField flags REC allowed */ 5360 #define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 5361 #define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) /* BitField flags CQ toggle bit */ 5362 #define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 5363 #define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) /* BitField flags XFRQ toggle bit */ 5364 #define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 5365 #define USTORM_FCOE_PARAMS_B_CONFQ_TOGGLE_BIT (0x1<<7) /* BitField flags CONFQ toggle bit */ 5366 #define USTORM_FCOE_PARAMS_B_CONFQ_TOGGLE_BIT_SHIFT 7 5367 #define USTORM_FCOE_PARAMS_RSRV0 (0xFF<<8) /* BitField flags */ 5368 #define USTORM_FCOE_PARAMS_RSRV0_SHIFT 8 5369 #elif defined(__LITTLE_ENDIAN) 5370 u16_t flags; 5371 #define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) /* BitField flags Supporting multiple N_Port IDs indication, received during FLOGI */ 5372 #define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 5373 #define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) /* BitField flags E_D_TOV resolution (0 - msec, 1 - nsec), negotiated in PLOGI */ 5374 #define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 5375 #define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) /* BitField flags Continuously increasing SEQ_CNT indication, received during PLOGI */ 5376 #define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 5377 #define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) /* BitField flags Confirmation request supported */ 5378 #define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 5379 #define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) /* BitField flags REC allowed */ 5380 #define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 5381 #define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) /* BitField flags CQ toggle bit */ 5382 #define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 5383 #define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) /* BitField flags XFRQ toggle bit */ 5384 #define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 5385 #define USTORM_FCOE_PARAMS_B_CONFQ_TOGGLE_BIT (0x1<<7) /* BitField flags CONFQ toggle bit */ 5386 #define USTORM_FCOE_PARAMS_B_CONFQ_TOGGLE_BIT_SHIFT 7 5387 #define USTORM_FCOE_PARAMS_RSRV0 (0xFF<<8) /* BitField flags */ 5388 #define USTORM_FCOE_PARAMS_RSRV0_SHIFT 8 5389 u16_t fcoe_conn_id /* The connection ID that would be used by driver to identify the conneciton */; 5390 #endif 5391 #if defined(__BIG_ENDIAN) 5392 u8_t hc_csdm_byte_en /* Host coalescing Cstorm RAM address byte enable */; 5393 u8_t func_id /* Function id */; 5394 u8_t port_id /* Port id */; 5395 u8_t vnic_id /* Vnic id */; 5396 #elif defined(__LITTLE_ENDIAN) 5397 u8_t vnic_id /* Vnic id */; 5398 u8_t port_id /* Port id */; 5399 u8_t func_id /* Function id */; 5400 u8_t hc_csdm_byte_en /* Host coalescing Cstorm RAM address byte enable */; 5401 #endif 5402 #if defined(__BIG_ENDIAN) 5403 u16_t rx_total_conc_seqs /* Total concurrent Sequences for all Classes supported by us, sent during PLOGI */; 5404 u16_t rx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by us, sent during FLOGI/PLOGI */; 5405 #elif defined(__LITTLE_ENDIAN) 5406 u16_t rx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by us, sent during FLOGI/PLOGI */; 5407 u16_t rx_total_conc_seqs /* Total concurrent Sequences for all Classes supported by us, sent during PLOGI */; 5408 #endif 5409 #if defined(__BIG_ENDIAN) 5410 u8_t task_pbe_idx_off /* The first PBE for this specific task list in RAM */; 5411 u8_t task_in_page_log_size /* Number of tasks in page (log 2) */; 5412 u16_t rx_max_conc_seqs /* Maximum Concurrent Sequences for Class 3 supported by us, sent during PLOGI */; 5413 #elif defined(__LITTLE_ENDIAN) 5414 u16_t rx_max_conc_seqs /* Maximum Concurrent Sequences for Class 3 supported by us, sent during PLOGI */; 5415 u8_t task_in_page_log_size /* Number of tasks in page (log 2) */; 5416 u8_t task_pbe_idx_off /* The first PBE for this specific task list in RAM */; 5417 #endif 5418 }; 5419 5420 /* 5421 * FCoE 16-bits index structure 5422 */ 5423 struct fcoe_idx16_fields 5424 { 5425 u16_t fields; 5426 #define FCOE_IDX16_FIELDS_IDX (0x7FFF<<0) /* BitField fields */ 5427 #define FCOE_IDX16_FIELDS_IDX_SHIFT 0 5428 #define FCOE_IDX16_FIELDS_MSB (0x1<<15) /* BitField fields */ 5429 #define FCOE_IDX16_FIELDS_MSB_SHIFT 15 5430 }; 5431 5432 /* 5433 * FCoE 16-bits index union 5434 */ 5435 union fcoe_idx16_field_union 5436 { 5437 struct fcoe_idx16_fields fields /* Parameters field */; 5438 u16_t val /* Global value */; 5439 }; 5440 5441 /* 5442 * Parameters required for placement according to SGL 5443 */ 5444 struct ustorm_fcoe_data_place_mng 5445 { 5446 #if defined(__BIG_ENDIAN) 5447 u16_t sge_off; 5448 u8_t num_sges /* Number of SGEs left to be used on context */; 5449 u8_t sge_idx /* 0xFF value indicated loading SGL */; 5450 #elif defined(__LITTLE_ENDIAN) 5451 u8_t sge_idx /* 0xFF value indicated loading SGL */; 5452 u8_t num_sges /* Number of SGEs left to be used on context */; 5453 u16_t sge_off; 5454 #endif 5455 }; 5456 5457 /* 5458 * Parameters required for placement according to SGL 5459 */ 5460 struct ustorm_fcoe_data_place 5461 { 5462 struct ustorm_fcoe_data_place_mng cached_mng /* 0xFF value indicated loading SGL */; 5463 struct fcoe_bd_ctx cached_sge[2]; 5464 }; 5465 5466 /* 5467 * TX processing shall write and RX processing shall read from this section 5468 */ 5469 union fcoe_u_tce_tx_wr_rx_rd_union 5470 { 5471 struct fcoe_abts_info abts /* ABTS information */; 5472 struct fcoe_cleanup_info cleanup /* Cleanup information */; 5473 struct fcoe_fw_tx_seq_ctx tx_seq_ctx /* TX sequence context */; 5474 u32_t opaque[2]; 5475 }; 5476 5477 /* 5478 * TX processing shall write and RX processing shall read from this section 5479 */ 5480 struct fcoe_u_tce_tx_wr_rx_rd 5481 { 5482 union fcoe_u_tce_tx_wr_rx_rd_union union_ctx /* FW DATA_OUT/CLEANUP information */; 5483 struct fcoe_tce_tx_wr_rx_rd_const const_ctx /* TX processing shall write and RX shall read from this section */; 5484 }; 5485 5486 struct ustorm_fcoe_tce 5487 { 5488 struct fcoe_u_tce_tx_wr_rx_rd txwr_rxrd /* TX processing shall write and RX shall read from this section */; 5489 struct fcoe_tce_rx_wr_tx_rd rxwr_txrd /* RX processing shall write and TX shall read from this section */; 5490 struct fcoe_tce_rx_only rxwr /* RX processing shall be the only one to read/write to this section */; 5491 }; 5492 5493 struct ustorm_fcoe_cache_ctx 5494 { 5495 u32_t rsrv0; 5496 struct ustorm_fcoe_data_place data_place; 5497 struct ustorm_fcoe_tce tce /* Task context */; 5498 }; 5499 5500 /* 5501 * Ustorm FCoE Storm Context 5502 */ 5503 struct ustorm_fcoe_st_context 5504 { 5505 struct ustorm_fcoe_mng_ctx mng_ctx /* Managing the processing of the flow */; 5506 struct ustorm_fcoe_params fcoe_params /* Align to 128 bytes */; 5507 struct regpair_t cq_base_addr /* CQ current page host address */; 5508 struct regpair_t rq_pbl_base /* PBL host address for RQ */; 5509 struct regpair_t rq_cur_page_addr /* RQ current page host address */; 5510 struct regpair_t confq_pbl_base_addr /* Base address of the CONFQ page list */; 5511 struct regpair_t conn_db_base /* Connection data base address in host memory where RQ producer and CQ arm bit reside in */; 5512 struct regpair_t xfrq_base_addr /* XFRQ base host address */; 5513 struct regpair_t lcq_base_addr /* LCQ base host address */; 5514 #if defined(__BIG_ENDIAN) 5515 union fcoe_idx16_field_union rq_cons /* RQ consumer advance for each RQ WQE consuming */; 5516 union fcoe_idx16_field_union rq_prod /* RQ producer update by driver and read by FW (should be initialized to RQ size) */; 5517 #elif defined(__LITTLE_ENDIAN) 5518 union fcoe_idx16_field_union rq_prod /* RQ producer update by driver and read by FW (should be initialized to RQ size) */; 5519 union fcoe_idx16_field_union rq_cons /* RQ consumer advance for each RQ WQE consuming */; 5520 #endif 5521 #if defined(__BIG_ENDIAN) 5522 u16_t xfrq_prod /* XFRQ producer (No consumer is needed since Q can not be overloaded) */; 5523 u16_t cq_cons /* CQ consumer copy of last update from driver (Q can not be overloaded) */; 5524 #elif defined(__LITTLE_ENDIAN) 5525 u16_t cq_cons /* CQ consumer copy of last update from driver (Q can not be overloaded) */; 5526 u16_t xfrq_prod /* XFRQ producer (No consumer is needed since Q can not be overloaded) */; 5527 #endif 5528 #if defined(__BIG_ENDIAN) 5529 u16_t lcq_cons /* lcq consumer */; 5530 u16_t hc_cram_address /* Host coalescing Cstorm RAM address */; 5531 #elif defined(__LITTLE_ENDIAN) 5532 u16_t hc_cram_address /* Host coalescing Cstorm RAM address */; 5533 u16_t lcq_cons /* lcq consumer */; 5534 #endif 5535 #if defined(__BIG_ENDIAN) 5536 u16_t sq_xfrq_lcq_confq_size /* SQ/XFRQ/LCQ/CONFQ size */; 5537 u16_t confq_prod /* CONFQ producer */; 5538 #elif defined(__LITTLE_ENDIAN) 5539 u16_t confq_prod /* CONFQ producer */; 5540 u16_t sq_xfrq_lcq_confq_size /* SQ/XFRQ/LCQ/CONFQ size */; 5541 #endif 5542 #if defined(__BIG_ENDIAN) 5543 u8_t hc_csdm_agg_int /* Host coalescing CSDM aggregative interrupts */; 5544 u8_t rsrv2; 5545 u8_t available_rqes /* Available RQEs */; 5546 u8_t sp_q_flush_cnt /* The remain number of queues to be flushed (in QM) */; 5547 #elif defined(__LITTLE_ENDIAN) 5548 u8_t sp_q_flush_cnt /* The remain number of queues to be flushed (in QM) */; 5549 u8_t available_rqes /* Available RQEs */; 5550 u8_t rsrv2; 5551 u8_t hc_csdm_agg_int /* Host coalescing CSDM aggregative interrupts */; 5552 #endif 5553 #if defined(__BIG_ENDIAN) 5554 u16_t num_pend_tasks /* Number of pending tasks */; 5555 u16_t pbf_ack_ram_addr /* PBF TX sequence ACK ram address */; 5556 #elif defined(__LITTLE_ENDIAN) 5557 u16_t pbf_ack_ram_addr /* PBF TX sequence ACK ram address */; 5558 u16_t num_pend_tasks /* Number of pending tasks */; 5559 #endif 5560 struct ustorm_fcoe_cache_ctx cache_ctx /* Cached context */; 5561 }; 5562 5563 /* 5564 * The FCoE non-aggregative context of Tstorm 5565 */ 5566 struct tstorm_fcoe_st_context 5567 { 5568 struct regpair_t reserved0; 5569 struct regpair_t reserved1; 5570 }; 5571 5572 /* 5573 * Ethernet context section 5574 */ 5575 struct xstorm_fcoe_eth_context_section 5576 { 5577 #if defined(__BIG_ENDIAN) 5578 u8_t remote_addr_4 /* Remote Mac Address, used in PBF Header Builder Command */; 5579 u8_t remote_addr_5 /* Remote Mac Address, used in PBF Header Builder Command */; 5580 u8_t local_addr_0 /* Local Mac Address, used in PBF Header Builder Command */; 5581 u8_t local_addr_1 /* Local Mac Address, used in PBF Header Builder Command */; 5582 #elif defined(__LITTLE_ENDIAN) 5583 u8_t local_addr_1 /* Local Mac Address, used in PBF Header Builder Command */; 5584 u8_t local_addr_0 /* Local Mac Address, used in PBF Header Builder Command */; 5585 u8_t remote_addr_5 /* Remote Mac Address, used in PBF Header Builder Command */; 5586 u8_t remote_addr_4 /* Remote Mac Address, used in PBF Header Builder Command */; 5587 #endif 5588 #if defined(__BIG_ENDIAN) 5589 u8_t remote_addr_0 /* Remote Mac Address, used in PBF Header Builder Command */; 5590 u8_t remote_addr_1 /* Remote Mac Address, used in PBF Header Builder Command */; 5591 u8_t remote_addr_2 /* Remote Mac Address, used in PBF Header Builder Command */; 5592 u8_t remote_addr_3 /* Remote Mac Address, used in PBF Header Builder Command */; 5593 #elif defined(__LITTLE_ENDIAN) 5594 u8_t remote_addr_3 /* Remote Mac Address, used in PBF Header Builder Command */; 5595 u8_t remote_addr_2 /* Remote Mac Address, used in PBF Header Builder Command */; 5596 u8_t remote_addr_1 /* Remote Mac Address, used in PBF Header Builder Command */; 5597 u8_t remote_addr_0 /* Remote Mac Address, used in PBF Header Builder Command */; 5598 #endif 5599 #if defined(__BIG_ENDIAN) 5600 u16_t reserved_vlan_type /* this field is not an absolute must, but the reseved was here */; 5601 u16_t params; 5602 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) /* BitField params part of PBF Header Builder Command */ 5603 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 5604 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) /* BitField params Canonical format indicator, part of PBF Header Builder Command */ 5605 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 5606 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) /* BitField params part of PBF Header Builder Command */ 5607 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 5608 #elif defined(__LITTLE_ENDIAN) 5609 u16_t params; 5610 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) /* BitField params part of PBF Header Builder Command */ 5611 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 5612 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) /* BitField params Canonical format indicator, part of PBF Header Builder Command */ 5613 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 5614 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) /* BitField params part of PBF Header Builder Command */ 5615 #define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 5616 u16_t reserved_vlan_type /* this field is not an absolute must, but the reseved was here */; 5617 #endif 5618 #if defined(__BIG_ENDIAN) 5619 u8_t local_addr_2 /* Local Mac Address, used in PBF Header Builder Command */; 5620 u8_t local_addr_3 /* Local Mac Address, used in PBF Header Builder Command */; 5621 u8_t local_addr_4 /* Loca lMac Address, used in PBF Header Builder Command */; 5622 u8_t local_addr_5 /* Local Mac Address, used in PBF Header Builder Command */; 5623 #elif defined(__LITTLE_ENDIAN) 5624 u8_t local_addr_5 /* Local Mac Address, used in PBF Header Builder Command */; 5625 u8_t local_addr_4 /* Loca lMac Address, used in PBF Header Builder Command */; 5626 u8_t local_addr_3 /* Local Mac Address, used in PBF Header Builder Command */; 5627 u8_t local_addr_2 /* Local Mac Address, used in PBF Header Builder Command */; 5628 #endif 5629 }; 5630 5631 /* 5632 * Flags used in FCoE context section - 1 byte 5633 */ 5634 struct xstorm_fcoe_context_flags 5635 { 5636 u8_t flags; 5637 #define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q (0x3<<0) /* BitField flags The current queue in process */ 5638 #define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q_SHIFT 0 5639 #define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ (0x1<<2) /* BitField flags Middle of Sequence indication */ 5640 #define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ_SHIFT 2 5641 #define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ (0x1<<3) /* BitField flags Indicates whether the SQ is blocked since we are in the middle of ABTS/Cleanup procedure */ 5642 #define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ_SHIFT 3 5643 #define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT (0x1<<4) /* BitField flags REC support */ 5644 #define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT_SHIFT 4 5645 #define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE (0x1<<5) /* BitField flags SQ toggle bit */ 5646 #define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE_SHIFT 5 5647 #define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE (0x1<<6) /* BitField flags XFRQ toggle bit */ 5648 #define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE_SHIFT 6 5649 #define XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN (0x1<<7) /* BitField flags Are we using VNTag inner vlan - in this case we have to read it on every VNTag version change */ 5650 #define XSTORM_FCOE_CONTEXT_FLAGS_B_VNTAG_VLAN_SHIFT 7 5651 }; 5652 5653 struct xstorm_fcoe_tce 5654 { 5655 struct fcoe_tce_tx_only txwr /* TX processing shall be the only one to read/write to this section */; 5656 struct fcoe_tce_tx_wr_rx_rd txwr_rxrd /* TX processing shall write and RX processing shall read from this section */; 5657 }; 5658 5659 /* 5660 * FCP_DATA parameters required for transmission 5661 */ 5662 struct xstorm_fcoe_fcp_data 5663 { 5664 u32_t io_rem /* IO remainder */; 5665 #if defined(__BIG_ENDIAN) 5666 u16_t cached_sge_off; 5667 u8_t cached_num_sges /* Number of SGEs on context */; 5668 u8_t cached_sge_idx /* 0xFF value indicated loading SGL */; 5669 #elif defined(__LITTLE_ENDIAN) 5670 u8_t cached_sge_idx /* 0xFF value indicated loading SGL */; 5671 u8_t cached_num_sges /* Number of SGEs on context */; 5672 u16_t cached_sge_off; 5673 #endif 5674 u32_t buf_addr_hi_0 /* Higher buffer host address */; 5675 u32_t buf_addr_lo_0 /* Lower buffer host address */; 5676 #if defined(__BIG_ENDIAN) 5677 u16_t num_of_pending_tasks /* Num of pending tasks */; 5678 u16_t buf_len_0 /* Buffer length (in bytes) */; 5679 #elif defined(__LITTLE_ENDIAN) 5680 u16_t buf_len_0 /* Buffer length (in bytes) */; 5681 u16_t num_of_pending_tasks /* Num of pending tasks */; 5682 #endif 5683 u32_t buf_addr_hi_1 /* Higher buffer host address */; 5684 u32_t buf_addr_lo_1 /* Lower buffer host address */; 5685 #if defined(__BIG_ENDIAN) 5686 u16_t task_pbe_idx_off /* Task pbe index offset */; 5687 u16_t buf_len_1 /* Buffer length (in bytes) */; 5688 #elif defined(__LITTLE_ENDIAN) 5689 u16_t buf_len_1 /* Buffer length (in bytes) */; 5690 u16_t task_pbe_idx_off /* Task pbe index offset */; 5691 #endif 5692 u32_t buf_addr_hi_2 /* Higher buffer host address */; 5693 u32_t buf_addr_lo_2 /* Lower buffer host address */; 5694 #if defined(__BIG_ENDIAN) 5695 u16_t ox_id /* OX_ID */; 5696 u16_t buf_len_2 /* Buffer length (in bytes) */; 5697 #elif defined(__LITTLE_ENDIAN) 5698 u16_t buf_len_2 /* Buffer length (in bytes) */; 5699 u16_t ox_id /* OX_ID */; 5700 #endif 5701 }; 5702 5703 /* 5704 * Continuation of Flags used in FCoE context section - 1 byte 5705 */ 5706 struct xstorm_fcoe_context_flags_cont 5707 { 5708 u8_t flags; 5709 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_B_CONFQ_TOGGLE (0x1<<0) /* BitField flags CONFQ toggle bit */ 5710 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_B_CONFQ_TOGGLE_SHIFT 0 5711 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_VLAN_FLAG (0x1<<1) /* BitField flags Is any inner vlan exist */ 5712 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_VLAN_FLAG_SHIFT 1 5713 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_RESERVED (0x3F<<2) /* BitField flags */ 5714 #define XSTORM_FCOE_CONTEXT_FLAGS_CONT_RESERVED_SHIFT 2 5715 }; 5716 5717 /* 5718 * vlan configuration 5719 */ 5720 struct xstorm_fcoe_vlan_conf 5721 { 5722 u8_t vlan_conf; 5723 #define XSTORM_FCOE_VLAN_CONF_PRIORITY (0x7<<0) /* BitField vlan_conf Original priority */ 5724 #define XSTORM_FCOE_VLAN_CONF_PRIORITY_SHIFT 0 5725 #define XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG (0x1<<3) /* BitField vlan_conf Original inner vlan flag */ 5726 #define XSTORM_FCOE_VLAN_CONF_INNER_VLAN_FLAG_SHIFT 3 5727 #define XSTORM_FCOE_VLAN_CONF_RESERVED (0xF<<4) /* BitField vlan_conf */ 5728 #define XSTORM_FCOE_VLAN_CONF_RESERVED_SHIFT 4 5729 }; 5730 5731 /* 5732 * FCoE 16-bits vlan structure 5733 */ 5734 struct fcoe_vlan_fields 5735 { 5736 u16_t fields; 5737 #define FCOE_VLAN_FIELDS_VID (0xFFF<<0) /* BitField fields */ 5738 #define FCOE_VLAN_FIELDS_VID_SHIFT 0 5739 #define FCOE_VLAN_FIELDS_CLI (0x1<<12) /* BitField fields */ 5740 #define FCOE_VLAN_FIELDS_CLI_SHIFT 12 5741 #define FCOE_VLAN_FIELDS_PRI (0x7<<13) /* BitField fields */ 5742 #define FCOE_VLAN_FIELDS_PRI_SHIFT 13 5743 }; 5744 5745 /* 5746 * FCoE 16-bits vlan union 5747 */ 5748 union fcoe_vlan_field_union 5749 { 5750 struct fcoe_vlan_fields fields /* Parameters field */; 5751 u16_t val /* Global value */; 5752 }; 5753 5754 /* 5755 * FCoE 16-bits vlan, vif union 5756 */ 5757 union fcoe_vlan_vif_field_union 5758 { 5759 union fcoe_vlan_field_union vlan /* Vlan */; 5760 u16_t vif /* VIF */; 5761 }; 5762 5763 /* 5764 * FCoE context section 5765 */ 5766 struct xstorm_fcoe_context_section 5767 { 5768 #if defined(__BIG_ENDIAN) 5769 u8_t cs_ctl /* cs ctl */; 5770 u8_t s_id[3] /* Source ID, received during FLOGI */; 5771 #elif defined(__LITTLE_ENDIAN) 5772 u8_t s_id[3] /* Source ID, received during FLOGI */; 5773 u8_t cs_ctl /* cs ctl */; 5774 #endif 5775 #if defined(__BIG_ENDIAN) 5776 u8_t rctl /* rctl */; 5777 u8_t d_id[3] /* Destination ID, received after inquiry of the fabric network */; 5778 #elif defined(__LITTLE_ENDIAN) 5779 u8_t d_id[3] /* Destination ID, received after inquiry of the fabric network */; 5780 u8_t rctl /* rctl */; 5781 #endif 5782 #if defined(__BIG_ENDIAN) 5783 u16_t sq_xfrq_lcq_confq_size /* SQ/XFRQ/LCQ/CONFQ size */; 5784 u16_t tx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by target, received during both FLOGI and PLOGI, minimum value should be taken */; 5785 #elif defined(__LITTLE_ENDIAN) 5786 u16_t tx_max_fc_pay_len /* The maximum acceptable FC payload size (Buffer-to-buffer Receive Data_Field size) supported by target, received during both FLOGI and PLOGI, minimum value should be taken */; 5787 u16_t sq_xfrq_lcq_confq_size /* SQ/XFRQ/LCQ/CONFQ size */; 5788 #endif 5789 u32_t lcq_prod /* LCQ producer value */; 5790 #if defined(__BIG_ENDIAN) 5791 u8_t port_id /* Port ID */; 5792 u8_t func_id /* Function ID */; 5793 u8_t seq_id /* SEQ ID counter to be used in transmitted FC header */; 5794 struct xstorm_fcoe_context_flags tx_flags; 5795 #elif defined(__LITTLE_ENDIAN) 5796 struct xstorm_fcoe_context_flags tx_flags; 5797 u8_t seq_id /* SEQ ID counter to be used in transmitted FC header */; 5798 u8_t func_id /* Function ID */; 5799 u8_t port_id /* Port ID */; 5800 #endif 5801 #if defined(__BIG_ENDIAN) 5802 u16_t mtu /* MTU */; 5803 u8_t func_mode /* Function mode */; 5804 u8_t vnic_id /* Vnic ID */; 5805 #elif defined(__LITTLE_ENDIAN) 5806 u8_t vnic_id /* Vnic ID */; 5807 u8_t func_mode /* Function mode */; 5808 u16_t mtu /* MTU */; 5809 #endif 5810 struct regpair_t confq_curr_page_addr /* The current page of CONFQ to be processed */; 5811 struct fcoe_cached_wqe cached_wqe[8] /* Up to 8 SQ/XFRQ WQEs read in one shot */; 5812 struct regpair_t lcq_base_addr /* The page address which the LCQ resides in host memory */; 5813 struct xstorm_fcoe_tce tce /* TX section task context */; 5814 struct xstorm_fcoe_fcp_data fcp_data /* The parameters required for FCP_DATA Sequences transmission */; 5815 #if defined(__BIG_ENDIAN) 5816 u8_t tx_max_conc_seqs_c3 /* Maximum concurrent Sequences for Class 3 supported by traget, received during PLOGI */; 5817 struct xstorm_fcoe_context_flags_cont tx_flags_cont; 5818 u8_t dcb_val /* DCB val - let us know if dcb info changes */; 5819 u8_t data_pb_cmd_size /* Data pb cmd size */; 5820 #elif defined(__LITTLE_ENDIAN) 5821 u8_t data_pb_cmd_size /* Data pb cmd size */; 5822 u8_t dcb_val /* DCB val - let us know if dcb info changes */; 5823 struct xstorm_fcoe_context_flags_cont tx_flags_cont; 5824 u8_t tx_max_conc_seqs_c3 /* Maximum concurrent Sequences for Class 3 supported by traget, received during PLOGI */; 5825 #endif 5826 #if defined(__BIG_ENDIAN) 5827 u16_t fcoe_tx_stat_params_ram_addr /* stat Ram Addr */; 5828 u16_t fcoe_tx_fc_seq_ram_addr /* Tx FC sequence Ram Addr */; 5829 #elif defined(__LITTLE_ENDIAN) 5830 u16_t fcoe_tx_fc_seq_ram_addr /* Tx FC sequence Ram Addr */; 5831 u16_t fcoe_tx_stat_params_ram_addr /* stat Ram Addr */; 5832 #endif 5833 #if defined(__BIG_ENDIAN) 5834 u8_t fcp_cmd_line_credit; 5835 u8_t eth_hdr_size /* Ethernet header size without eth type */; 5836 u16_t pbf_addr /* PBF addr */; 5837 #elif defined(__LITTLE_ENDIAN) 5838 u16_t pbf_addr /* PBF addr */; 5839 u8_t eth_hdr_size /* Ethernet header size without eth type */; 5840 u8_t fcp_cmd_line_credit; 5841 #endif 5842 #if defined(__BIG_ENDIAN) 5843 union fcoe_vlan_vif_field_union multi_func_val /* Outer vlan vif union */; 5844 u8_t page_log_size /* Page log size */; 5845 struct xstorm_fcoe_vlan_conf orig_vlan_conf /* original vlan configuration, used when we switch from dcb enable to dcb disabled */; 5846 #elif defined(__LITTLE_ENDIAN) 5847 struct xstorm_fcoe_vlan_conf orig_vlan_conf /* original vlan configuration, used when we switch from dcb enable to dcb disabled */; 5848 u8_t page_log_size /* Page log size */; 5849 union fcoe_vlan_vif_field_union multi_func_val /* Outer vlan vif union */; 5850 #endif 5851 #if defined(__BIG_ENDIAN) 5852 u16_t fcp_cmd_frame_size /* FCP_CMD frame size */; 5853 u16_t pbf_addr_ff /* PBF addr with ff */; 5854 #elif defined(__LITTLE_ENDIAN) 5855 u16_t pbf_addr_ff /* PBF addr with ff */; 5856 u16_t fcp_cmd_frame_size /* FCP_CMD frame size */; 5857 #endif 5858 #if defined(__BIG_ENDIAN) 5859 u8_t vlan_num /* Vlan number */; 5860 u8_t cos /* Cos */; 5861 u8_t cache_xfrq_cons /* Cache xferq consumer */; 5862 u8_t cache_sq_cons /* Cache sq consumer */; 5863 #elif defined(__LITTLE_ENDIAN) 5864 u8_t cache_sq_cons /* Cache sq consumer */; 5865 u8_t cache_xfrq_cons /* Cache xferq consumer */; 5866 u8_t cos /* Cos */; 5867 u8_t vlan_num /* Vlan number */; 5868 #endif 5869 u32_t verify_tx_seq /* Sequence number of last transmitted sequence in order to verify target did not send FCP_RSP before the actual transmission of PBF from the SGL */; 5870 }; 5871 5872 /* 5873 * Xstorm FCoE Storm Context 5874 */ 5875 struct xstorm_fcoe_st_context 5876 { 5877 struct xstorm_fcoe_eth_context_section eth; 5878 struct xstorm_fcoe_context_section fcoe; 5879 }; 5880 5881 /* 5882 * Fcoe connection context 5883 */ 5884 struct fcoe_context 5885 { 5886 struct ustorm_fcoe_st_context ustorm_st_context /* Ustorm storm context */; 5887 struct tstorm_fcoe_st_context tstorm_st_context /* Tstorm storm context */; 5888 struct xstorm_fcoe_ag_context xstorm_ag_context /* Xstorm aggregative context */; 5889 struct tstorm_fcoe_ag_context tstorm_ag_context /* Tstorm aggregative context */; 5890 struct ustorm_fcoe_ag_context ustorm_ag_context /* Ustorm aggregative context */; 5891 struct timers_block_context timers_context /* Timers block context */; 5892 struct xstorm_fcoe_st_context xstorm_st_context /* Xstorm storm context */; 5893 }; 5894 5895 5896 5897 5898 /* 5899 * FCoE init params passed by driver to FW in FCoE init ramrod $$KEEP_ENDIANNESS$$ 5900 */ 5901 struct fcoe_init_ramrod_params 5902 { 5903 struct fcoe_kwqe_init1 init_kwqe1; 5904 struct fcoe_kwqe_init2 init_kwqe2; 5905 struct fcoe_kwqe_init3 init_kwqe3; 5906 struct regpair_t eq_pbl_base /* Physical address of PBL */; 5907 u32_t eq_pbl_size /* PBL size */; 5908 u32_t reserved2; 5909 u16_t eq_prod /* EQ prdocuer */; 5910 u16_t sb_num /* Status block number */; 5911 u8_t sb_id /* Status block id (EQ consumer) */; 5912 u8_t reserved0; 5913 u16_t reserved1; 5914 }; 5915 5916 5917 /* 5918 * FCoE statistics params buffer passed by driver to FW in FCoE statistics ramrod $$KEEP_ENDIANNESS$$ 5919 */ 5920 struct fcoe_stat_ramrod_params 5921 { 5922 struct fcoe_kwqe_stat stat_kwqe; 5923 }; 5924 5925 5926 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 /* 5948 * CQ DB CQ producer and pending completion counter 5949 */ 5950 struct iscsi_cq_db_prod_pnd_cmpltn_cnt 5951 { 5952 #if defined(__BIG_ENDIAN) 5953 u16_t cntr /* CQ pending completion counter */; 5954 u16_t prod /* Ustorm CQ producer , updated by Ustorm */; 5955 #elif defined(__LITTLE_ENDIAN) 5956 u16_t prod /* Ustorm CQ producer , updated by Ustorm */; 5957 u16_t cntr /* CQ pending completion counter */; 5958 #endif 5959 }; 5960 5961 /* 5962 * CQ DB pending completion ITT array 5963 */ 5964 struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr 5965 { 5966 struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8] /* CQ pending completion ITT array */; 5967 }; 5968 5969 /* 5970 * CQ DB pending completion ITT array 5971 */ 5972 struct iscsi_cq_db_pnd_comp_itt_arr 5973 { 5974 u16_t itt[8] /* CQ pending completion ITT array */; 5975 }; 5976 5977 /* 5978 * Cstorm CQ sequence to notify array, updated by driver 5979 */ 5980 struct iscsi_cq_db_sqn_2_notify_arr 5981 { 5982 u16_t sqn[8] /* Cstorm CQ sequence to notify array, updated by driver */; 5983 }; 5984 5985 /* 5986 * CQ DB 5987 */ 5988 struct iscsi_cq_db 5989 { 5990 struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_u_prod_pend_comp_ctr_arr /* Ustorm CQ producer and pending completion counter array, updated by Ustorm */; 5991 struct iscsi_cq_db_pnd_comp_itt_arr cq_c_pend_comp_itt_arr /* Cstorm CQ pending completion ITT array, updated by Cstorm */; 5992 struct iscsi_cq_db_sqn_2_notify_arr cq_drv_sqn_2_notify_arr /* Cstorm CQ sequence to notify array, updated by driver */; 5993 u32_t reserved[4] /* 16 byte allignment */; 5994 }; 5995 5996 5997 5998 5999 6000 6001 /* 6002 * iSCSI KCQ CQE parameters 6003 */ 6004 union iscsi_kcqe_params 6005 { 6006 u32_t reserved0[4]; 6007 }; 6008 6009 /* 6010 * iSCSI KCQ CQE 6011 */ 6012 struct iscsi_kcqe 6013 { 6014 u32_t iscsi_conn_id /* Drivers connection ID (only 16 bits are used) */; 6015 u32_t completion_status /* 0=command completed succesfuly, 1=command failed */; 6016 u32_t iscsi_conn_context_id /* Context ID of the iSCSI connection */; 6017 union iscsi_kcqe_params params /* command-specific parameters */; 6018 #if defined(__BIG_ENDIAN) 6019 u8_t flags; 6020 #define ISCSI_KCQE_RESERVED0 (0x7<<0) /* BitField flags */ 6021 #define ISCSI_KCQE_RESERVED0_SHIFT 0 6022 #define ISCSI_KCQE_RAMROD_COMPLETION (0x1<<3) /* BitField flags Everest only - indicates whether this KCQE is a ramrod completion */ 6023 #define ISCSI_KCQE_RAMROD_COMPLETION_SHIFT 3 6024 #define ISCSI_KCQE_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5,iSCSI) */ 6025 #define ISCSI_KCQE_LAYER_CODE_SHIFT 4 6026 #define ISCSI_KCQE_LINKED_WITH_NEXT (0x1<<7) /* BitField flags Indicates whether this KCQE is linked with the next KCQE */ 6027 #define ISCSI_KCQE_LINKED_WITH_NEXT_SHIFT 7 6028 u8_t op_code /* iSCSI KCQ opcode */; 6029 u16_t qe_self_seq /* Self identifying sequence number */; 6030 #elif defined(__LITTLE_ENDIAN) 6031 u16_t qe_self_seq /* Self identifying sequence number */; 6032 u8_t op_code /* iSCSI KCQ opcode */; 6033 u8_t flags; 6034 #define ISCSI_KCQE_RESERVED0 (0x7<<0) /* BitField flags */ 6035 #define ISCSI_KCQE_RESERVED0_SHIFT 0 6036 #define ISCSI_KCQE_RAMROD_COMPLETION (0x1<<3) /* BitField flags Everest only - indicates whether this KCQE is a ramrod completion */ 6037 #define ISCSI_KCQE_RAMROD_COMPLETION_SHIFT 3 6038 #define ISCSI_KCQE_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5,iSCSI) */ 6039 #define ISCSI_KCQE_LAYER_CODE_SHIFT 4 6040 #define ISCSI_KCQE_LINKED_WITH_NEXT (0x1<<7) /* BitField flags Indicates whether this KCQE is linked with the next KCQE */ 6041 #define ISCSI_KCQE_LINKED_WITH_NEXT_SHIFT 7 6042 #endif 6043 }; 6044 6045 6046 6047 /* 6048 * iSCSI KWQE header 6049 */ 6050 struct iscsi_kwqe_header 6051 { 6052 #if defined(__BIG_ENDIAN) 6053 u8_t flags; 6054 #define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) /* BitField flags */ 6055 #define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 6056 #define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5,iSCSI) */ 6057 #define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 6058 #define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) /* BitField flags */ 6059 #define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 6060 u8_t op_code /* iSCSI KWQE opcode */; 6061 #elif defined(__LITTLE_ENDIAN) 6062 u8_t op_code /* iSCSI KWQE opcode */; 6063 u8_t flags; 6064 #define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) /* BitField flags */ 6065 #define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 6066 #define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) /* BitField flags protocol layer (L2,L3,L4,L5,iSCSI) */ 6067 #define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 6068 #define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) /* BitField flags */ 6069 #define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 6070 #endif 6071 }; 6072 6073 /* 6074 * iSCSI firmware init request 1 6075 */ 6076 struct iscsi_kwqe_init1 6077 { 6078 #if defined(__BIG_ENDIAN) 6079 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6080 u8_t hsi_version /* HSI version number */; 6081 u8_t num_cqs /* Number of completion queues */; 6082 #elif defined(__LITTLE_ENDIAN) 6083 u8_t num_cqs /* Number of completion queues */; 6084 u8_t hsi_version /* HSI version number */; 6085 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6086 #endif 6087 u32_t dummy_buffer_addr_lo /* Lower 32-bit of dummy buffer - Teton only */; 6088 u32_t dummy_buffer_addr_hi /* Higher 32-bit of dummy buffer - Teton only */; 6089 #if defined(__BIG_ENDIAN) 6090 u16_t num_ccells_per_conn /* Number of ccells per connection */; 6091 u16_t num_tasks_per_conn /* Number of tasks per connection */; 6092 #elif defined(__LITTLE_ENDIAN) 6093 u16_t num_tasks_per_conn /* Number of tasks per connection */; 6094 u16_t num_ccells_per_conn /* Number of ccells per connection */; 6095 #endif 6096 #if defined(__BIG_ENDIAN) 6097 u16_t sq_wqes_per_page /* Number of work entries in a single page of SQ */; 6098 u16_t sq_num_wqes /* Number of entries in the Send Queue */; 6099 #elif defined(__LITTLE_ENDIAN) 6100 u16_t sq_num_wqes /* Number of entries in the Send Queue */; 6101 u16_t sq_wqes_per_page /* Number of work entries in a single page of SQ */; 6102 #endif 6103 #if defined(__BIG_ENDIAN) 6104 u8_t cq_log_wqes_per_page /* Log of number of work entries in a single page of CQ */; 6105 u8_t flags; 6106 #define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) /* BitField flags page size code */ 6107 #define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 6108 #define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) /* BitField flags if set, delayed ack is enabled */ 6109 #define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 6110 #define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) /* BitField flags if set, keep alive is enabled */ 6111 #define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 6112 #define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) /* BitField flags */ 6113 #define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 6114 u16_t cq_num_wqes /* Number of entries in the Completion Queue */; 6115 #elif defined(__LITTLE_ENDIAN) 6116 u16_t cq_num_wqes /* Number of entries in the Completion Queue */; 6117 u8_t flags; 6118 #define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) /* BitField flags page size code */ 6119 #define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 6120 #define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) /* BitField flags if set, delayed ack is enabled */ 6121 #define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 6122 #define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) /* BitField flags if set, keep alive is enabled */ 6123 #define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 6124 #define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) /* BitField flags */ 6125 #define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 6126 u8_t cq_log_wqes_per_page /* Log of number of work entries in a single page of CQ */; 6127 #endif 6128 #if defined(__BIG_ENDIAN) 6129 u16_t cq_num_pages /* Number of pages in CQ page table */; 6130 u16_t sq_num_pages /* Number of pages in SQ page table */; 6131 #elif defined(__LITTLE_ENDIAN) 6132 u16_t sq_num_pages /* Number of pages in SQ page table */; 6133 u16_t cq_num_pages /* Number of pages in CQ page table */; 6134 #endif 6135 #if defined(__BIG_ENDIAN) 6136 u16_t rq_buffer_size /* Size of a single buffer (entry) in the RQ */; 6137 u16_t rq_num_wqes /* Number of entries in the Receive Queue */; 6138 #elif defined(__LITTLE_ENDIAN) 6139 u16_t rq_num_wqes /* Number of entries in the Receive Queue */; 6140 u16_t rq_buffer_size /* Size of a single buffer (entry) in the RQ */; 6141 #endif 6142 }; 6143 6144 /* 6145 * iSCSI firmware init request 2 6146 */ 6147 struct iscsi_kwqe_init2 6148 { 6149 #if defined(__BIG_ENDIAN) 6150 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6151 u16_t max_cq_sqn /* CQ wraparound value */; 6152 #elif defined(__LITTLE_ENDIAN) 6153 u16_t max_cq_sqn /* CQ wraparound value */; 6154 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6155 #endif 6156 u32_t error_bit_map[2] /* bit per error type, 0=error, 1=warning */; 6157 u32_t tcp_keepalive /* TCP keepalive time in seconds */; 6158 u32_t reserved1[4]; 6159 }; 6160 6161 /* 6162 * Initial iSCSI connection offload request 1 6163 */ 6164 struct iscsi_kwqe_conn_offload1 6165 { 6166 #if defined(__BIG_ENDIAN) 6167 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6168 u16_t iscsi_conn_id /* Drivers connection ID. Should be sent in KCQEs to speed-up drivers access to connection data. */; 6169 #elif defined(__LITTLE_ENDIAN) 6170 u16_t iscsi_conn_id /* Drivers connection ID. Should be sent in KCQEs to speed-up drivers access to connection data. */; 6171 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6172 #endif 6173 u32_t sq_page_table_addr_lo /* Lower 32-bit of the SQs page table address */; 6174 u32_t sq_page_table_addr_hi /* Higher 32-bit of the SQs page table address */; 6175 u32_t cq_page_table_addr_lo /* Lower 32-bit of the CQs page table address */; 6176 u32_t cq_page_table_addr_hi /* Higher 32-bit of the CQs page table address */; 6177 u32_t reserved0[3]; 6178 }; 6179 6180 /* 6181 * iSCSI Page Table Entry (PTE) 6182 */ 6183 struct iscsi_pte 6184 { 6185 u32_t hi /* Higher 32 bits of address */; 6186 u32_t lo /* Lower 32 bits of address */; 6187 }; 6188 6189 /* 6190 * Initial iSCSI connection offload request 2 6191 */ 6192 struct iscsi_kwqe_conn_offload2 6193 { 6194 #if defined(__BIG_ENDIAN) 6195 struct iscsi_kwqe_header hdr /* KWQE header */; 6196 u16_t reserved0; 6197 #elif defined(__LITTLE_ENDIAN) 6198 u16_t reserved0; 6199 struct iscsi_kwqe_header hdr /* KWQE header */; 6200 #endif 6201 u32_t rq_page_table_addr_lo /* Lower 32-bits of the RQs page table address */; 6202 u32_t rq_page_table_addr_hi /* Higher 32-bits of the RQs page table address */; 6203 struct iscsi_pte sq_first_pte /* first SQ page table entry (for FW caching) */; 6204 struct iscsi_pte cq_first_pte /* first CQ page table entry (for FW caching) */; 6205 u32_t num_additional_wqes /* Everest specific - number of offload3 KWQEs that will follow this KWQE */; 6206 }; 6207 6208 /* 6209 * Everest specific - Initial iSCSI connection offload request 3 6210 */ 6211 struct iscsi_kwqe_conn_offload3 6212 { 6213 #if defined(__BIG_ENDIAN) 6214 struct iscsi_kwqe_header hdr /* KWQE header */; 6215 u16_t reserved0; 6216 #elif defined(__LITTLE_ENDIAN) 6217 u16_t reserved0; 6218 struct iscsi_kwqe_header hdr /* KWQE header */; 6219 #endif 6220 u32_t reserved1; 6221 struct iscsi_pte qp_first_pte[3] /* first page table entry of some iSCSI ring (for FW caching) */; 6222 }; 6223 6224 /* 6225 * iSCSI connection update request 6226 */ 6227 struct iscsi_kwqe_conn_update 6228 { 6229 #if defined(__BIG_ENDIAN) 6230 struct iscsi_kwqe_header hdr /* KWQE header */; 6231 u16_t reserved0; 6232 #elif defined(__LITTLE_ENDIAN) 6233 u16_t reserved0; 6234 struct iscsi_kwqe_header hdr /* KWQE header */; 6235 #endif 6236 #if defined(__BIG_ENDIAN) 6237 u8_t session_error_recovery_level /* iSCSI Error Recovery Level negotiated on this connection */; 6238 u8_t max_outstanding_r2ts /* Maximum number of outstanding R2ts that a target can send for a command */; 6239 u8_t reserved2; 6240 u8_t conn_flags; 6241 #define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) /* BitField conn_flags 0=off, 1=on */ 6242 #define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 6243 #define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) /* BitField conn_flags 0=off, 1=on */ 6244 #define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 6245 #define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) /* BitField conn_flags 0=no, 1=yes */ 6246 #define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 6247 #define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) /* BitField conn_flags 0=no, 1=yes */ 6248 #define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 6249 #define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE (0x3<<4) /* BitField conn_flags (use enum tcp_tstorm_ooo) */ 6250 #define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT 4 6251 #define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0x3<<6) /* BitField conn_flags */ 6252 #define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 6 6253 #elif defined(__LITTLE_ENDIAN) 6254 u8_t conn_flags; 6255 #define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) /* BitField conn_flags 0=off, 1=on */ 6256 #define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 6257 #define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) /* BitField conn_flags 0=off, 1=on */ 6258 #define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 6259 #define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) /* BitField conn_flags 0=no, 1=yes */ 6260 #define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 6261 #define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) /* BitField conn_flags 0=no, 1=yes */ 6262 #define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 6263 #define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE (0x3<<4) /* BitField conn_flags (use enum tcp_tstorm_ooo) */ 6264 #define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT 4 6265 #define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0x3<<6) /* BitField conn_flags */ 6266 #define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 6 6267 u8_t reserved2; 6268 u8_t max_outstanding_r2ts /* Maximum number of outstanding R2ts that a target can send for a command */; 6269 u8_t session_error_recovery_level /* iSCSI Error Recovery Level negotiated on this connection */; 6270 #endif 6271 u32_t context_id /* Context ID of the iSCSI connection */; 6272 u32_t max_send_pdu_length /* Maximum length of a PDU that the target can receive */; 6273 u32_t max_recv_pdu_length /* Maximum length of a PDU that the Initiator can receive */; 6274 u32_t first_burst_length /* Maximum length of the immediate and unsolicited data that Initiator can send */; 6275 u32_t max_burst_length /* Maximum length of the data that Initiator and target can send in one burst */; 6276 u32_t exp_stat_sn /* Expected Status Serial Number */; 6277 }; 6278 6279 /* 6280 * iSCSI destroy connection request 6281 */ 6282 struct iscsi_kwqe_conn_destroy 6283 { 6284 #if defined(__BIG_ENDIAN) 6285 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6286 u16_t iscsi_conn_id /* Drivers connection ID. Should be sent in KCQEs to speed-up drivers access to connection data. */; 6287 #elif defined(__LITTLE_ENDIAN) 6288 u16_t iscsi_conn_id /* Drivers connection ID. Should be sent in KCQEs to speed-up drivers access to connection data. */; 6289 struct iscsi_kwqe_header hdr /* KWQ WQE header */; 6290 #endif 6291 u32_t context_id /* Context ID of the iSCSI connection */; 6292 u32_t reserved1[6]; 6293 }; 6294 6295 /* 6296 * iSCSI KWQ WQE 6297 */ 6298 union iscsi_kwqe 6299 { 6300 struct iscsi_kwqe_init1 init1; 6301 struct iscsi_kwqe_init2 init2; 6302 struct iscsi_kwqe_conn_offload1 conn_offload1; 6303 struct iscsi_kwqe_conn_offload2 conn_offload2; 6304 struct iscsi_kwqe_conn_offload3 conn_offload3; 6305 struct iscsi_kwqe_conn_update conn_update; 6306 struct iscsi_kwqe_conn_destroy conn_destroy; 6307 }; 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 struct iscsi_rq_db 6320 { 6321 #if defined(__BIG_ENDIAN) 6322 u16_t reserved1; 6323 u16_t rq_prod; 6324 #elif defined(__LITTLE_ENDIAN) 6325 u16_t rq_prod; 6326 u16_t reserved1; 6327 #endif 6328 u32_t __fw_hdr[15] /* Used by FW for partial header placement */; 6329 }; 6330 6331 6332 struct iscsi_sq_db 6333 { 6334 #if defined(__BIG_ENDIAN) 6335 u16_t reserved0 /* Pad structure size to 16 bytes */; 6336 u16_t sq_prod; 6337 #elif defined(__LITTLE_ENDIAN) 6338 u16_t sq_prod; 6339 u16_t reserved0 /* Pad structure size to 16 bytes */; 6340 #endif 6341 u32_t reserved1[3] /* Pad structure size to 16 bytes */; 6342 }; 6343 6344 6345 /* 6346 * Tstorm Tcp flags 6347 */ 6348 struct tstorm_l5cm_tcp_flags 6349 { 6350 u16_t flags; 6351 #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID (0xFFF<<0) /* BitField flags */ 6352 #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID_SHIFT 0 6353 #define TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN (0x1<<12) /* BitField flags */ 6354 #define TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN_SHIFT 12 6355 #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<13) /* BitField flags */ 6356 #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 13 6357 #define TSTORM_L5CM_TCP_FLAGS_RSRV1 (0x3<<14) /* BitField flags */ 6358 #define TSTORM_L5CM_TCP_FLAGS_RSRV1_SHIFT 14 6359 }; 6360 6361 6362 /* 6363 * Cstorm iSCSI Storm Context 6364 */ 6365 struct cstorm_iscsi_st_context 6366 { 6367 struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr /* Cstorm CQ producer and CQ pending completion array, updated by Cstorm */; 6368 struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr /* Cstorm CQ producer sequence, updated by Cstorm */; 6369 struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr /* Event Coalescing CQ sequence to notify driver, copied by Cstorm from CQ DB that is updated by Driver */; 6370 struct regpair_t hq_pbl_base /* HQ PBL base */; 6371 struct regpair_t hq_curr_pbe /* HQ current PBE */; 6372 struct regpair_t task_pbl_base /* Task Context Entry PBL base */; 6373 struct regpair_t cq_db_base /* pointer to CQ DB array. each CQ DB entry consists of CQ PBL, arm bit and idx to notify */; 6374 #if defined(__BIG_ENDIAN) 6375 u16_t hq_bd_itt /* copied from HQ BD */; 6376 u16_t iscsi_conn_id; 6377 #elif defined(__LITTLE_ENDIAN) 6378 u16_t iscsi_conn_id; 6379 u16_t hq_bd_itt /* copied from HQ BD */; 6380 #endif 6381 u32_t hq_bd_data_segment_len /* copied from HQ BD */; 6382 u32_t hq_bd_buffer_offset /* copied from HQ BD */; 6383 #if defined(__BIG_ENDIAN) 6384 u8_t rsrv; 6385 u8_t cq_proc_en_bit_map /* CQ processing enable bit map, 1 bit per CQ */; 6386 u8_t cq_pend_comp_itt_valid_bit_map /* CQ pending completion ITT valid bit map, 1 bit per CQ */; 6387 u8_t hq_bd_opcode /* copied from HQ BD */; 6388 #elif defined(__LITTLE_ENDIAN) 6389 u8_t hq_bd_opcode /* copied from HQ BD */; 6390 u8_t cq_pend_comp_itt_valid_bit_map /* CQ pending completion ITT valid bit map, 1 bit per CQ */; 6391 u8_t cq_proc_en_bit_map /* CQ processing enable bit map, 1 bit per CQ */; 6392 u8_t rsrv; 6393 #endif 6394 u32_t hq_tcp_seq /* TCP sequence of next BD to release */; 6395 #if defined(__BIG_ENDIAN) 6396 u16_t flags; 6397 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) /* BitField flags */ 6398 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 6399 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) /* BitField flags */ 6400 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 6401 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) /* BitField flags copied from HQ BD */ 6402 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 6403 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) /* BitField flags copied from HQ BD */ 6404 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 6405 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) /* BitField flags calculated using HQ BD opcode and write flag */ 6406 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 6407 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) /* BitField flags */ 6408 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 6409 u16_t hq_cons /* HQ consumer */; 6410 #elif defined(__LITTLE_ENDIAN) 6411 u16_t hq_cons /* HQ consumer */; 6412 u16_t flags; 6413 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) /* BitField flags */ 6414 #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 6415 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) /* BitField flags */ 6416 #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 6417 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) /* BitField flags copied from HQ BD */ 6418 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 6419 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) /* BitField flags copied from HQ BD */ 6420 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 6421 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) /* BitField flags calculated using HQ BD opcode and write flag */ 6422 #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 6423 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) /* BitField flags */ 6424 #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 6425 #endif 6426 struct regpair_t rsrv1; 6427 }; 6428 6429 6430 /* 6431 * SCSI read/write SQ WQE 6432 */ 6433 struct iscsi_cmd_pdu_hdr_little_endian 6434 { 6435 #if defined(__BIG_ENDIAN) 6436 u8_t opcode; 6437 u8_t op_attr; 6438 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0) /* BitField op_attr Attributes of the SCSI command. To be sent with the outgoing command PDU. */ 6439 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 0 6440 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3) /* BitField op_attr */ 6441 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 3 6442 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5) /* BitField op_attr Write bit. Initiator is expected to send the data to the target */ 6443 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 5 6444 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6) /* BitField op_attr Read bit. Data from target is expected */ 6445 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 6 6446 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) /* BitField op_attr Final bit. Firmware can change this bit based on the command before putting it into the outgoing PDU. */ 6447 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 6448 u16_t rsrv0; 6449 #elif defined(__LITTLE_ENDIAN) 6450 u16_t rsrv0; 6451 u8_t op_attr; 6452 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0) /* BitField op_attr Attributes of the SCSI command. To be sent with the outgoing command PDU. */ 6453 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 0 6454 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3) /* BitField op_attr */ 6455 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 3 6456 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5) /* BitField op_attr Write bit. Initiator is expected to send the data to the target */ 6457 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 5 6458 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6) /* BitField op_attr Read bit. Data from target is expected */ 6459 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 6 6460 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) /* BitField op_attr Final bit. Firmware can change this bit based on the command before putting it into the outgoing PDU. */ 6461 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 6462 u8_t opcode; 6463 #endif 6464 u32_t data_fields; 6465 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 6466 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 6467 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 6468 #define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 6469 struct regpair_t lun; 6470 u32_t itt; 6471 u32_t expected_data_transfer_length; 6472 u32_t cmd_sn; 6473 u32_t exp_stat_sn; 6474 u32_t scsi_command_block[4]; 6475 }; 6476 6477 6478 /* 6479 * Buffer per connection, used in Tstorm 6480 */ 6481 struct iscsi_conn_buf 6482 { 6483 struct regpair_t reserved[8]; 6484 }; 6485 6486 6487 /* 6488 * iSCSI context region, used only in iSCSI 6489 */ 6490 struct ustorm_iscsi_rq_db 6491 { 6492 struct regpair_t pbl_base /* Pointer to the rq page base list. */; 6493 struct regpair_t curr_pbe /* Pointer to the current rq page base. */; 6494 }; 6495 6496 /* 6497 * iSCSI context region, used only in iSCSI 6498 */ 6499 struct ustorm_iscsi_r2tq_db 6500 { 6501 struct regpair_t pbl_base /* Pointer to the r2tq page base list. */; 6502 struct regpair_t curr_pbe /* Pointer to the current r2tq page base. */; 6503 }; 6504 6505 /* 6506 * iSCSI context region, used only in iSCSI 6507 */ 6508 struct ustorm_iscsi_cq_db 6509 { 6510 #if defined(__BIG_ENDIAN) 6511 u16_t cq_sn /* CQ serial number */; 6512 u16_t prod /* CQ producer */; 6513 #elif defined(__LITTLE_ENDIAN) 6514 u16_t prod /* CQ producer */; 6515 u16_t cq_sn /* CQ serial number */; 6516 #endif 6517 struct regpair_t curr_pbe /* Pointer to the current cq page base. */; 6518 }; 6519 6520 /* 6521 * iSCSI context region, used only in iSCSI 6522 */ 6523 struct rings_db 6524 { 6525 struct ustorm_iscsi_rq_db rq /* RQ db. */; 6526 struct ustorm_iscsi_r2tq_db r2tq /* R2TQ db. */; 6527 struct ustorm_iscsi_cq_db cq[8] /* CQ db. */; 6528 #if defined(__BIG_ENDIAN) 6529 u16_t rq_prod /* RQ prod */; 6530 u16_t r2tq_prod /* R2TQ producer. */; 6531 #elif defined(__LITTLE_ENDIAN) 6532 u16_t r2tq_prod /* R2TQ producer. */; 6533 u16_t rq_prod /* RQ prod */; 6534 #endif 6535 struct regpair_t cq_pbl_base /* Pointer to the cq page base list. */; 6536 }; 6537 6538 /* 6539 * iSCSI context region, used only in iSCSI 6540 */ 6541 struct ustorm_iscsi_placement_db 6542 { 6543 u32_t sgl_base_lo /* SGL base address lo */; 6544 u32_t sgl_base_hi /* SGL base address hi */; 6545 u32_t local_sge_0_address_hi /* SGE address hi */; 6546 u32_t local_sge_0_address_lo /* SGE address lo */; 6547 #if defined(__BIG_ENDIAN) 6548 u16_t curr_sge_offset /* Current offset in the SGE */; 6549 u16_t local_sge_0_size /* SGE size */; 6550 #elif defined(__LITTLE_ENDIAN) 6551 u16_t local_sge_0_size /* SGE size */; 6552 u16_t curr_sge_offset /* Current offset in the SGE */; 6553 #endif 6554 u32_t local_sge_1_address_hi /* SGE address hi */; 6555 u32_t local_sge_1_address_lo /* SGE address lo */; 6556 #if defined(__BIG_ENDIAN) 6557 u8_t exp_padding_2b /* Number of padding bytes not yet processed */; 6558 u8_t nal_len_3b /* Non 4 byte aligned bytes in the previous iteration */; 6559 u16_t local_sge_1_size /* SGE size */; 6560 #elif defined(__LITTLE_ENDIAN) 6561 u16_t local_sge_1_size /* SGE size */; 6562 u8_t nal_len_3b /* Non 4 byte aligned bytes in the previous iteration */; 6563 u8_t exp_padding_2b /* Number of padding bytes not yet processed */; 6564 #endif 6565 #if defined(__BIG_ENDIAN) 6566 u8_t sgl_size /* Number of SGEs remaining till end of SGL */; 6567 u8_t local_sge_index_2b /* Index to the local SGE currently used */; 6568 u16_t reserved7; 6569 #elif defined(__LITTLE_ENDIAN) 6570 u16_t reserved7; 6571 u8_t local_sge_index_2b /* Index to the local SGE currently used */; 6572 u8_t sgl_size /* Number of SGEs remaining till end of SGL */; 6573 #endif 6574 u32_t rem_pdu /* Number of bytes remaining in PDU */; 6575 u32_t place_db_bitfield_1; 6576 #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0) /* BitField place_db_bitfield_1place_db_bitfield_1 Number of bytes remaining in PDU payload */ 6577 #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 0 6578 #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24) /* BitField place_db_bitfield_1place_db_bitfield_1 Temp task context - determines the CQ index for CQE placement */ 6579 #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 24 6580 u32_t place_db_bitfield_2; 6581 #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0) /* BitField place_db_bitfield_2place_db_bitfield_2 Bytes to truncate from the payload. */ 6582 #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 0 6583 #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24) /* BitField place_db_bitfield_2place_db_bitfield_2 Sge index on host */ 6584 #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 24 6585 u32_t nal; 6586 #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0) /* BitField nalNon aligned db Number of bytes remaining in local SGEs */ 6587 #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 0 6588 #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0xFF<<24) /* BitField nalNon aligned db Number of digest bytes not yet processed */ 6589 #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 24 6590 }; 6591 6592 /* 6593 * Ustorm iSCSI Storm Context 6594 */ 6595 struct ustorm_iscsi_st_context 6596 { 6597 u32_t exp_stat_sn /* Expected status sequence number, incremented with each response/middle path/unsolicited received. */; 6598 u32_t exp_data_sn /* Expected Data sequence number, incremented with each data in */; 6599 struct rings_db ring /* rq, r2tq ,cq */; 6600 struct regpair_t task_pbl_base /* Task PBL base will be read from RAM to context */; 6601 struct regpair_t tce_phy_addr /* Pointer to the task context physical address */; 6602 struct ustorm_iscsi_placement_db place_db; 6603 u32_t reserved8 /* reserved */; 6604 u32_t rem_rcv_len /* Temp task context - Remaining bytes to end of task */; 6605 #if defined(__BIG_ENDIAN) 6606 u16_t hdr_itt /* field copied from PDU header */; 6607 u16_t iscsi_conn_id; 6608 #elif defined(__LITTLE_ENDIAN) 6609 u16_t iscsi_conn_id; 6610 u16_t hdr_itt /* field copied from PDU header */; 6611 #endif 6612 u32_t nal_bytes /* nal bytes read from BRB */; 6613 #if defined(__BIG_ENDIAN) 6614 u8_t hdr_second_byte_union /* field copied from PDU header */; 6615 u8_t bitfield_0; 6616 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) /* BitField bitfield_0bitfield_0 marks that processing of payload has started */ 6617 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 6618 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) /* BitField bitfield_0bitfield_0 marks that fence is need on the next CQE */ 6619 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 6620 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) /* BitField bitfield_0bitfield_0 marks that a RESET should be sent to CRC machine. Used in NAL condition in the beginning of a PDU. */ 6621 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 6622 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) /* BitField bitfield_0bitfield_0 reserved */ 6623 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 6624 u8_t task_pdu_cache_index; 6625 u8_t task_pbe_cache_index; 6626 #elif defined(__LITTLE_ENDIAN) 6627 u8_t task_pbe_cache_index; 6628 u8_t task_pdu_cache_index; 6629 u8_t bitfield_0; 6630 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) /* BitField bitfield_0bitfield_0 marks that processing of payload has started */ 6631 #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 6632 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) /* BitField bitfield_0bitfield_0 marks that fence is need on the next CQE */ 6633 #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 6634 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) /* BitField bitfield_0bitfield_0 marks that a RESET should be sent to CRC machine. Used in NAL condition in the beginning of a PDU. */ 6635 #define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 6636 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) /* BitField bitfield_0bitfield_0 reserved */ 6637 #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 6638 u8_t hdr_second_byte_union /* field copied from PDU header */; 6639 #endif 6640 #if defined(__BIG_ENDIAN) 6641 u16_t reserved3 /* reserved */; 6642 u8_t reserved2 /* reserved */; 6643 u8_t acDecrement /* Manage the AC decrement that should be done by USDM */; 6644 #elif defined(__LITTLE_ENDIAN) 6645 u8_t acDecrement /* Manage the AC decrement that should be done by USDM */; 6646 u8_t reserved2 /* reserved */; 6647 u16_t reserved3 /* reserved */; 6648 #endif 6649 u32_t task_stat /* counts dataIn for read and holds data outs, r2t for write */; 6650 #if defined(__BIG_ENDIAN) 6651 u8_t hdr_opcode /* field copied from PDU header */; 6652 u8_t num_cqs /* Number of CQs supported by this connection */; 6653 u16_t reserved5 /* reserved */; 6654 #elif defined(__LITTLE_ENDIAN) 6655 u16_t reserved5 /* reserved */; 6656 u8_t num_cqs /* Number of CQs supported by this connection */; 6657 u8_t hdr_opcode /* field copied from PDU header */; 6658 #endif 6659 u32_t negotiated_rx; 6660 #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0) /* BitField negotiated_rx */ 6661 #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 0 6662 #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24) /* BitField negotiated_rx */ 6663 #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 24 6664 u32_t negotiated_rx_and_flags; 6665 #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0) /* BitField negotiated_rx_and_flags Negotiated maximum length of sequence */ 6666 #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 0 6667 #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24) /* BitField negotiated_rx_and_flags Marks that unvalid CQE was already posted or PDU header was cachaed in RAM */ 6668 #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 24 6669 #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25) /* BitField negotiated_rx_and_flags Header digest support enable */ 6670 #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 25 6671 #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26) /* BitField negotiated_rx_and_flags Data digest support enable */ 6672 #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 26 6673 #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27) /* BitField negotiated_rx_and_flags */ 6674 #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 27 6675 #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28) /* BitField negotiated_rx_and_flags temp task context */ 6676 #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 28 6677 #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29) /* BitField negotiated_rx_and_flags Task type: 0 = slow-path (non-RW) 1 = read 2 = write */ 6678 #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 29 6679 #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31) /* BitField negotiated_rx_and_flags Set if all data is acked */ 6680 #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 31 6681 }; 6682 6683 /* 6684 * TCP context region, shared in TOE, RDMA and ISCSI 6685 */ 6686 struct tstorm_tcp_st_context_section 6687 { 6688 u32_t flags1; 6689 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT (0xFFFFFF<<0) /* BitField flags1various state flags 20b only, Smoothed Rount Trip Time */ 6690 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_SHIFT 0 6691 #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24) /* BitField flags1various state flags PAWS asserted as invalid in KA flow */ 6692 #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 24 6693 #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25) /* BitField flags1various state flags Timestamps supported on this connection */ 6694 #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 25 6695 #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0 (0x1<<26) /* BitField flags1various state flags */ 6696 #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0_SHIFT 26 6697 #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27) /* BitField flags1various state flags stop receiving rx payload */ 6698 #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 27 6699 #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28) /* BitField flags1various state flags Keep Alive enabled */ 6700 #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 28 6701 #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29) /* BitField flags1various state flags First Retransmition Timout Estimation */ 6702 #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 29 6703 #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30) /* BitField flags1various state flags per connection flag, signals whether to check if rt count exceeds max_seg_retransmit */ 6704 #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 30 6705 #define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN (0x1<<31) /* BitField flags1various state flags last isle ends with FIN. FIN is counted as 1 byte for isle end sequence */ 6706 #define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN_SHIFT 31 6707 u32_t flags2; 6708 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION (0xFFFFFF<<0) /* BitField flags2various state flags 20b only, Round Trip Time variation */ 6709 #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_SHIFT 0 6710 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24) /* BitField flags2various state flags */ 6711 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 24 6712 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25) /* BitField flags2various state flags per GOS flags, but duplicated for each context */ 6713 #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 25 6714 #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26) /* BitField flags2various state flags keep alive packet was sent */ 6715 #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 26 6716 #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27) /* BitField flags2various state flags persist packet was sent */ 6717 #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 27 6718 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28) /* BitField flags2various state flags determines wheather or not to update l2 statistics */ 6719 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 28 6720 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29) /* BitField flags2various state flags determines wheather or not to update l4 statistics */ 6721 #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 29 6722 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK (0x1<<30) /* BitField flags2various state flags possible blind-in-window RST attack detected */ 6723 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK_SHIFT 30 6724 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK (0x1<<31) /* BitField flags2various state flags possible blind-in-window SYN attack detected */ 6725 #define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK_SHIFT 31 6726 #if defined(__BIG_ENDIAN) 6727 u16_t mss; 6728 u8_t tcp_sm_state /* 3b only, Tcp state machine state */; 6729 u8_t rto_exp /* 3b only, Exponential Backoff index */; 6730 #elif defined(__LITTLE_ENDIAN) 6731 u8_t rto_exp /* 3b only, Exponential Backoff index */; 6732 u8_t tcp_sm_state /* 3b only, Tcp state machine state */; 6733 u16_t mss; 6734 #endif 6735 u32_t rcv_nxt /* Receive sequence: next expected */; 6736 u32_t timestamp_recent /* last timestamp from segTS */; 6737 u32_t timestamp_recent_time /* time at which timestamp_recent has been set */; 6738 u32_t cwnd /* Congestion window */; 6739 u32_t ss_thresh /* Slow Start Threshold */; 6740 u32_t cwnd_accum /* Congestion window accumilation */; 6741 u32_t prev_seg_seq /* Sequence number used for last sndWnd update (was: snd_wnd_l1) */; 6742 u32_t expected_rel_seq /* the last update of rel_seq */; 6743 u32_t recover /* Recording of sndMax when we enter retransmit */; 6744 #if defined(__BIG_ENDIAN) 6745 u8_t retransmit_count /* Number of times a packet was retransmitted */; 6746 u8_t ka_max_probe_count /* Keep Alive maximum probe counter */; 6747 u8_t persist_probe_count /* Persist probe counter */; 6748 u8_t ka_probe_count /* Keep Alive probe counter */; 6749 #elif defined(__LITTLE_ENDIAN) 6750 u8_t ka_probe_count /* Keep Alive probe counter */; 6751 u8_t persist_probe_count /* Persist probe counter */; 6752 u8_t ka_max_probe_count /* Keep Alive maximum probe counter */; 6753 u8_t retransmit_count /* Number of times a packet was retransmitted */; 6754 #endif 6755 #if defined(__BIG_ENDIAN) 6756 u8_t statistics_counter_id /* The ID of the statistics client for counting common/L2 statistics */; 6757 u8_t ooo_support_mode; 6758 u8_t snd_wnd_scale /* 4b only, Far-end window (Snd.Wind.Scale) scale */; 6759 u8_t dup_ack_count /* Duplicate Ack Counter */; 6760 #elif defined(__LITTLE_ENDIAN) 6761 u8_t dup_ack_count /* Duplicate Ack Counter */; 6762 u8_t snd_wnd_scale /* 4b only, Far-end window (Snd.Wind.Scale) scale */; 6763 u8_t ooo_support_mode; 6764 u8_t statistics_counter_id /* The ID of the statistics client for counting common/L2 statistics */; 6765 #endif 6766 u32_t retransmit_start_time /* Used by retransmit as a recording of start time */; 6767 u32_t ka_timeout /* Keep Alive timeout */; 6768 u32_t ka_interval /* Keep Alive interval */; 6769 u32_t isle_start_seq /* First Out-of-order isle start sequence */; 6770 u32_t isle_end_seq /* First Out-of-order isle end sequence */; 6771 #if defined(__BIG_ENDIAN) 6772 u16_t second_isle_address /* address of the second isle (if exists) in internal RAM */; 6773 u16_t recent_seg_wnd /* Last far end window received (not scaled!) */; 6774 #elif defined(__LITTLE_ENDIAN) 6775 u16_t recent_seg_wnd /* Last far end window received (not scaled!) */; 6776 u16_t second_isle_address /* address of the second isle (if exists) in internal RAM */; 6777 #endif 6778 #if defined(__BIG_ENDIAN) 6779 u8_t max_isles_ever_happened /* for statistics only - max number of isles ever happened on this connection */; 6780 u8_t isles_number /* number of isles */; 6781 u16_t last_isle_address /* address of the last isle (if exists) in internal RAM */; 6782 #elif defined(__LITTLE_ENDIAN) 6783 u16_t last_isle_address /* address of the last isle (if exists) in internal RAM */; 6784 u8_t isles_number /* number of isles */; 6785 u8_t max_isles_ever_happened /* for statistics only - max number of isles ever happened on this connection */; 6786 #endif 6787 u32_t max_rt_time; 6788 #if defined(__BIG_ENDIAN) 6789 u16_t lsb_mac_address /* TX source MAC LSB-16 */; 6790 u16_t vlan_id /* Connection-configured VLAN ID */; 6791 #elif defined(__LITTLE_ENDIAN) 6792 u16_t vlan_id /* Connection-configured VLAN ID */; 6793 u16_t lsb_mac_address /* TX source MAC LSB-16 */; 6794 #endif 6795 #if defined(__BIG_ENDIAN) 6796 u16_t msb_mac_address /* TX source MAC MSB-16 */; 6797 u16_t mid_mac_address /* TX source MAC MID-16 */; 6798 #elif defined(__LITTLE_ENDIAN) 6799 u16_t mid_mac_address /* TX source MAC MID-16 */; 6800 u16_t msb_mac_address /* TX source MAC MSB-16 */; 6801 #endif 6802 u32_t rightmost_received_seq /* The maximum sequence ever recieved - used for The New Patent */; 6803 }; 6804 6805 /* 6806 * Termination variables 6807 */ 6808 struct iscsi_term_vars 6809 { 6810 u8_t BitMap; 6811 #define ISCSI_TERM_VARS_TCP_STATE (0xF<<0) /* BitField BitMap tcp state for the termination process */ 6812 #define ISCSI_TERM_VARS_TCP_STATE_SHIFT 0 6813 #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4) /* BitField BitMap fin received sticky bit */ 6814 #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4 6815 #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5) /* BitField BitMap ack on fin received stick bit */ 6816 #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5 6817 #define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6) /* BitField BitMap termination on chip ( option2 ) */ 6818 #define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 6 6819 #define ISCSI_TERM_VARS_RSRV (0x1<<7) /* BitField BitMap */ 6820 #define ISCSI_TERM_VARS_RSRV_SHIFT 7 6821 }; 6822 6823 /* 6824 * iSCSI context region, used only in iSCSI 6825 */ 6826 struct tstorm_iscsi_st_context_section 6827 { 6828 u32_t nalPayload /* Non-aligned payload */; 6829 u32_t b2nh /* Number of bytes to next iSCSI header */; 6830 #if defined(__BIG_ENDIAN) 6831 u16_t rq_cons /* RQ consumer */; 6832 u8_t flags; 6833 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) /* BitField flags header digest enable, set at login stage */ 6834 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 6835 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) /* BitField flags data digest enable, set at login stage */ 6836 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 6837 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) /* BitField flags partial header flow indication */ 6838 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 6839 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) /* BitField flags */ 6840 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 6841 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) /* BitField flags */ 6842 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 6843 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5) /* BitField flags Non-aligned length */ 6844 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 5 6845 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7) /* BitField flags */ 6846 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 7 6847 u8_t hdr_bytes_2_fetch /* Number of bytes left to fetch to complete iSCSI header */; 6848 #elif defined(__LITTLE_ENDIAN) 6849 u8_t hdr_bytes_2_fetch /* Number of bytes left to fetch to complete iSCSI header */; 6850 u8_t flags; 6851 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) /* BitField flags header digest enable, set at login stage */ 6852 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 6853 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) /* BitField flags data digest enable, set at login stage */ 6854 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 6855 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) /* BitField flags partial header flow indication */ 6856 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 6857 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) /* BitField flags */ 6858 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 6859 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) /* BitField flags */ 6860 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 6861 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5) /* BitField flags Non-aligned length */ 6862 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 5 6863 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7) /* BitField flags */ 6864 #define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 7 6865 u16_t rq_cons /* RQ consumer */; 6866 #endif 6867 struct regpair_t rq_db_phy_addr; 6868 #if defined(__BIG_ENDIAN) 6869 struct iscsi_term_vars term_vars /* Termination variables */; 6870 u8_t rsrv1; 6871 u16_t iscsi_conn_id; 6872 #elif defined(__LITTLE_ENDIAN) 6873 u16_t iscsi_conn_id; 6874 u8_t rsrv1; 6875 struct iscsi_term_vars term_vars /* Termination variables */; 6876 #endif 6877 u32_t process_nxt /* next TCP sequence to be processed by the iSCSI layer. */; 6878 }; 6879 6880 /* 6881 * The iSCSI non-aggregative context of Tstorm 6882 */ 6883 struct tstorm_iscsi_st_context 6884 { 6885 struct tstorm_tcp_st_context_section tcp /* TCP context region, shared in TOE, RDMA and iSCSI */; 6886 struct tstorm_iscsi_st_context_section iscsi /* iSCSI context region, used only in iSCSI */; 6887 }; 6888 6889 /* 6890 * Ethernet context section, shared in TOE, RDMA and ISCSI 6891 */ 6892 struct xstorm_eth_context_section 6893 { 6894 #if defined(__BIG_ENDIAN) 6895 u8_t remote_addr_4 /* Remote Mac Address, used in PBF Header Builder Command */; 6896 u8_t remote_addr_5 /* Remote Mac Address, used in PBF Header Builder Command */; 6897 u8_t local_addr_0 /* Local Mac Address, used in PBF Header Builder Command */; 6898 u8_t local_addr_1 /* Local Mac Address, used in PBF Header Builder Command */; 6899 #elif defined(__LITTLE_ENDIAN) 6900 u8_t local_addr_1 /* Local Mac Address, used in PBF Header Builder Command */; 6901 u8_t local_addr_0 /* Local Mac Address, used in PBF Header Builder Command */; 6902 u8_t remote_addr_5 /* Remote Mac Address, used in PBF Header Builder Command */; 6903 u8_t remote_addr_4 /* Remote Mac Address, used in PBF Header Builder Command */; 6904 #endif 6905 #if defined(__BIG_ENDIAN) 6906 u8_t remote_addr_0 /* Remote Mac Address, used in PBF Header Builder Command */; 6907 u8_t remote_addr_1 /* Remote Mac Address, used in PBF Header Builder Command */; 6908 u8_t remote_addr_2 /* Remote Mac Address, used in PBF Header Builder Command */; 6909 u8_t remote_addr_3 /* Remote Mac Address, used in PBF Header Builder Command */; 6910 #elif defined(__LITTLE_ENDIAN) 6911 u8_t remote_addr_3 /* Remote Mac Address, used in PBF Header Builder Command */; 6912 u8_t remote_addr_2 /* Remote Mac Address, used in PBF Header Builder Command */; 6913 u8_t remote_addr_1 /* Remote Mac Address, used in PBF Header Builder Command */; 6914 u8_t remote_addr_0 /* Remote Mac Address, used in PBF Header Builder Command */; 6915 #endif 6916 #if defined(__BIG_ENDIAN) 6917 u16_t reserved_vlan_type /* this field is not an absolute must, but the reseved was here */; 6918 u16_t vlan_params; 6919 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) /* BitField vlan_params part of PBF Header Builder Command */ 6920 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 6921 #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12) /* BitField vlan_params Canonical format indicator, part of PBF Header Builder Command */ 6922 #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12 6923 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) /* BitField vlan_params part of PBF Header Builder Command */ 6924 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 6925 #elif defined(__LITTLE_ENDIAN) 6926 u16_t vlan_params; 6927 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) /* BitField vlan_params part of PBF Header Builder Command */ 6928 #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 6929 #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12) /* BitField vlan_params Canonical format indicator, part of PBF Header Builder Command */ 6930 #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12 6931 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) /* BitField vlan_params part of PBF Header Builder Command */ 6932 #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 6933 u16_t reserved_vlan_type /* this field is not an absolute must, but the reseved was here */; 6934 #endif 6935 #if defined(__BIG_ENDIAN) 6936 u8_t local_addr_2 /* Local Mac Address, used in PBF Header Builder Command */; 6937 u8_t local_addr_3 /* Local Mac Address, used in PBF Header Builder Command */; 6938 u8_t local_addr_4 /* Loca lMac Address, used in PBF Header Builder Command */; 6939 u8_t local_addr_5 /* Local Mac Address, used in PBF Header Builder Command */; 6940 #elif defined(__LITTLE_ENDIAN) 6941 u8_t local_addr_5 /* Local Mac Address, used in PBF Header Builder Command */; 6942 u8_t local_addr_4 /* Loca lMac Address, used in PBF Header Builder Command */; 6943 u8_t local_addr_3 /* Local Mac Address, used in PBF Header Builder Command */; 6944 u8_t local_addr_2 /* Local Mac Address, used in PBF Header Builder Command */; 6945 #endif 6946 }; 6947 6948 /* 6949 * IpV4 context section, shared in TOE, RDMA and ISCSI 6950 */ 6951 struct xstorm_ip_v4_context_section 6952 { 6953 #if defined(__BIG_ENDIAN) 6954 u16_t __pbf_hdr_cmd_rsvd_id; 6955 u16_t __pbf_hdr_cmd_rsvd_flags_offset; 6956 #elif defined(__LITTLE_ENDIAN) 6957 u16_t __pbf_hdr_cmd_rsvd_flags_offset; 6958 u16_t __pbf_hdr_cmd_rsvd_id; 6959 #endif 6960 #if defined(__BIG_ENDIAN) 6961 u8_t __pbf_hdr_cmd_rsvd_ver_ihl; 6962 u8_t tos /* Type Of Service, used in PBF Header Builder Command */; 6963 u16_t __pbf_hdr_cmd_rsvd_length; 6964 #elif defined(__LITTLE_ENDIAN) 6965 u16_t __pbf_hdr_cmd_rsvd_length; 6966 u8_t tos /* Type Of Service, used in PBF Header Builder Command */; 6967 u8_t __pbf_hdr_cmd_rsvd_ver_ihl; 6968 #endif 6969 u32_t ip_local_addr /* used in PBF Header Builder Command */; 6970 #if defined(__BIG_ENDIAN) 6971 u8_t ttl /* Time to live, used in PBF Header Builder Command */; 6972 u8_t __pbf_hdr_cmd_rsvd_protocol; 6973 u16_t __pbf_hdr_cmd_rsvd_csum; 6974 #elif defined(__LITTLE_ENDIAN) 6975 u16_t __pbf_hdr_cmd_rsvd_csum; 6976 u8_t __pbf_hdr_cmd_rsvd_protocol; 6977 u8_t ttl /* Time to live, used in PBF Header Builder Command */; 6978 #endif 6979 u32_t __pbf_hdr_cmd_rsvd_1 /* places the ip_remote_addr field in the proper place in the regpair */; 6980 u32_t ip_remote_addr /* used in PBF Header Builder Command */; 6981 }; 6982 6983 /* 6984 * context section, shared in TOE, RDMA and ISCSI 6985 */ 6986 struct xstorm_padded_ip_v4_context_section 6987 { 6988 struct xstorm_ip_v4_context_section ip_v4; 6989 u32_t reserved1[4]; 6990 }; 6991 6992 /* 6993 * IpV6 context section, shared in TOE, RDMA and ISCSI 6994 */ 6995 struct xstorm_ip_v6_context_section 6996 { 6997 #if defined(__BIG_ENDIAN) 6998 u16_t pbf_hdr_cmd_rsvd_payload_len; 6999 u8_t pbf_hdr_cmd_rsvd_nxt_hdr; 7000 u8_t hop_limit /* used in PBF Header Builder Command */; 7001 #elif defined(__LITTLE_ENDIAN) 7002 u8_t hop_limit /* used in PBF Header Builder Command */; 7003 u8_t pbf_hdr_cmd_rsvd_nxt_hdr; 7004 u16_t pbf_hdr_cmd_rsvd_payload_len; 7005 #endif 7006 u32_t priority_flow_label; 7007 #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL (0xFFFFF<<0) /* BitField priority_flow_label used in PBF Header Builder Command */ 7008 #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL_SHIFT 0 7009 #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS (0xFF<<20) /* BitField priority_flow_label used in PBF Header Builder Command */ 7010 #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS_SHIFT 20 7011 #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER (0xF<<28) /* BitField priority_flow_label */ 7012 #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER_SHIFT 28 7013 u32_t ip_local_addr_lo_hi /* second 32 bits of Ip local Address, used in PBF Header Builder Command */; 7014 u32_t ip_local_addr_lo_lo /* first 32 bits of Ip local Address, used in PBF Header Builder Command */; 7015 u32_t ip_local_addr_hi_hi /* fourth 32 bits of Ip local Address, used in PBF Header Builder Command */; 7016 u32_t ip_local_addr_hi_lo /* third 32 bits of Ip local Address, used in PBF Header Builder Command */; 7017 u32_t ip_remote_addr_lo_hi /* second 32 bits of Ip remoteinsation Address, used in PBF Header Builder Command */; 7018 u32_t ip_remote_addr_lo_lo /* first 32 bits of Ip remoteinsation Address, used in PBF Header Builder Command */; 7019 u32_t ip_remote_addr_hi_hi /* fourth 32 bits of Ip remoteinsation Address, used in PBF Header Builder Command */; 7020 u32_t ip_remote_addr_hi_lo /* third 32 bits of Ip remoteinsation Address, used in PBF Header Builder Command */; 7021 }; 7022 7023 union xstorm_ip_context_section_types 7024 { 7025 struct xstorm_padded_ip_v4_context_section padded_ip_v4; 7026 struct xstorm_ip_v6_context_section ip_v6; 7027 }; 7028 7029 /* 7030 * TCP context section, shared in TOE, RDMA and ISCSI 7031 */ 7032 struct xstorm_tcp_context_section 7033 { 7034 u32_t snd_max; 7035 #if defined(__BIG_ENDIAN) 7036 u16_t remote_port /* used in PBF Header Builder Command */; 7037 u16_t local_port /* used in PBF Header Builder Command */; 7038 #elif defined(__LITTLE_ENDIAN) 7039 u16_t local_port /* used in PBF Header Builder Command */; 7040 u16_t remote_port /* used in PBF Header Builder Command */; 7041 #endif 7042 #if defined(__BIG_ENDIAN) 7043 u8_t original_nagle_1b; 7044 u8_t ts_enabled /* Only 1 bit is used */; 7045 u16_t tcp_params; 7046 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0) /* BitField tcp_paramsTcp parameters for ease of pbf command construction */ 7047 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0 7048 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8) /* BitField tcp_paramsTcp parameters */ 7049 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8 7050 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9) /* BitField tcp_paramsTcp parameters */ 7051 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9 7052 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10) /* BitField tcp_paramsTcp parameters Selective Ack Enabled */ 7053 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10 7054 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11) /* BitField tcp_paramsTcp parameters window smaller than initial window was advertised to far end */ 7055 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 11 7056 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12) /* BitField tcp_paramsTcp parameters */ 7057 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12 7058 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13) /* BitField tcp_paramsTcp parameters */ 7059 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13 7060 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14) /* BitField tcp_paramsTcp parameters */ 7061 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14 7062 #elif defined(__LITTLE_ENDIAN) 7063 u16_t tcp_params; 7064 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0) /* BitField tcp_paramsTcp parameters for ease of pbf command construction */ 7065 #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0 7066 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8) /* BitField tcp_paramsTcp parameters */ 7067 #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8 7068 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9) /* BitField tcp_paramsTcp parameters */ 7069 #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9 7070 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10) /* BitField tcp_paramsTcp parameters Selective Ack Enabled */ 7071 #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10 7072 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV (0x1<<11) /* BitField tcp_paramsTcp parameters window smaller than initial window was advertised to far end */ 7073 #define XSTORM_TCP_CONTEXT_SECTION_SMALL_WIN_ADV_SHIFT 11 7074 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12) /* BitField tcp_paramsTcp parameters */ 7075 #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12 7076 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13) /* BitField tcp_paramsTcp parameters */ 7077 #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13 7078 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14) /* BitField tcp_paramsTcp parameters */ 7079 #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14 7080 u8_t ts_enabled /* Only 1 bit is used */; 7081 u8_t original_nagle_1b; 7082 #endif 7083 #if defined(__BIG_ENDIAN) 7084 u16_t pseudo_csum /* the precaluclated pseudo checksum header for pbf command construction */; 7085 u16_t window_scaling_factor /* local_adv_wnd by this variable to reach the advertised window to far end */; 7086 #elif defined(__LITTLE_ENDIAN) 7087 u16_t window_scaling_factor /* local_adv_wnd by this variable to reach the advertised window to far end */; 7088 u16_t pseudo_csum /* the precaluclated pseudo checksum header for pbf command construction */; 7089 #endif 7090 #if defined(__BIG_ENDIAN) 7091 u16_t reserved2 /* The ID of the statistics client for counting common/L2 statistics */; 7092 u8_t statistics_counter_id /* The ID of the statistics client for counting common/L2 statistics */; 7093 u8_t statistics_params; 7094 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) /* BitField statistics_paramsTcp parameters set by the driver, determines wheather or not to update l2 statistics */ 7095 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 7096 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) /* BitField statistics_paramsTcp parameters set by the driver, determines wheather or not to update l4 statistics */ 7097 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 7098 #define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2) /* BitField statistics_paramsTcp parameters */ 7099 #define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 2 7100 #elif defined(__LITTLE_ENDIAN) 7101 u8_t statistics_params; 7102 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) /* BitField statistics_paramsTcp parameters set by the driver, determines wheather or not to update l2 statistics */ 7103 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 7104 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) /* BitField statistics_paramsTcp parameters set by the driver, determines wheather or not to update l4 statistics */ 7105 #define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 7106 #define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2) /* BitField statistics_paramsTcp parameters */ 7107 #define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 2 7108 u8_t statistics_counter_id /* The ID of the statistics client for counting common/L2 statistics */; 7109 u16_t reserved2 /* The ID of the statistics client for counting common/L2 statistics */; 7110 #endif 7111 u32_t ts_time_diff /* Time Stamp Offload, used in PBF Header Builder Command */; 7112 u32_t __next_timer_expir /* Last Packet Real Time Clock Stamp */; 7113 }; 7114 7115 /* 7116 * Common context section, shared in TOE, RDMA and ISCSI 7117 */ 7118 struct xstorm_common_context_section 7119 { 7120 struct xstorm_eth_context_section ethernet; 7121 union xstorm_ip_context_section_types ip_union; 7122 struct xstorm_tcp_context_section tcp; 7123 #if defined(__BIG_ENDIAN) 7124 u8_t __dcb_val; 7125 u8_t flags; 7126 #define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0) /* BitField flagsTcp parameters part of the tx switching state machine */ 7127 #define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 0 7128 #define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1) /* BitField flagsTcp parameters determines to which voq credit will be returned */ 7129 #define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 1 7130 #define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE (0x1<<4) /* BitField flagsTcp parameters Flag that states wether inner valn was provided by the OS */ 7131 #define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE_SHIFT 4 7132 #define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY (0x7<<5) /* BitField flagsTcp parameters original priority given from the OS */ 7133 #define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY_SHIFT 5 7134 u8_t reserved; 7135 u8_t ip_version_1b; 7136 #elif defined(__LITTLE_ENDIAN) 7137 u8_t ip_version_1b; 7138 u8_t reserved; 7139 u8_t flags; 7140 #define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0) /* BitField flagsTcp parameters part of the tx switching state machine */ 7141 #define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 0 7142 #define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1) /* BitField flagsTcp parameters determines to which voq credit will be returned */ 7143 #define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 1 7144 #define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE (0x1<<4) /* BitField flagsTcp parameters Flag that states wether inner valn was provided by the OS */ 7145 #define XSTORM_COMMON_CONTEXT_SECTION_VLAN_MODE_SHIFT 4 7146 #define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY (0x7<<5) /* BitField flagsTcp parameters original priority given from the OS */ 7147 #define XSTORM_COMMON_CONTEXT_SECTION_ORIGINAL_PRIORITY_SHIFT 5 7148 u8_t __dcb_val; 7149 #endif 7150 }; 7151 7152 /* 7153 * Flags used in ISCSI context section 7154 */ 7155 struct xstorm_iscsi_context_flags 7156 { 7157 u8_t flags; 7158 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA (0x1<<0) /* BitField flags */ 7159 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA_SHIFT 0 7160 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T (0x1<<1) /* BitField flags */ 7161 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T_SHIFT 1 7162 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST (0x1<<2) /* BitField flags */ 7163 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST_SHIFT 2 7164 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST (0x1<<3) /* BitField flags */ 7165 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST_SHIFT 3 7166 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN (0x1<<4) /* BitField flags */ 7167 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN_SHIFT 4 7168 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ (0x1<<5) /* BitField flags */ 7169 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ_SHIFT 5 7170 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT (0x1<<6) /* BitField flags */ 7171 #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT_SHIFT 6 7172 #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4 (0x1<<7) /* BitField flags */ 7173 #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4_SHIFT 7 7174 }; 7175 7176 struct iscsi_task_context_entry_x 7177 { 7178 u32_t data_out_buffer_offset; 7179 u32_t itt; 7180 u32_t data_sn; 7181 }; 7182 7183 struct iscsi_task_context_entry_xuc_x_write_only 7184 { 7185 u32_t tx_r2t_sn /* Xstorm increments for every data-out seq sent. */; 7186 }; 7187 7188 struct iscsi_task_context_entry_xuc_xu_write_both 7189 { 7190 u32_t sgl_base_lo; 7191 u32_t sgl_base_hi; 7192 #if defined(__BIG_ENDIAN) 7193 u8_t sgl_size; 7194 u8_t sge_index; 7195 u16_t sge_offset; 7196 #elif defined(__LITTLE_ENDIAN) 7197 u16_t sge_offset; 7198 u8_t sge_index; 7199 u8_t sgl_size; 7200 #endif 7201 }; 7202 7203 /* 7204 * iSCSI context section 7205 */ 7206 struct xstorm_iscsi_context_section 7207 { 7208 u32_t first_burst_length; 7209 u32_t max_send_pdu_length; 7210 struct regpair_t sq_pbl_base; 7211 struct regpair_t sq_curr_pbe; 7212 struct regpair_t hq_pbl_base; 7213 struct regpair_t hq_curr_pbe_base; 7214 struct regpair_t r2tq_pbl_base; 7215 struct regpair_t r2tq_curr_pbe_base; 7216 struct regpair_t task_pbl_base; 7217 #if defined(__BIG_ENDIAN) 7218 u16_t data_out_count; 7219 struct xstorm_iscsi_context_flags flags; 7220 u8_t task_pbl_cache_idx /* All-ones value stands for PBL not cached */; 7221 #elif defined(__LITTLE_ENDIAN) 7222 u8_t task_pbl_cache_idx /* All-ones value stands for PBL not cached */; 7223 struct xstorm_iscsi_context_flags flags; 7224 u16_t data_out_count; 7225 #endif 7226 u32_t seq_more_2_send; 7227 u32_t pdu_more_2_send; 7228 struct iscsi_task_context_entry_x temp_tce_x; 7229 struct iscsi_task_context_entry_xuc_x_write_only temp_tce_x_wr; 7230 struct iscsi_task_context_entry_xuc_xu_write_both temp_tce_xu_wr; 7231 struct regpair_t lun; 7232 u32_t exp_data_transfer_len_ttt /* Overloaded with ttt in multi-pdu sequences flow. */; 7233 u32_t pdu_data_2_rxmit; 7234 u32_t rxmit_bytes_2_dr; 7235 #if defined(__BIG_ENDIAN) 7236 u16_t rxmit_sge_offset; 7237 u16_t hq_rxmit_cons; 7238 #elif defined(__LITTLE_ENDIAN) 7239 u16_t hq_rxmit_cons; 7240 u16_t rxmit_sge_offset; 7241 #endif 7242 #if defined(__BIG_ENDIAN) 7243 u16_t r2tq_cons; 7244 u8_t rxmit_flags; 7245 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0) /* BitField rxmit_flags */ 7246 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0 7247 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1) /* BitField rxmit_flags */ 7248 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1 7249 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2) /* BitField rxmit_flags */ 7250 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2 7251 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3) /* BitField rxmit_flags */ 7252 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3 7253 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4) /* BitField rxmit_flags */ 7254 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4 7255 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5) /* BitField rxmit_flags */ 7256 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5 7257 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7) /* BitField rxmit_flags */ 7258 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7 7259 u8_t rxmit_sge_idx; 7260 #elif defined(__LITTLE_ENDIAN) 7261 u8_t rxmit_sge_idx; 7262 u8_t rxmit_flags; 7263 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0) /* BitField rxmit_flags */ 7264 #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0 7265 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1) /* BitField rxmit_flags */ 7266 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1 7267 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2) /* BitField rxmit_flags */ 7268 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2 7269 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3) /* BitField rxmit_flags */ 7270 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3 7271 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4) /* BitField rxmit_flags */ 7272 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4 7273 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5) /* BitField rxmit_flags */ 7274 #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5 7275 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7) /* BitField rxmit_flags */ 7276 #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7 7277 u16_t r2tq_cons; 7278 #endif 7279 u32_t hq_rxmit_tcp_seq; 7280 }; 7281 7282 /* 7283 * Xstorm iSCSI Storm Context 7284 */ 7285 struct xstorm_iscsi_st_context 7286 { 7287 struct xstorm_common_context_section common; 7288 struct xstorm_iscsi_context_section iscsi; 7289 }; 7290 7291 /* 7292 * Iscsi connection context 7293 */ 7294 struct iscsi_context 7295 { 7296 struct ustorm_iscsi_st_context ustorm_st_context /* Ustorm storm context */; 7297 struct tstorm_iscsi_st_context tstorm_st_context /* Tstorm storm context */; 7298 struct xstorm_iscsi_ag_context xstorm_ag_context /* Xstorm aggregative context */; 7299 struct tstorm_iscsi_ag_context tstorm_ag_context /* Tstorm aggregative context */; 7300 struct cstorm_iscsi_ag_context cstorm_ag_context /* Cstorm aggregative context */; 7301 struct ustorm_iscsi_ag_context ustorm_ag_context /* Ustorm aggregative context */; 7302 struct timers_block_context timers_context /* Timers block context */; 7303 struct regpair_t upb_context /* UPb context */; 7304 struct xstorm_iscsi_st_context xstorm_st_context /* Xstorm storm context */; 7305 struct regpair_t xpb_context /* XPb context (inside the PBF) */; 7306 struct cstorm_iscsi_st_context cstorm_st_context /* Cstorm storm context */; 7307 }; 7308 7309 7310 /* 7311 * PDU header of an iSCSI DATA-OUT 7312 */ 7313 struct iscsi_data_pdu_hdr_little_endian 7314 { 7315 #if defined(__BIG_ENDIAN) 7316 u8_t opcode; 7317 u8_t op_attr; 7318 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) /* BitField op_attr */ 7319 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7320 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) /* BitField op_attr */ 7321 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 7322 u16_t rsrv0; 7323 #elif defined(__LITTLE_ENDIAN) 7324 u16_t rsrv0; 7325 u8_t op_attr; 7326 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) /* BitField op_attr */ 7327 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7328 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) /* BitField op_attr */ 7329 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 7330 u8_t opcode; 7331 #endif 7332 u32_t data_fields; 7333 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7334 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7335 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7336 #define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7337 struct regpair_t lun; 7338 u32_t itt; 7339 u32_t ttt; 7340 u32_t rsrv2; 7341 u32_t exp_stat_sn; 7342 u32_t rsrv3; 7343 u32_t data_sn; 7344 u32_t buffer_offset; 7345 u32_t rsrv4; 7346 }; 7347 7348 7349 /* 7350 * PDU header of an iSCSI login request 7351 */ 7352 struct iscsi_login_req_hdr_little_endian 7353 { 7354 #if defined(__BIG_ENDIAN) 7355 u8_t opcode; 7356 u8_t op_attr; 7357 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0) /* BitField op_attr */ 7358 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 0 7359 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2) /* BitField op_attr */ 7360 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 2 7361 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4) /* BitField op_attr */ 7362 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 4 7363 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) /* BitField op_attr */ 7364 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 7365 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7) /* BitField op_attr */ 7366 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 7 7367 u8_t version_max; 7368 u8_t version_min; 7369 #elif defined(__LITTLE_ENDIAN) 7370 u8_t version_min; 7371 u8_t version_max; 7372 u8_t op_attr; 7373 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0) /* BitField op_attr */ 7374 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 0 7375 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2) /* BitField op_attr */ 7376 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 2 7377 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4) /* BitField op_attr */ 7378 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 4 7379 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) /* BitField op_attr */ 7380 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 7381 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7) /* BitField op_attr */ 7382 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 7 7383 u8_t opcode; 7384 #endif 7385 u32_t data_fields; 7386 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7387 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7388 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7389 #define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7390 u32_t isid_lo; 7391 #if defined(__BIG_ENDIAN) 7392 u16_t isid_hi; 7393 u16_t tsih; 7394 #elif defined(__LITTLE_ENDIAN) 7395 u16_t tsih; 7396 u16_t isid_hi; 7397 #endif 7398 u32_t itt; 7399 #if defined(__BIG_ENDIAN) 7400 u16_t cid; 7401 u16_t rsrv1; 7402 #elif defined(__LITTLE_ENDIAN) 7403 u16_t rsrv1; 7404 u16_t cid; 7405 #endif 7406 u32_t cmd_sn; 7407 u32_t exp_stat_sn; 7408 u32_t rsrv2[4]; 7409 }; 7410 7411 /* 7412 * PDU header of an iSCSI logout request 7413 */ 7414 struct iscsi_logout_req_hdr_little_endian 7415 { 7416 #if defined(__BIG_ENDIAN) 7417 u8_t opcode; 7418 u8_t op_attr; 7419 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0) /* BitField op_attr */ 7420 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 0 7421 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) /* BitField op_attr this value must be 1 */ 7422 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 7423 u16_t rsrv0; 7424 #elif defined(__LITTLE_ENDIAN) 7425 u16_t rsrv0; 7426 u8_t op_attr; 7427 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0) /* BitField op_attr */ 7428 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 0 7429 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) /* BitField op_attr this value must be 1 */ 7430 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 7431 u8_t opcode; 7432 #endif 7433 u32_t data_fields; 7434 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7435 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7436 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7437 #define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7438 u32_t rsrv2[2]; 7439 u32_t itt; 7440 #if defined(__BIG_ENDIAN) 7441 u16_t cid; 7442 u16_t rsrv1; 7443 #elif defined(__LITTLE_ENDIAN) 7444 u16_t rsrv1; 7445 u16_t cid; 7446 #endif 7447 u32_t cmd_sn; 7448 u32_t exp_stat_sn; 7449 u32_t rsrv3[4]; 7450 }; 7451 7452 /* 7453 * PDU header of an iSCSI TMF request 7454 */ 7455 struct iscsi_tmf_req_hdr_little_endian 7456 { 7457 #if defined(__BIG_ENDIAN) 7458 u8_t opcode; 7459 u8_t op_attr; 7460 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0) /* BitField op_attr */ 7461 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 0 7462 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) /* BitField op_attr this value must be 1 */ 7463 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 7464 u16_t rsrv0; 7465 #elif defined(__LITTLE_ENDIAN) 7466 u16_t rsrv0; 7467 u8_t op_attr; 7468 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0) /* BitField op_attr */ 7469 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 0 7470 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) /* BitField op_attr this value must be 1 */ 7471 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 7472 u8_t opcode; 7473 #endif 7474 u32_t data_fields; 7475 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7476 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7477 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7478 #define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7479 struct regpair_t lun; 7480 u32_t itt; 7481 u32_t referenced_task_tag; 7482 u32_t cmd_sn; 7483 u32_t exp_stat_sn; 7484 u32_t ref_cmd_sn; 7485 u32_t exp_data_sn; 7486 u32_t rsrv2[2]; 7487 }; 7488 7489 /* 7490 * PDU header of an iSCSI Text request 7491 */ 7492 struct iscsi_text_req_hdr_little_endian 7493 { 7494 #if defined(__BIG_ENDIAN) 7495 u8_t opcode; 7496 u8_t op_attr; 7497 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0) /* BitField op_attr */ 7498 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7499 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) /* BitField op_attr */ 7500 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 7501 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7) /* BitField op_attr */ 7502 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 7 7503 u16_t rsrv0; 7504 #elif defined(__LITTLE_ENDIAN) 7505 u16_t rsrv0; 7506 u8_t op_attr; 7507 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0) /* BitField op_attr */ 7508 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7509 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) /* BitField op_attr */ 7510 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 7511 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7) /* BitField op_attr */ 7512 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 7 7513 u8_t opcode; 7514 #endif 7515 u32_t data_fields; 7516 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7517 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7518 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7519 #define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7520 struct regpair_t lun; 7521 u32_t itt; 7522 u32_t ttt; 7523 u32_t cmd_sn; 7524 u32_t exp_stat_sn; 7525 u32_t rsrv3[4]; 7526 }; 7527 7528 /* 7529 * PDU header of an iSCSI Nop-Out 7530 */ 7531 struct iscsi_nop_out_hdr_little_endian 7532 { 7533 #if defined(__BIG_ENDIAN) 7534 u8_t opcode; 7535 u8_t op_attr; 7536 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) /* BitField op_attr */ 7537 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7538 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7) /* BitField op_attr this reserved bit must be set to 1 */ 7539 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 7 7540 u16_t rsrv0; 7541 #elif defined(__LITTLE_ENDIAN) 7542 u16_t rsrv0; 7543 u8_t op_attr; 7544 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) /* BitField op_attr */ 7545 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 7546 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7) /* BitField op_attr this reserved bit must be set to 1 */ 7547 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 7 7548 u8_t opcode; 7549 #endif 7550 u32_t data_fields; 7551 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) /* BitField data_fields */ 7552 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 7553 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) /* BitField data_fields */ 7554 #define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 7555 struct regpair_t lun; 7556 u32_t itt; 7557 u32_t ttt; 7558 u32_t cmd_sn; 7559 u32_t exp_stat_sn; 7560 u32_t rsrv3[4]; 7561 }; 7562 7563 /* 7564 * iscsi pdu headers in little endian form. 7565 */ 7566 union iscsi_pdu_headers_little_endian 7567 { 7568 u32_t fullHeaderSize[12] /* The full size of the header. protects the union size */; 7569 struct iscsi_cmd_pdu_hdr_little_endian command_pdu_hdr /* PDU header of an iSCSI command - read,write */; 7570 struct iscsi_data_pdu_hdr_little_endian data_out_pdu_hdr /* PDU header of an iSCSI DATA-IN and DATA-OUT PDU */; 7571 struct iscsi_login_req_hdr_little_endian login_req_pdu_hdr /* PDU header of an iSCSI Login request */; 7572 struct iscsi_logout_req_hdr_little_endian logout_req_pdu_hdr /* PDU header of an iSCSI Logout request */; 7573 struct iscsi_tmf_req_hdr_little_endian tmf_req_pdu_hdr /* PDU header of an iSCSI TMF request */; 7574 struct iscsi_text_req_hdr_little_endian text_req_pdu_hdr /* PDU header of an iSCSI Text request */; 7575 struct iscsi_nop_out_hdr_little_endian nop_out_pdu_hdr /* PDU header of an iSCSI Nop-Out */; 7576 }; 7577 7578 struct iscsi_hq_bd 7579 { 7580 union iscsi_pdu_headers_little_endian pdu_header; 7581 #if defined(__BIG_ENDIAN) 7582 u16_t reserved1; 7583 u16_t lcl_cmp_flg; 7584 #elif defined(__LITTLE_ENDIAN) 7585 u16_t lcl_cmp_flg; 7586 u16_t reserved1; 7587 #endif 7588 u32_t sgl_base_lo; 7589 u32_t sgl_base_hi; 7590 #if defined(__BIG_ENDIAN) 7591 u8_t sgl_size; 7592 u8_t sge_index; 7593 u16_t sge_offset; 7594 #elif defined(__LITTLE_ENDIAN) 7595 u16_t sge_offset; 7596 u8_t sge_index; 7597 u8_t sgl_size; 7598 #endif 7599 }; 7600 7601 7602 /* 7603 * CQE data for L2 OOO connection $$KEEP_ENDIANNESS$$ 7604 */ 7605 struct iscsi_l2_ooo_data 7606 { 7607 u32_t iscsi_cid /* iSCSI context ID */; 7608 u8_t drop_isle /* isle number of the first isle to drop */; 7609 u8_t drop_size /* number of isles to drop */; 7610 u8_t ooo_opcode /* Out Of Order opcode (use enum tcp_ooo_event */; 7611 u8_t ooo_isle /* OOO isle number to add the packet to */; 7612 u8_t reserved[8]; 7613 }; 7614 7615 7616 7617 7618 7619 7620 struct iscsi_task_context_entry_xuc_c_write_only 7621 { 7622 u32_t total_data_acked /* Xstorm inits to zero. C increments. U validates */; 7623 }; 7624 7625 struct iscsi_task_context_r2t_table_entry 7626 { 7627 u32_t ttt; 7628 u32_t desired_data_len; 7629 }; 7630 7631 struct iscsi_task_context_entry_xuc_u_write_only 7632 { 7633 u32_t exp_r2t_sn /* Xstorm inits to zero. U increments. */; 7634 struct iscsi_task_context_r2t_table_entry r2t_table[4] /* U updates. X reads */; 7635 #if defined(__BIG_ENDIAN) 7636 u16_t data_in_count /* X inits to zero. U increments. */; 7637 u8_t cq_id /* X inits to zero. U uses. */; 7638 u8_t valid_1b /* X sets. U resets. */; 7639 #elif defined(__LITTLE_ENDIAN) 7640 u8_t valid_1b /* X sets. U resets. */; 7641 u8_t cq_id /* X inits to zero. U uses. */; 7642 u16_t data_in_count /* X inits to zero. U increments. */; 7643 #endif 7644 }; 7645 7646 struct iscsi_task_context_entry_xuc 7647 { 7648 struct iscsi_task_context_entry_xuc_c_write_only write_c /* Cstorm only inits data here, without further change by any storm. */; 7649 u32_t exp_data_transfer_len /* Xstorm only inits data here. */; 7650 struct iscsi_task_context_entry_xuc_x_write_only write_x /* only Xstorm writes data here. */; 7651 u32_t lun_lo /* Xstorm only inits data here. */; 7652 struct iscsi_task_context_entry_xuc_xu_write_both write_xu /* Both X and U update this struct, but in different flow. */; 7653 u32_t lun_hi /* Xstorm only inits data here. */; 7654 struct iscsi_task_context_entry_xuc_u_write_only write_u /* Ustorm only inits data here, without further change by any storm. */; 7655 }; 7656 7657 struct iscsi_task_context_entry_u 7658 { 7659 u32_t exp_r2t_buff_offset; 7660 u32_t rem_rcv_len; 7661 u32_t exp_data_sn; 7662 }; 7663 7664 struct iscsi_task_context_entry 7665 { 7666 struct iscsi_task_context_entry_x tce_x; 7667 #if defined(__BIG_ENDIAN) 7668 u16_t data_out_count; 7669 u16_t rsrv0; 7670 #elif defined(__LITTLE_ENDIAN) 7671 u16_t rsrv0; 7672 u16_t data_out_count; 7673 #endif 7674 struct iscsi_task_context_entry_xuc tce_xuc; 7675 struct iscsi_task_context_entry_u tce_u; 7676 u32_t rsrv1[7] /* increase the size to 128 bytes */; 7677 }; 7678 7679 7680 7681 7682 7683 7684 7685 7686 struct iscsi_task_context_entry_xuc_x_init_only 7687 { 7688 struct regpair_t lun /* X inits. U validates */; 7689 u32_t exp_data_transfer_len /* Xstorm inits to SQ WQE data. U validates */; 7690 }; 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706 7707 7708 7709 /* 7710 * The data afex vif list ramrod need $$KEEP_ENDIANNESS$$ 7711 */ 7712 struct afex_vif_list_ramrod_data 7713 { 7714 u8_t afex_vif_list_command /* set get, clear all a VIF list id defined by enum vif_list_rule_kind */; 7715 u8_t func_bit_map /* the function bit map to set */; 7716 u16_t vif_list_index /* the VIF list, in a per pf vector to add this function to */; 7717 u8_t func_to_clear /* the func id to clear in case of clear func mode */; 7718 u8_t echo; 7719 u16_t reserved1; 7720 }; 7721 7722 7723 /* 7724 * cfc delete event data $$KEEP_ENDIANNESS$$ 7725 */ 7726 struct cfc_del_event_data 7727 { 7728 u32_t cid /* cid of deleted connection */; 7729 u32_t reserved0; 7730 u32_t reserved1; 7731 }; 7732 7733 7734 /* 7735 * per-port SAFC demo variables 7736 */ 7737 struct cmng_flags_per_port 7738 { 7739 u32_t cmng_enables; 7740 #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN (0x1<<0) /* BitField cmng_enablesenables flag for fairness and rate shaping between protocols, vnics and COSes if set, enable fairness between vnics */ 7741 #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN_SHIFT 0 7742 #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN (0x1<<1) /* BitField cmng_enablesenables flag for fairness and rate shaping between protocols, vnics and COSes if set, enable rate shaping between vnics */ 7743 #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN_SHIFT 1 7744 #define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<2) /* BitField cmng_enablesenables flag for fairness and rate shaping between protocols, vnics and COSes if set, enable fairness between COSes */ 7745 #define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 2 7746 #define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE (0x1<<3) /* BitField cmng_enablesenables flag for fairness and rate shaping between protocols, vnics and COSes (use enum fairness_mode) */ 7747 #define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT 3 7748 #define __CMNG_FLAGS_PER_PORT_RESERVED0 (0xFFFFFFF<<4) /* BitField cmng_enablesenables flag for fairness and rate shaping between protocols, vnics and COSes reserved */ 7749 #define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 4 7750 u32_t __reserved1; 7751 }; 7752 7753 7754 /* 7755 * per-port rate shaping variables 7756 */ 7757 struct rate_shaping_vars_per_port 7758 { 7759 u32_t rs_periodic_timeout /* timeout of periodic timer */; 7760 u32_t rs_threshold /* threshold, below which we start to stop queues */; 7761 }; 7762 7763 /* 7764 * per-port fairness variables 7765 */ 7766 struct fairness_vars_per_port 7767 { 7768 u32_t upper_bound /* Quota for a protocol/vnic */; 7769 u32_t fair_threshold /* almost-empty threshold */; 7770 u32_t fairness_timeout /* timeout of fairness timer */; 7771 u32_t reserved0; 7772 }; 7773 7774 /* 7775 * per-port SAFC variables 7776 */ 7777 struct safc_struct_per_port 7778 { 7779 #if defined(__BIG_ENDIAN) 7780 u16_t __reserved1; 7781 u8_t __reserved0; 7782 u8_t safc_timeout_usec /* timeout to stop queues on SAFC pause command */; 7783 #elif defined(__LITTLE_ENDIAN) 7784 u8_t safc_timeout_usec /* timeout to stop queues on SAFC pause command */; 7785 u8_t __reserved0; 7786 u16_t __reserved1; 7787 #endif 7788 u8_t cos_to_traffic_types[MAX_COS_NUMBER] /* translate cos to service traffics types */; 7789 u16_t cos_to_pause_mask[NUM_OF_SAFC_BITS] /* QM pause mask for each class of service in the SAFC frame */; 7790 }; 7791 7792 /* 7793 * Per-port congestion management variables 7794 */ 7795 struct cmng_struct_per_port 7796 { 7797 struct rate_shaping_vars_per_port rs_vars; 7798 struct fairness_vars_per_port fair_vars; 7799 struct safc_struct_per_port safc_vars; 7800 struct cmng_flags_per_port flags; 7801 }; 7802 7803 /* 7804 * a single rate shaping counter. can be used as protocol or vnic counter 7805 */ 7806 struct rate_shaping_counter 7807 { 7808 u32_t quota /* Quota for a protocol/vnic */; 7809 #if defined(__BIG_ENDIAN) 7810 u16_t __reserved0; 7811 u16_t rate /* Vnic/Protocol rate in units of Mega-bits/sec */; 7812 #elif defined(__LITTLE_ENDIAN) 7813 u16_t rate /* Vnic/Protocol rate in units of Mega-bits/sec */; 7814 u16_t __reserved0; 7815 #endif 7816 }; 7817 7818 /* 7819 * per-vnic rate shaping variables 7820 */ 7821 struct rate_shaping_vars_per_vn 7822 { 7823 struct rate_shaping_counter vn_counter /* per-vnic counter */; 7824 }; 7825 7826 /* 7827 * per-vnic fairness variables 7828 */ 7829 struct fairness_vars_per_vn 7830 { 7831 u32_t cos_credit_delta[MAX_COS_NUMBER] /* used for incrementing the credit */; 7832 u32_t vn_credit_delta /* used for incrementing the credit */; 7833 u32_t __reserved0; 7834 }; 7835 7836 /* 7837 * cmng port init state 7838 */ 7839 struct cmng_vnic 7840 { 7841 struct rate_shaping_vars_per_vn vnic_max_rate[4]; 7842 struct fairness_vars_per_vn vnic_min_rate[4]; 7843 }; 7844 7845 /* 7846 * cmng port init state 7847 */ 7848 struct cmng_init 7849 { 7850 struct cmng_struct_per_port port; 7851 struct cmng_vnic vnic; 7852 }; 7853 7854 7855 /* 7856 * driver parameters for congestion management init, all rates are in Mbps 7857 */ 7858 struct cmng_init_input 7859 { 7860 u32_t port_rate; 7861 u16_t vnic_min_rate[4] /* rates are in Mbps */; 7862 u16_t vnic_max_rate[4] /* rates are in Mbps */; 7863 u16_t cos_min_rate[MAX_COS_NUMBER] /* rates are in Mbps */; 7864 u16_t cos_to_pause_mask[MAX_COS_NUMBER]; 7865 struct cmng_flags_per_port flags; 7866 }; 7867 7868 7869 7870 7871 7872 /* 7873 * Protocol-common command ID for slow path elements 7874 */ 7875 enum common_spqe_cmd_id 7876 { 7877 RAMROD_CMD_ID_COMMON_UNUSED, 7878 RAMROD_CMD_ID_COMMON_FUNCTION_START /* Start a function (for PFs only) */, 7879 RAMROD_CMD_ID_COMMON_FUNCTION_STOP /* Stop a function (for PFs only) */, 7880 RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE /* niv update function */, 7881 RAMROD_CMD_ID_COMMON_CFC_DEL /* Delete a connection from CFC */, 7882 RAMROD_CMD_ID_COMMON_CFC_DEL_WB /* Delete a connection from CFC (with write back) */, 7883 RAMROD_CMD_ID_COMMON_STAT_QUERY /* Collect statistics counters */, 7884 RAMROD_CMD_ID_COMMON_STOP_TRAFFIC /* Stop Tx traffic (before DCB updates) */, 7885 RAMROD_CMD_ID_COMMON_START_TRAFFIC /* Start Tx traffic (after DCB updates) */, 7886 RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS /* niv vif lists */, 7887 RAMROD_CMD_ID_COMMON_SET_TIMESYNC /* Set Timesync Parameters (E3 Only) */, 7888 MAX_COMMON_SPQE_CMD_ID}; 7889 7890 7891 /* 7892 * Per-protocol connection types 7893 */ 7894 enum connection_type 7895 { 7896 ETH_CONNECTION_TYPE /* Ethernet */, 7897 TOE_CONNECTION_TYPE /* TOE */, 7898 RDMA_CONNECTION_TYPE /* RDMA */, 7899 ISCSI_CONNECTION_TYPE /* iSCSI */, 7900 FCOE_CONNECTION_TYPE /* FCoE */, 7901 RESERVED_CONNECTION_TYPE_0, 7902 RESERVED_CONNECTION_TYPE_1, 7903 RESERVED_CONNECTION_TYPE_2, 7904 NONE_CONNECTION_TYPE /* General- used for common slow path */, 7905 MAX_CONNECTION_TYPE}; 7906 7907 7908 /* 7909 * Cos modes 7910 */ 7911 enum cos_mode 7912 { 7913 OVERRIDE_COS /* Firmware deduce cos according to DCB */, 7914 STATIC_COS /* Firmware has constant queues per CoS */, 7915 FW_WRR /* Firmware keep fairness between different CoSes */, 7916 MAX_COS_MODE}; 7917 7918 7919 /* 7920 * Dynamic HC counters set by the driver 7921 */ 7922 struct hc_dynamic_drv_counter 7923 { 7924 u32_t val[HC_SB_MAX_DYNAMIC_INDICES] /* 4 bytes * 4 indices = 2 lines */; 7925 }; 7926 7927 /* 7928 * zone A per-queue data 7929 */ 7930 struct cstorm_queue_zone_data 7931 { 7932 struct hc_dynamic_drv_counter hc_dyn_drv_cnt /* 4 bytes * 4 indices = 2 lines */; 7933 struct regpair_t reserved[2]; 7934 }; 7935 7936 7937 /* 7938 * Vf-PF channel data in cstorm ram (non-triggered zone) 7939 */ 7940 struct vf_pf_channel_zone_data 7941 { 7942 u32_t msg_addr_lo /* the message address on VF memory */; 7943 u32_t msg_addr_hi /* the message address on VF memory */; 7944 }; 7945 7946 /* 7947 * zone for VF non-triggered data 7948 */ 7949 struct non_trigger_vf_zone 7950 { 7951 struct vf_pf_channel_zone_data vf_pf_channel /* vf-pf channel zone data */; 7952 }; 7953 7954 /* 7955 * Vf-PF channel trigger zone in cstorm ram 7956 */ 7957 struct vf_pf_channel_zone_trigger 7958 { 7959 u8_t addr_valid /* indicates that a vf-pf message is pending. MUST be set AFTER the message address. */; 7960 }; 7961 7962 /* 7963 * zone that triggers the in-bound interrupt 7964 */ 7965 struct trigger_vf_zone 7966 { 7967 #if defined(__BIG_ENDIAN) 7968 u16_t reserved1; 7969 u8_t reserved0; 7970 struct vf_pf_channel_zone_trigger vf_pf_channel; 7971 #elif defined(__LITTLE_ENDIAN) 7972 struct vf_pf_channel_zone_trigger vf_pf_channel; 7973 u8_t reserved0; 7974 u16_t reserved1; 7975 #endif 7976 u32_t reserved2; 7977 }; 7978 7979 /* 7980 * zone B per-VF data 7981 */ 7982 struct cstorm_vf_zone_data 7983 { 7984 struct non_trigger_vf_zone non_trigger /* zone for VF non-triggered data */; 7985 struct trigger_vf_zone trigger /* zone that triggers the in-bound interrupt */; 7986 }; 7987 7988 7989 /* 7990 * Dynamic host coalescing init parameters, per state machine 7991 */ 7992 struct dynamic_hc_sm_config 7993 { 7994 u32_t threshold[3] /* thresholds of number of outstanding bytes */; 7995 u8_t shift_per_protocol[HC_SB_MAX_DYNAMIC_INDICES] /* bytes difference of each protocol is shifted right by this value */; 7996 u8_t hc_timeout0[HC_SB_MAX_DYNAMIC_INDICES] /* timeout for level 0 for each protocol, in units of usec */; 7997 u8_t hc_timeout1[HC_SB_MAX_DYNAMIC_INDICES] /* timeout for level 1 for each protocol, in units of usec */; 7998 u8_t hc_timeout2[HC_SB_MAX_DYNAMIC_INDICES] /* timeout for level 2 for each protocol, in units of usec */; 7999 u8_t hc_timeout3[HC_SB_MAX_DYNAMIC_INDICES] /* timeout for level 3 for each protocol, in units of usec */; 8000 }; 8001 8002 /* 8003 * Dynamic host coalescing init parameters 8004 */ 8005 struct dynamic_hc_config 8006 { 8007 struct dynamic_hc_sm_config sm_config[HC_SB_MAX_SM] /* Configuration per state machine */; 8008 }; 8009 8010 8011 8012 struct e2_integ_data 8013 { 8014 #if defined(__BIG_ENDIAN) 8015 u8_t flags; 8016 #define E2_INTEG_DATA_TESTING_EN (0x1<<0) /* BitField flags integration testing enabled */ 8017 #define E2_INTEG_DATA_TESTING_EN_SHIFT 0 8018 #define E2_INTEG_DATA_LB_TX (0x1<<1) /* BitField flags flag indicating this connection will transmit on loopback */ 8019 #define E2_INTEG_DATA_LB_TX_SHIFT 1 8020 #define E2_INTEG_DATA_COS_TX (0x1<<2) /* BitField flags flag indicating this connection will transmit according to cos field */ 8021 #define E2_INTEG_DATA_COS_TX_SHIFT 2 8022 #define E2_INTEG_DATA_OPPORTUNISTICQM (0x1<<3) /* BitField flags flag indicating this connection will activate the opportunistic QM credit flow */ 8023 #define E2_INTEG_DATA_OPPORTUNISTICQM_SHIFT 3 8024 #define E2_INTEG_DATA_DPMTESTRELEASEDQ (0x1<<4) /* BitField flags flag indicating this connection will release the door bell queue (DQ) */ 8025 #define E2_INTEG_DATA_DPMTESTRELEASEDQ_SHIFT 4 8026 #define E2_INTEG_DATA_RESERVED (0x7<<5) /* BitField flags */ 8027 #define E2_INTEG_DATA_RESERVED_SHIFT 5 8028 u8_t cos /* cos of the connection (relevant only in cos transmitting connections, when cosTx is set */; 8029 u8_t voq /* voq to return credit on. Normally equal to port (i.e. always 0 in E2 operational connections). in cos tests equal to cos. in loopback tests equal to LB_PORT (=4) */; 8030 u8_t pbf_queue /* pbf queue to transmit on. Normally equal to port (i.e. always 0 in E2 operational connections). in cos tests equal to cos. in loopback tests equal to LB_PORT (=4) */; 8031 #elif defined(__LITTLE_ENDIAN) 8032 u8_t pbf_queue /* pbf queue to transmit on. Normally equal to port (i.e. always 0 in E2 operational connections). in cos tests equal to cos. in loopback tests equal to LB_PORT (=4) */; 8033 u8_t voq /* voq to return credit on. Normally equal to port (i.e. always 0 in E2 operational connections). in cos tests equal to cos. in loopback tests equal to LB_PORT (=4) */; 8034 u8_t cos /* cos of the connection (relevant only in cos transmitting connections, when cosTx is set */; 8035 u8_t flags; 8036 #define E2_INTEG_DATA_TESTING_EN (0x1<<0) /* BitField flags integration testing enabled */ 8037 #define E2_INTEG_DATA_TESTING_EN_SHIFT 0 8038 #define E2_INTEG_DATA_LB_TX (0x1<<1) /* BitField flags flag indicating this connection will transmit on loopback */ 8039 #define E2_INTEG_DATA_LB_TX_SHIFT 1 8040 #define E2_INTEG_DATA_COS_TX (0x1<<2) /* BitField flags flag indicating this connection will transmit according to cos field */ 8041 #define E2_INTEG_DATA_COS_TX_SHIFT 2 8042 #define E2_INTEG_DATA_OPPORTUNISTICQM (0x1<<3) /* BitField flags flag indicating this connection will activate the opportunistic QM credit flow */ 8043 #define E2_INTEG_DATA_OPPORTUNISTICQM_SHIFT 3 8044 #define E2_INTEG_DATA_DPMTESTRELEASEDQ (0x1<<4) /* BitField flags flag indicating this connection will release the door bell queue (DQ) */ 8045 #define E2_INTEG_DATA_DPMTESTRELEASEDQ_SHIFT 4 8046 #define E2_INTEG_DATA_RESERVED (0x7<<5) /* BitField flags */ 8047 #define E2_INTEG_DATA_RESERVED_SHIFT 5 8048 #endif 8049 #if defined(__BIG_ENDIAN) 8050 u16_t reserved3; 8051 u8_t reserved2; 8052 u8_t ramEn /* context area reserved for reading enable bit from ram */; 8053 #elif defined(__LITTLE_ENDIAN) 8054 u8_t ramEn /* context area reserved for reading enable bit from ram */; 8055 u8_t reserved2; 8056 u16_t reserved3; 8057 #endif 8058 }; 8059 8060 8061 /* 8062 * set mac event data $$KEEP_ENDIANNESS$$ 8063 */ 8064 struct eth_event_data 8065 { 8066 u32_t echo /* set mac echo data to return to driver */; 8067 u32_t reserved0; 8068 u32_t reserved1; 8069 }; 8070 8071 8072 /* 8073 * pf-vf event data $$KEEP_ENDIANNESS$$ 8074 */ 8075 struct vf_pf_event_data 8076 { 8077 u8_t vf_id /* VF ID (0-63) */; 8078 u8_t reserved0; 8079 u16_t reserved1; 8080 u32_t msg_addr_lo /* message address on Vf (low 32 bits) */; 8081 u32_t msg_addr_hi /* message address on Vf (high 32 bits) */; 8082 }; 8083 8084 /* 8085 * VF FLR event data $$KEEP_ENDIANNESS$$ 8086 */ 8087 struct vf_flr_event_data 8088 { 8089 u8_t vf_id /* VF ID (0-63) */; 8090 u8_t reserved0; 8091 u16_t reserved1; 8092 u32_t reserved2; 8093 u32_t reserved3; 8094 }; 8095 8096 /* 8097 * malicious VF event data $$KEEP_ENDIANNESS$$ 8098 */ 8099 struct malicious_vf_event_data 8100 { 8101 u8_t vf_id /* VF ID (0-63) */; 8102 u8_t err_id /* reason for malicious notification */; 8103 u16_t reserved1; 8104 u32_t reserved2; 8105 u32_t reserved3; 8106 }; 8107 8108 /* 8109 * vif list event data $$KEEP_ENDIANNESS$$ 8110 */ 8111 struct vif_list_event_data 8112 { 8113 u8_t func_bit_map /* bit map of pf indice */; 8114 u8_t echo; 8115 u16_t reserved0; 8116 u32_t reserved1; 8117 u32_t reserved2; 8118 }; 8119 8120 /* 8121 * function update event data $$KEEP_ENDIANNESS$$ 8122 */ 8123 struct function_update_event_data 8124 { 8125 u8_t echo; 8126 u8_t reserved; 8127 u16_t reserved0; 8128 u32_t reserved1; 8129 u32_t reserved2; 8130 }; 8131 8132 /* 8133 * union for all event ring message types 8134 */ 8135 union event_data 8136 { 8137 struct vf_pf_event_data vf_pf_event /* vf-pf event data */; 8138 struct eth_event_data eth_event /* set mac event data */; 8139 struct cfc_del_event_data cfc_del_event /* cfc delete event data */; 8140 struct vf_flr_event_data vf_flr_event /* vf flr event data */; 8141 struct malicious_vf_event_data malicious_vf_event /* malicious vf event data */; 8142 struct vif_list_event_data vif_list_event /* vif list event data */; 8143 struct function_update_event_data function_update_event /* function update event data */; 8144 }; 8145 8146 8147 /* 8148 * per PF event ring data 8149 */ 8150 struct event_ring_data 8151 { 8152 struct regpair_native_t base_addr /* ring base address */; 8153 #if defined(__BIG_ENDIAN) 8154 u8_t index_id /* index ID within the status block */; 8155 u8_t sb_id /* status block ID */; 8156 u16_t producer /* event ring producer */; 8157 #elif defined(__LITTLE_ENDIAN) 8158 u16_t producer /* event ring producer */; 8159 u8_t sb_id /* status block ID */; 8160 u8_t index_id /* index ID within the status block */; 8161 #endif 8162 u32_t reserved0; 8163 }; 8164 8165 8166 /* 8167 * event ring message element (each element is 128 bits) $$KEEP_ENDIANNESS$$ 8168 */ 8169 struct event_ring_msg 8170 { 8171 u8_t opcode; 8172 u8_t error /* error on the mesasage */; 8173 u16_t reserved1; 8174 union event_data data /* message data (96 bits data) */; 8175 }; 8176 8177 /* 8178 * event ring next page element (128 bits) 8179 */ 8180 struct event_ring_next 8181 { 8182 struct regpair_t addr /* Address of the next page of the ring */; 8183 u32_t reserved[2]; 8184 }; 8185 8186 /* 8187 * union for event ring element types (each element is 128 bits) 8188 */ 8189 union event_ring_elem 8190 { 8191 struct event_ring_msg message /* event ring message */; 8192 struct event_ring_next next_page /* event ring next page */; 8193 }; 8194 8195 8196 8197 8198 /* 8199 * Common event ring opcodes 8200 */ 8201 enum event_ring_opcode 8202 { 8203 EVENT_RING_OPCODE_VF_PF_CHANNEL, 8204 EVENT_RING_OPCODE_FUNCTION_START /* Start a function (for PFs only) */, 8205 EVENT_RING_OPCODE_FUNCTION_STOP /* Stop a function (for PFs only) */, 8206 EVENT_RING_OPCODE_CFC_DEL /* Delete a connection from CFC */, 8207 EVENT_RING_OPCODE_CFC_DEL_WB /* Delete a connection from CFC (with write back) */, 8208 EVENT_RING_OPCODE_STAT_QUERY /* Collect statistics counters */, 8209 EVENT_RING_OPCODE_STOP_TRAFFIC /* Stop Tx traffic (before DCB updates) */, 8210 EVENT_RING_OPCODE_START_TRAFFIC /* Start Tx traffic (after DCB updates) */, 8211 EVENT_RING_OPCODE_VF_FLR /* VF FLR indication for PF */, 8212 EVENT_RING_OPCODE_MALICIOUS_VF /* Malicious VF operation detected */, 8213 EVENT_RING_OPCODE_FORWARD_SETUP /* Initialize forward channel */, 8214 EVENT_RING_OPCODE_RSS_UPDATE_RULES /* Update RSS configuration */, 8215 EVENT_RING_OPCODE_FUNCTION_UPDATE /* function update */, 8216 EVENT_RING_OPCODE_AFEX_VIF_LISTS /* event ring opcode niv vif lists */, 8217 EVENT_RING_OPCODE_SET_MAC /* Add/remove MAC (in E1x only) */, 8218 EVENT_RING_OPCODE_CLASSIFICATION_RULES /* Add/remove MAC or VLAN (in E2/E3 only) */, 8219 EVENT_RING_OPCODE_FILTERS_RULES /* Add/remove classification filters for L2 client (in E2/E3 only) */, 8220 EVENT_RING_OPCODE_MULTICAST_RULES /* Add/remove multicast classification bin (in E2/E3 only) */, 8221 EVENT_RING_OPCODE_SET_TIMESYNC /* Set Timesync Parameters (E3 Only) */, 8222 MAX_EVENT_RING_OPCODE}; 8223 8224 8225 /* 8226 * Modes for fairness algorithm 8227 */ 8228 enum fairness_mode 8229 { 8230 FAIRNESS_COS_WRR_MODE /* Weighted round robin mode (used in Google) */, 8231 FAIRNESS_COS_ETS_MODE /* ETS mode (used in FCoE) */, 8232 MAX_FAIRNESS_MODE}; 8233 8234 8235 8236 8237 /* 8238 * Priority and cos $$KEEP_ENDIANNESS$$ 8239 */ 8240 struct priority_cos 8241 { 8242 u8_t priority /* Priority */; 8243 u8_t cos /* Cos */; 8244 u16_t reserved1; 8245 }; 8246 8247 /* 8248 * The data for flow control configuration $$KEEP_ENDIANNESS$$ 8249 */ 8250 struct flow_control_configuration 8251 { 8252 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES] /* traffic_type to priority cos */; 8253 u8_t dcb_enabled /* If DCB mode is enabled then traffic class to priority array is fully initialized and there must be inner VLAN */; 8254 u8_t dcb_version /* DCB version Increase by one on each DCB update */; 8255 u8_t dont_add_pri_0 /* In case, the priority is 0, and the packet has no vlan, the firmware wont add vlan */; 8256 u8_t reserved1; 8257 u32_t reserved2; 8258 }; 8259 8260 8261 /* 8262 * $$KEEP_ENDIANNESS$$ 8263 */ 8264 struct function_start_data 8265 { 8266 u8_t function_mode /* the function mode */; 8267 u8_t allow_npar_tx_switching /* If set, inter-pf tx switching is allowed in Switch Independant function mode. (E2/E3 Only) */; 8268 u16_t sd_vlan_tag /* value of Vlan in case of switch depended multi-function mode */; 8269 u16_t vif_id /* value of VIF id in case of NIV multi-function mode */; 8270 u8_t path_id; 8271 u8_t network_cos_mode /* The cos mode for network traffic. */; 8272 u8_t dmae_cmd_id /* The DMAE command id to use for FW DMAE transactions */; 8273 u8_t tunnel_mode /* Tunnel Mode to enable on the Function (E2/E3 Only) */; 8274 u8_t gre_tunnel_type /* GRE Tunnel Type to enable on the Function (Only for tunnel_mode is TUNNEL_GRE) */; 8275 u8_t tunn_clss_en /* If set, tunneled packets are classified according to their inner headers (Only for tunnel_mode is TUNNEL_VXLAN or tunnel_mode is TUNNEL_GRE and gre_tunnel_type is NVGRE_TUNNEL) */; 8276 u8_t inner_gre_rss_en /* If set, RSS on the inner headers of GRE tunneled packets is enabled */; 8277 u8_t sd_accept_mf_clss_fail /* If set, accept packets that fail Multi-Function Switch-Dependent classification. Only one VNIC on the port can have this set to 1 */; 8278 u16_t vxlan_dst_port /* UDP Destination Port to be recognised as VXLAN tunneled packets */; 8279 u16_t sd_accept_mf_clss_fail_ethtype /* Ethertype to match in the case of sd_accept_mf_clss_fail_match_ethtype */; 8280 u16_t sd_vlan_eth_type /* Value of ether-type to use in the case of switch dependant multi-function mode. Setting this to 0 uses the default value of 0x8100 */; 8281 u8_t sd_vlan_force_pri_flg /* If set, the SD Vlan Priority is forced to the value of the sd_vlan_pri_force_val field regardless of the DCB or inband VLAN priority. */; 8282 u8_t sd_vlan_force_pri_val /* value to force SD Vlan Priority if sd_vlan_pri_force_flg is set */; 8283 u8_t sd_accept_mf_clss_fail_match_ethtype /* If set, accepted packets must match the ethertype of sd_clss_fail_ethtype */; 8284 u8_t no_added_tags /* If set, the mfTag length is always zero (used in UFP) */; 8285 }; 8286 8287 8288 /* 8289 * $$KEEP_ENDIANNESS$$ 8290 */ 8291 struct function_update_data 8292 { 8293 u8_t vif_id_change_flg /* If set, vif_id will be checked */; 8294 u8_t afex_default_vlan_change_flg /* If set, afex_default_vlan will be checked */; 8295 u8_t allowed_priorities_change_flg /* If set, allowed_priorities will be checked */; 8296 u8_t network_cos_mode_change_flg /* If set, network_cos_mode will be checked */; 8297 u16_t vif_id /* value of VIF id in case of NIV multi-function mode */; 8298 u16_t afex_default_vlan /* value of default Vlan in case of NIV mf */; 8299 u8_t allowed_priorities /* bit vector of allowed Vlan priorities for this VIF */; 8300 u8_t network_cos_mode /* The cos mode for network traffic. */; 8301 u8_t lb_mode_en_change_flg /* If set, lb_mode_en will be checked */; 8302 u8_t lb_mode_en /* If set, niv loopback mode will be enabled */; 8303 u8_t tx_switch_suspend_change_flg /* If set, tx_switch_suspend will be checked */; 8304 u8_t tx_switch_suspend /* If set, TX switching TO this function will be disabled and packets will be dropped */; 8305 u8_t echo; 8306 u8_t update_tunn_cfg_flg /* If set, tunneling config for the function will be updated according to the following fields */; 8307 u8_t tunnel_mode /* Tunnel Mode to enable on the Function (E2/E3 Only) */; 8308 u8_t gre_tunnel_type /* GRE Tunnel Type to enable on the Function (Only for tunnel_mode is TUNNEL_GRE) */; 8309 u8_t tunn_clss_en /* If set, tunneled packets are classified according to their inner headers (Only for tunnel_mode is TUNNEL_VXLAN or tunnel_mode is TUNNEL_GRE and gre_tunnel_type is NVGRE_TUNNEL) */; 8310 u8_t inner_gre_rss_en /* If set, RSS on the inner headers of GRE tunneled packets is enabled */; 8311 u16_t vxlan_dst_port /* UDP Destination Port to be recognised as VXLAN tunneled packets */; 8312 u8_t sd_vlan_force_pri_change_flg /* If set, the SD VLAN Priority Fixed configuration is updated from fields sd_vlan_pri_force_flg and sd_vlan_pri_force_val */; 8313 u8_t sd_vlan_force_pri_flg /* If set, the SD Vlan Priority is forced to the value of the sd_vlan_pri_force_val field regardless of the DCB or inband VLAN priority. */; 8314 u8_t sd_vlan_force_pri_val /* value to force SD Vlan Priority if sd_vlan_pri_force_flg is set */; 8315 u8_t sd_vlan_tag_change_flg /* If set, the SD VLAN Tag is changed according to the field sd_vlan_tag */; 8316 u8_t sd_vlan_eth_type_change_flg /* If set, the SD VLAN Ethertype is changed according to the field sd_vlan_eth_type */; 8317 u8_t reserved1; 8318 u16_t sd_vlan_tag /* New value of Outer Vlan in case of switch depended multi-function mode */; 8319 u16_t sd_vlan_eth_type /* New value of ether-type in the case of switch dependant multi-function mode. Setting this to 0 restores the default value of 0x8100 */; 8320 }; 8321 8322 8323 8324 /* 8325 * FW version stored in the Xstorm RAM 8326 */ 8327 struct fw_version 8328 { 8329 #if defined(__BIG_ENDIAN) 8330 u8_t engineering /* firmware current engineering version */; 8331 u8_t revision /* firmware current revision version */; 8332 u8_t minor /* firmware current minor version */; 8333 u8_t major /* firmware current major version */; 8334 #elif defined(__LITTLE_ENDIAN) 8335 u8_t major /* firmware current major version */; 8336 u8_t minor /* firmware current minor version */; 8337 u8_t revision /* firmware current revision version */; 8338 u8_t engineering /* firmware current engineering version */; 8339 #endif 8340 u32_t flags; 8341 #define FW_VERSION_OPTIMIZED (0x1<<0) /* BitField flags if set, this is optimized ASM */ 8342 #define FW_VERSION_OPTIMIZED_SHIFT 0 8343 #define FW_VERSION_BIG_ENDIEN (0x1<<1) /* BitField flags if set, this is big-endien ASM */ 8344 #define FW_VERSION_BIG_ENDIEN_SHIFT 1 8345 #define FW_VERSION_CHIP_VERSION (0x3<<2) /* BitField flags 0 - E1, 1 - E1H */ 8346 #define FW_VERSION_CHIP_VERSION_SHIFT 2 8347 #define __FW_VERSION_RESERVED (0xFFFFFFF<<4) /* BitField flags */ 8348 #define __FW_VERSION_RESERVED_SHIFT 4 8349 }; 8350 8351 8352 /* 8353 * GRE Tunnel Mode 8354 */ 8355 enum gre_tunnel_type 8356 { 8357 NVGRE_TUNNEL /* NV-GRE Tunneling Microsoft L2 over GRE. GRE header contains mandatory Key Field. */, 8358 L2GRE_TUNNEL /* L2-GRE Tunneling General L2 over GRE. GRE can contain Key field with Tenant ID and Sequence Field */, 8359 IPGRE_TUNNEL /* IP-GRE Tunneling IP over GRE. GRE may contain Key field with Tenant ID, Sequence Field and/or Checksum Field */, 8360 MAX_GRE_TUNNEL_TYPE}; 8361 8362 8363 8364 /* 8365 * Dynamic Host-Coalescing - Driver(host) counters 8366 */ 8367 struct hc_dynamic_sb_drv_counters 8368 { 8369 u32_t dynamic_hc_drv_counter[HC_SB_MAX_DYNAMIC_INDICES] /* Dynamic HC counters written by drivers */; 8370 }; 8371 8372 8373 /* 8374 * 2 bytes. configuration/state parameters for a single protocol index 8375 */ 8376 struct hc_index_data 8377 { 8378 #if defined(__BIG_ENDIAN) 8379 u8_t flags; 8380 #define HC_INDEX_DATA_SM_ID (0x1<<0) /* BitField flags Index to a state machine. Can be 0 or 1 */ 8381 #define HC_INDEX_DATA_SM_ID_SHIFT 0 8382 #define HC_INDEX_DATA_HC_ENABLED (0x1<<1) /* BitField flags if set, host coalescing would be done for this index */ 8383 #define HC_INDEX_DATA_HC_ENABLED_SHIFT 1 8384 #define HC_INDEX_DATA_DYNAMIC_HC_ENABLED (0x1<<2) /* BitField flags if set, dynamic HC will be done for this index */ 8385 #define HC_INDEX_DATA_DYNAMIC_HC_ENABLED_SHIFT 2 8386 #define HC_INDEX_DATA_RESERVE (0x1F<<3) /* BitField flags */ 8387 #define HC_INDEX_DATA_RESERVE_SHIFT 3 8388 u8_t timeout /* the timeout values for this index. Units are 4 usec */; 8389 #elif defined(__LITTLE_ENDIAN) 8390 u8_t timeout /* the timeout values for this index. Units are 4 usec */; 8391 u8_t flags; 8392 #define HC_INDEX_DATA_SM_ID (0x1<<0) /* BitField flags Index to a state machine. Can be 0 or 1 */ 8393 #define HC_INDEX_DATA_SM_ID_SHIFT 0 8394 #define HC_INDEX_DATA_HC_ENABLED (0x1<<1) /* BitField flags if set, host coalescing would be done for this index */ 8395 #define HC_INDEX_DATA_HC_ENABLED_SHIFT 1 8396 #define HC_INDEX_DATA_DYNAMIC_HC_ENABLED (0x1<<2) /* BitField flags if set, dynamic HC will be done for this index */ 8397 #define HC_INDEX_DATA_DYNAMIC_HC_ENABLED_SHIFT 2 8398 #define HC_INDEX_DATA_RESERVE (0x1F<<3) /* BitField flags */ 8399 #define HC_INDEX_DATA_RESERVE_SHIFT 3 8400 #endif 8401 }; 8402 8403 8404 /* 8405 * HC state-machine 8406 */ 8407 struct hc_status_block_sm 8408 { 8409 #if defined(__BIG_ENDIAN) 8410 u8_t igu_seg_id; 8411 u8_t igu_sb_id /* sb_id within the IGU */; 8412 u8_t timer_value /* Determines the time_to_expire */; 8413 u8_t __flags; 8414 #elif defined(__LITTLE_ENDIAN) 8415 u8_t __flags; 8416 u8_t timer_value /* Determines the time_to_expire */; 8417 u8_t igu_sb_id /* sb_id within the IGU */; 8418 u8_t igu_seg_id; 8419 #endif 8420 u32_t time_to_expire /* The time in which it expects to wake up */; 8421 }; 8422 8423 /* 8424 * hold PCI identification variables- used in various places in firmware 8425 */ 8426 struct pci_entity 8427 { 8428 #if defined(__BIG_ENDIAN) 8429 u8_t vf_valid /* If set, this is a VF, otherwise it is PF */; 8430 u8_t vf_id /* VF ID (0-63). Value of 0xFF means VF not valid */; 8431 u8_t vnic_id /* Virtual NIC ID (0-3) */; 8432 u8_t pf_id /* PCI physical function number (0-7). The LSB of this field is the port ID */; 8433 #elif defined(__LITTLE_ENDIAN) 8434 u8_t pf_id /* PCI physical function number (0-7). The LSB of this field is the port ID */; 8435 u8_t vnic_id /* Virtual NIC ID (0-3) */; 8436 u8_t vf_id /* VF ID (0-63). Value of 0xFF means VF not valid */; 8437 u8_t vf_valid /* If set, this is a VF, otherwise it is PF */; 8438 #endif 8439 }; 8440 8441 /* 8442 * The fast-path status block meta-data, common to all chips 8443 */ 8444 struct hc_sb_data 8445 { 8446 struct regpair_native_t host_sb_addr /* Host status block address */; 8447 struct hc_status_block_sm state_machine[HC_SB_MAX_SM] /* Holds the state machines of the status block */; 8448 struct pci_entity p_func /* vnic / port of the status block to be set by the driver */; 8449 #if defined(__BIG_ENDIAN) 8450 u8_t rsrv0; 8451 u8_t state; 8452 u8_t dhc_qzone_id /* used in E2 only, to specify the HW queue zone ID used for this status block dynamic HC counters */; 8453 u8_t same_igu_sb_1b /* Indicate that both state-machines acts like single sm */; 8454 #elif defined(__LITTLE_ENDIAN) 8455 u8_t same_igu_sb_1b /* Indicate that both state-machines acts like single sm */; 8456 u8_t dhc_qzone_id /* used in E2 only, to specify the HW queue zone ID used for this status block dynamic HC counters */; 8457 u8_t state; 8458 u8_t rsrv0; 8459 #endif 8460 struct regpair_native_t rsrv1[2]; 8461 }; 8462 8463 8464 /* 8465 * Segment types for host coaslescing 8466 */ 8467 enum hc_segment 8468 { 8469 HC_REGULAR_SEGMENT, 8470 HC_DEFAULT_SEGMENT, 8471 MAX_HC_SEGMENT}; 8472 8473 8474 8475 /* 8476 * The fast-path status block meta-data 8477 */ 8478 struct hc_sp_status_block_data 8479 { 8480 struct regpair_native_t host_sb_addr /* Host status block address */; 8481 #if defined(__BIG_ENDIAN) 8482 u8_t rsrv1; 8483 u8_t state; 8484 u8_t igu_seg_id /* segment id of the IGU */; 8485 u8_t igu_sb_id /* sb_id within the IGU */; 8486 #elif defined(__LITTLE_ENDIAN) 8487 u8_t igu_sb_id /* sb_id within the IGU */; 8488 u8_t igu_seg_id /* segment id of the IGU */; 8489 u8_t state; 8490 u8_t rsrv1; 8491 #endif 8492 struct pci_entity p_func /* vnic / port of the status block to be set by the driver */; 8493 }; 8494 8495 8496 /* 8497 * The fast-path status block meta-data 8498 */ 8499 struct hc_status_block_data_e1x 8500 { 8501 struct hc_index_data index_data[HC_SB_MAX_INDICES_E1X] /* configuration/state parameters for a single protocol index */; 8502 struct hc_sb_data common /* The fast-path status block meta-data, common to all chips */; 8503 }; 8504 8505 8506 /* 8507 * The fast-path status block meta-data 8508 */ 8509 struct hc_status_block_data_e2 8510 { 8511 struct hc_index_data index_data[HC_SB_MAX_INDICES_E2] /* configuration/state parameters for a single protocol index */; 8512 struct hc_sb_data common /* The fast-path status block meta-data, common to all chips */; 8513 }; 8514 8515 8516 8517 8518 8519 /* 8520 * IGU block operartion modes (in Everest2) 8521 */ 8522 enum igu_mode 8523 { 8524 HC_IGU_BC_MODE /* Backward compatible mode */, 8525 HC_IGU_NBC_MODE /* Non-backward compatible mode */, 8526 MAX_IGU_MODE}; 8527 8528 8529 /* 8530 * IP versions 8531 */ 8532 enum ip_ver 8533 { 8534 IP_V4, 8535 IP_V6, 8536 MAX_IP_VER}; 8537 8538 8539 /* 8540 * Malicious VF error ID 8541 */ 8542 enum malicious_vf_error_id 8543 { 8544 MALICIOUS_VF_NO_ERROR /* Zero placeholder value */, 8545 VF_PF_CHANNEL_NOT_READY /* Writing to VF/PF channel when it is not ready */, 8546 ETH_ILLEGAL_BD_LENGTHS /* TX BD lengths error was detected */, 8547 ETH_PACKET_TOO_SHORT /* TX packet is shorter then reported on BDs */, 8548 ETH_PAYLOAD_TOO_BIG /* TX packet is greater then MTU */, 8549 ETH_ILLEGAL_ETH_TYPE /* TX packet reported without VLAN but eth type is 0x8100 */, 8550 ETH_ILLEGAL_LSO_HDR_LEN /* LSO header length on BDs and on hdr_nbd do not match */, 8551 ETH_TOO_MANY_BDS /* Tx packet has too many BDs */, 8552 ETH_ZERO_HDR_NBDS /* hdr_nbds field is zero */, 8553 ETH_START_BD_NOT_SET /* start_bd should be set on first TX BD in packet */, 8554 ETH_ILLEGAL_PARSE_NBDS /* Tx packet with parse_nbds field which is not legal */, 8555 ETH_IPV6_AND_CHECKSUM /* Tx packet with IP checksum on IPv6 */, 8556 ETH_VLAN_FLG_INCORRECT /* Tx packet with incorrect VLAN flag */, 8557 ETH_ILLEGAL_LSO_MSS /* Tx LSO packet with illegal MSS value */, 8558 ETH_TUNNEL_NOT_SUPPORTED /* Tunneling packets are not supported in current connection */, 8559 MAX_MALICIOUS_VF_ERROR_ID}; 8560 8561 8562 8563 /* 8564 * Multi-function modes 8565 */ 8566 enum mf_mode 8567 { 8568 SINGLE_FUNCTION, 8569 MULTI_FUNCTION_SD /* Switch dependent (vlan based) */, 8570 MULTI_FUNCTION_SI /* Switch independent (mac based) */, 8571 MULTI_FUNCTION_AFEX /* Switch dependent (niv based) */, 8572 MAX_MF_MODE}; 8573 8574 8575 8576 8577 /* 8578 * Protocol-common statistics collected by the Tstorm (per pf) $$KEEP_ENDIANNESS$$ 8579 */ 8580 struct tstorm_per_pf_stats 8581 { 8582 struct regpair_t rcv_error_bytes /* number of bytes received with errors */; 8583 }; 8584 8585 /* 8586 * $$KEEP_ENDIANNESS$$ 8587 */ 8588 struct per_pf_stats 8589 { 8590 struct tstorm_per_pf_stats tstorm_pf_statistics; 8591 }; 8592 8593 8594 /* 8595 * Protocol-common statistics collected by the Tstorm (per port) $$KEEP_ENDIANNESS$$ 8596 */ 8597 struct tstorm_per_port_stats 8598 { 8599 u32_t mac_discard /* number of packets with mac errors */; 8600 u32_t mac_filter_discard /* the number of good frames dropped because of no perfect match to MAC/VLAN address */; 8601 u32_t brb_truncate_discard /* the number of packtes that were dropped because they were truncated in BRB */; 8602 u32_t mf_tag_discard /* the number of good frames dropped because of no match to the outer vlan/VNtag */; 8603 u32_t packet_drop /* general packet drop conter- incremented for every packet drop */; 8604 u32_t reserved; 8605 }; 8606 8607 /* 8608 * $$KEEP_ENDIANNESS$$ 8609 */ 8610 struct per_port_stats 8611 { 8612 struct tstorm_per_port_stats tstorm_port_statistics; 8613 }; 8614 8615 8616 /* 8617 * Protocol-common statistics collected by the Tstorm (per client) $$KEEP_ENDIANNESS$$ 8618 */ 8619 struct tstorm_per_queue_stats 8620 { 8621 struct regpair_t rcv_ucast_bytes /* number of bytes in unicast packets received without errors and pass the filter */; 8622 u32_t rcv_ucast_pkts /* number of unicast packets received without errors and pass the filter */; 8623 u32_t checksum_discard /* number of total packets received with checksum error */; 8624 struct regpair_t rcv_bcast_bytes /* number of bytes in broadcast packets received without errors and pass the filter */; 8625 u32_t rcv_bcast_pkts /* number of packets in broadcast packets received without errors and pass the filter */; 8626 u32_t pkts_too_big_discard /* number of too long packets received */; 8627 struct regpair_t rcv_mcast_bytes /* number of bytes in multicast packets received without errors and pass the filter */; 8628 u32_t rcv_mcast_pkts /* number of packets in multicast packets received without errors and pass the filter */; 8629 u32_t ttl0_discard /* the number of good frames dropped because of TTL=0 */; 8630 u16_t no_buff_discard; 8631 u16_t reserved0; 8632 u32_t reserved1; 8633 }; 8634 8635 /* 8636 * Protocol-common statistics collected by the Ustorm (per client) $$KEEP_ENDIANNESS$$ 8637 */ 8638 struct ustorm_per_queue_stats 8639 { 8640 struct regpair_t ucast_no_buff_bytes /* the number of unicast bytes received from network dropped because of no buffer at host */; 8641 struct regpair_t mcast_no_buff_bytes /* the number of multicast bytes received from network dropped because of no buffer at host */; 8642 struct regpair_t bcast_no_buff_bytes /* the number of broadcast bytes received from network dropped because of no buffer at host */; 8643 u32_t ucast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 8644 u32_t mcast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 8645 u32_t bcast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 8646 u32_t coalesced_pkts /* the number of packets coalesced in all aggregations */; 8647 struct regpair_t coalesced_bytes /* the number of bytes coalesced in all aggregations */; 8648 u32_t coalesced_events /* the number of aggregations */; 8649 u32_t coalesced_aborts /* the number of exception which avoid aggregation */; 8650 }; 8651 8652 /* 8653 * Protocol-common statistics collected by the Xstorm (per client) $$KEEP_ENDIANNESS$$ 8654 */ 8655 struct xstorm_per_queue_stats 8656 { 8657 struct regpair_t ucast_bytes_sent /* number of total bytes sent without errors */; 8658 struct regpair_t mcast_bytes_sent /* number of total bytes sent without errors */; 8659 struct regpair_t bcast_bytes_sent /* number of total bytes sent without errors */; 8660 u32_t ucast_pkts_sent /* number of total packets sent without errors */; 8661 u32_t mcast_pkts_sent /* number of total packets sent without errors */; 8662 u32_t bcast_pkts_sent /* number of total packets sent without errors */; 8663 u32_t error_drop_pkts /* number of total packets drooped due to errors */; 8664 }; 8665 8666 /* 8667 * $$KEEP_ENDIANNESS$$ 8668 */ 8669 struct per_queue_stats 8670 { 8671 struct tstorm_per_queue_stats tstorm_queue_statistics; 8672 struct ustorm_per_queue_stats ustorm_queue_statistics; 8673 struct xstorm_per_queue_stats xstorm_queue_statistics; 8674 }; 8675 8676 8677 /* 8678 * FW version stored in first line of pram $$KEEP_ENDIANNESS$$ 8679 */ 8680 struct pram_fw_version 8681 { 8682 u8_t major /* firmware current major version */; 8683 u8_t minor /* firmware current minor version */; 8684 u8_t revision /* firmware current revision version */; 8685 u8_t engineering /* firmware current engineering version */; 8686 u8_t flags; 8687 #define PRAM_FW_VERSION_OPTIMIZED (0x1<<0) /* BitField flags if set, this is optimized ASM */ 8688 #define PRAM_FW_VERSION_OPTIMIZED_SHIFT 0 8689 #define PRAM_FW_VERSION_STORM_ID (0x3<<1) /* BitField flags storm_id identification */ 8690 #define PRAM_FW_VERSION_STORM_ID_SHIFT 1 8691 #define PRAM_FW_VERSION_BIG_ENDIEN (0x1<<3) /* BitField flags if set, this is big-endien ASM */ 8692 #define PRAM_FW_VERSION_BIG_ENDIEN_SHIFT 3 8693 #define PRAM_FW_VERSION_CHIP_VERSION (0x3<<4) /* BitField flags 0 - E1, 1 - E1H */ 8694 #define PRAM_FW_VERSION_CHIP_VERSION_SHIFT 4 8695 #define __PRAM_FW_VERSION_RESERVED0 (0x3<<6) /* BitField flags */ 8696 #define __PRAM_FW_VERSION_RESERVED0_SHIFT 6 8697 }; 8698 8699 8700 8701 /* 8702 * Ethernet slow path element 8703 */ 8704 union protocol_common_specific_data 8705 { 8706 u8_t protocol_data[8] /* to fix this structure size to 8 bytes */; 8707 struct regpair_t phy_address /* SPE physical address */; 8708 struct regpair_t mac_config_addr /* physical address of the MAC configuration command, as allocated by the driver */; 8709 struct afex_vif_list_ramrod_data afex_vif_list_data /* The data afex vif list ramrod need */; 8710 }; 8711 8712 /* 8713 * The send queue element 8714 */ 8715 struct protocol_common_spe 8716 { 8717 struct spe_hdr_t hdr /* SPE header */; 8718 union protocol_common_specific_data data /* data specific to common protocol */; 8719 }; 8720 8721 8722 8723 8724 8725 8726 8727 8728 /* 8729 * The data for the Set Timesync Ramrod $$KEEP_ENDIANNESS$$ 8730 */ 8731 struct set_timesync_ramrod_data 8732 { 8733 u8_t drift_adjust_cmd /* Timesync Drift Adjust Command */; 8734 u8_t offset_cmd /* Timesync Offset Command */; 8735 u8_t add_sub_drift_adjust_value /* Whether to add(1)/subtract(0) Drift Adjust Value from the Offset */; 8736 u8_t drift_adjust_value /* Drift Adjust Value (in ns) */; 8737 u32_t drift_adjust_period /* Drift Adjust Period (in us) */; 8738 struct regpair_t offset_delta /* Timesync Offset Delta (in ns) */; 8739 }; 8740 8741 8742 /* 8743 * The send queue element 8744 */ 8745 struct slow_path_element 8746 { 8747 struct spe_hdr_t hdr /* common data for all protocols */; 8748 struct regpair_t protocol_data /* additional data specific to the protocol */; 8749 }; 8750 8751 8752 8753 /* 8754 * Protocol-common statistics counter $$KEEP_ENDIANNESS$$ 8755 */ 8756 struct stats_counter 8757 { 8758 u16_t xstats_counter /* xstorm statistics counter */; 8759 u16_t reserved0; 8760 u32_t reserved1; 8761 u16_t tstats_counter /* tstorm statistics counter */; 8762 u16_t reserved2; 8763 u32_t reserved3; 8764 u16_t ustats_counter /* ustorm statistics counter */; 8765 u16_t reserved4; 8766 u32_t reserved5; 8767 u16_t cstats_counter /* ustorm statistics counter */; 8768 u16_t reserved6; 8769 u32_t reserved7; 8770 }; 8771 8772 8773 /* 8774 * $$KEEP_ENDIANNESS$$ 8775 */ 8776 struct stats_query_entry 8777 { 8778 u8_t kind; 8779 u8_t index /* queue index */; 8780 u16_t funcID /* the func the statistic will send to */; 8781 u32_t reserved; 8782 struct regpair_t address /* pxp address */; 8783 }; 8784 8785 /* 8786 * statistic command $$KEEP_ENDIANNESS$$ 8787 */ 8788 struct stats_query_cmd_group 8789 { 8790 struct stats_query_entry query[STATS_QUERY_CMD_COUNT]; 8791 }; 8792 8793 8794 8795 /* 8796 * statistic command header $$KEEP_ENDIANNESS$$ 8797 */ 8798 struct stats_query_header 8799 { 8800 u8_t cmd_num /* command number */; 8801 u8_t reserved0; 8802 u16_t drv_stats_counter; 8803 u32_t reserved1; 8804 struct regpair_t stats_counters_addrs /* stats counter */; 8805 }; 8806 8807 8808 /* 8809 * Types of statistcis query entry 8810 */ 8811 enum stats_query_type 8812 { 8813 STATS_TYPE_QUEUE, 8814 STATS_TYPE_PORT, 8815 STATS_TYPE_PF, 8816 STATS_TYPE_TOE, 8817 STATS_TYPE_FCOE, 8818 MAX_STATS_QUERY_TYPE}; 8819 8820 8821 /* 8822 * Indicate of the function status block state 8823 */ 8824 enum status_block_state 8825 { 8826 SB_DISABLED, 8827 SB_ENABLED, 8828 SB_CLEANED, 8829 MAX_STATUS_BLOCK_STATE}; 8830 8831 8832 /* 8833 * Storm IDs (including attentions for IGU related enums) 8834 */ 8835 enum storm_id 8836 { 8837 USTORM_ID, 8838 CSTORM_ID, 8839 XSTORM_ID, 8840 TSTORM_ID, 8841 ATTENTION_ID, 8842 MAX_STORM_ID}; 8843 8844 8845 /* 8846 * Taffic types used in ETS and flow control algorithms 8847 */ 8848 enum traffic_type 8849 { 8850 LLFC_TRAFFIC_TYPE_NW /* Networking */, 8851 LLFC_TRAFFIC_TYPE_FCOE /* FCoE */, 8852 LLFC_TRAFFIC_TYPE_ISCSI /* iSCSI */, 8853 MAX_TRAFFIC_TYPE}; 8854 8855 8856 8857 8858 8859 8860 /* 8861 * zone A per-queue data 8862 */ 8863 struct tstorm_queue_zone_data 8864 { 8865 struct regpair_t reserved[4]; 8866 }; 8867 8868 8869 /* 8870 * zone B per-VF data 8871 */ 8872 struct tstorm_vf_zone_data 8873 { 8874 struct regpair_t reserved; 8875 }; 8876 8877 8878 /* 8879 * Add or Subtract Value for Set Timesync Ramrod 8880 */ 8881 enum ts_add_sub_value 8882 { 8883 TS_SUB_VALUE /* Subtract Value */, 8884 TS_ADD_VALUE /* Add Value */, 8885 MAX_TS_ADD_SUB_VALUE}; 8886 8887 8888 /* 8889 * Drift-Adjust Commands for Set Timesync Ramrod 8890 */ 8891 enum ts_drift_adjust_cmd 8892 { 8893 TS_DRIFT_ADJUST_KEEP /* Keep Drift-Adjust at current values */, 8894 TS_DRIFT_ADJUST_SET /* Set Drift-Adjust */, 8895 TS_DRIFT_ADJUST_RESET /* Reset Drift-Adjust */, 8896 MAX_TS_DRIFT_ADJUST_CMD}; 8897 8898 8899 /* 8900 * Offset Commands for Set Timesync Ramrod 8901 */ 8902 enum ts_offset_cmd 8903 { 8904 TS_OFFSET_KEEP /* Keep Offset at current values */, 8905 TS_OFFSET_INC /* Increase Offset by Offset Delta */, 8906 TS_OFFSET_DEC /* Decrease Offset by Offset Delta */, 8907 MAX_TS_OFFSET_CMD}; 8908 8909 8910 /* 8911 * Tunnel Mode 8912 */ 8913 enum tunnel_mode 8914 { 8915 TUNN_MODE_NONE /* No tunnel */, 8916 TUNN_MODE_VXLAN /* VXLAN tunnel */, 8917 TUNN_MODE_GRE /* GRE tunnel */, 8918 MAX_TUNNEL_MODE}; 8919 8920 8921 /* 8922 * Input for measuring Pci Latency 8923 */ 8924 struct t_measure_pci_latency_ctrl 8925 { 8926 struct regpair_t read_addr /* Address to read from */; 8927 #if defined(__BIG_ENDIAN) 8928 u8_t sleep /* Measure including a thread sleep */; 8929 u8_t enable /* Enable PCI Latency measurements */; 8930 u8_t func_id /* Function ID */; 8931 u8_t read_size /* Amount of bytes to read */; 8932 #elif defined(__LITTLE_ENDIAN) 8933 u8_t read_size /* Amount of bytes to read */; 8934 u8_t func_id /* Function ID */; 8935 u8_t enable /* Enable PCI Latency measurements */; 8936 u8_t sleep /* Measure including a thread sleep */; 8937 #endif 8938 #if defined(__BIG_ENDIAN) 8939 u16_t num_meas /* Number of measurements to make */; 8940 u8_t reserved; 8941 u8_t period_10us /* Number of 10s of microseconds to wait between measurements */; 8942 #elif defined(__LITTLE_ENDIAN) 8943 u8_t period_10us /* Number of 10s of microseconds to wait between measurements */; 8944 u8_t reserved; 8945 u16_t num_meas /* Number of measurements to make */; 8946 #endif 8947 }; 8948 8949 8950 /* 8951 * Input for measuring Pci Latency 8952 */ 8953 struct t_measure_pci_latency_data 8954 { 8955 #if defined(__BIG_ENDIAN) 8956 u16_t max_time_ns /* Maximum Time for a read (in ns) */; 8957 u16_t min_time_ns /* Minimum Time for a read (in ns) */; 8958 #elif defined(__LITTLE_ENDIAN) 8959 u16_t min_time_ns /* Minimum Time for a read (in ns) */; 8960 u16_t max_time_ns /* Maximum Time for a read (in ns) */; 8961 #endif 8962 #if defined(__BIG_ENDIAN) 8963 u16_t reserved; 8964 u16_t num_reads /* Number of reads - Used for Average */; 8965 #elif defined(__LITTLE_ENDIAN) 8966 u16_t num_reads /* Number of reads - Used for Average */; 8967 u16_t reserved; 8968 #endif 8969 struct regpair_t sum_time_ns /* Sum of all the reads (in ns) - Used for Average */; 8970 }; 8971 8972 8973 8974 /* 8975 * zone A per-queue data 8976 */ 8977 struct ustorm_queue_zone_data 8978 { 8979 struct ustorm_eth_rx_producers eth_rx_producers /* ETH RX rings producers */; 8980 struct regpair_t reserved[3]; 8981 }; 8982 8983 8984 /* 8985 * zone B per-VF data 8986 */ 8987 struct ustorm_vf_zone_data 8988 { 8989 struct regpair_t reserved; 8990 }; 8991 8992 8993 8994 /* 8995 * data per VF-PF channel 8996 */ 8997 struct vf_pf_channel_data 8998 { 8999 #if defined(__BIG_ENDIAN) 9000 u16_t reserved0; 9001 u8_t valid /* flag for channel validity. (cleared when identify a VF as malicious) */; 9002 u8_t state /* channel state (ready / waiting for ack) */; 9003 #elif defined(__LITTLE_ENDIAN) 9004 u8_t state /* channel state (ready / waiting for ack) */; 9005 u8_t valid /* flag for channel validity. (cleared when identify a VF as malicious) */; 9006 u16_t reserved0; 9007 #endif 9008 u32_t reserved1; 9009 }; 9010 9011 9012 /* 9013 * State of VF-PF channel 9014 */ 9015 enum vf_pf_channel_state 9016 { 9017 VF_PF_CHANNEL_STATE_READY /* Channel is ready to accept a message from VF */, 9018 VF_PF_CHANNEL_STATE_WAITING_FOR_ACK /* Channel waits for an ACK from PF */, 9019 MAX_VF_PF_CHANNEL_STATE}; 9020 9021 9022 9023 9024 9025 9026 /* 9027 * vif_list_rule_kind 9028 */ 9029 enum vif_list_rule_kind 9030 { 9031 VIF_LIST_RULE_SET, 9032 VIF_LIST_RULE_GET, 9033 VIF_LIST_RULE_CLEAR_ALL, 9034 VIF_LIST_RULE_CLEAR_FUNC, 9035 MAX_VIF_LIST_RULE_KIND}; 9036 9037 9038 9039 /* 9040 * zone A per-queue data 9041 */ 9042 struct xstorm_queue_zone_data 9043 { 9044 struct regpair_t reserved[4]; 9045 }; 9046 9047 9048 /* 9049 * zone B per-VF data 9050 */ 9051 struct xstorm_vf_zone_data 9052 { 9053 struct regpair_t reserved; 9054 }; 9055 9056 9057 /* 9058 * Out-of-order states 9059 */ 9060 enum tcp_ooo_event 9061 { 9062 TCP_EVENT_ADD_PEN=0, 9063 TCP_EVENT_ADD_NEW_ISLE=1, 9064 TCP_EVENT_ADD_ISLE_RIGHT=2, 9065 TCP_EVENT_ADD_ISLE_LEFT=3, 9066 TCP_EVENT_JOIN=4, 9067 TCP_EVENT_NOP=5, 9068 MAX_TCP_OOO_EVENT}; 9069 9070 9071 /* 9072 * OOO support modes 9073 */ 9074 enum tcp_tstorm_ooo 9075 { 9076 TCP_TSTORM_OOO_DROP_AND_PROC_ACK, 9077 TCP_TSTORM_OOO_SEND_PURE_ACK, 9078 TCP_TSTORM_OOO_SUPPORTED, 9079 MAX_TCP_TSTORM_OOO}; 9080 9081 9082 9083 9084 9085 9086 9087 9088 9089 9090 /* 9091 * toe statistics collected by the Cstorm (per port) 9092 */ 9093 struct cstorm_toe_stats 9094 { 9095 u32_t no_tx_cqes /* count the number of time storm find that there are no more CQEs */; 9096 u32_t reserved; 9097 }; 9098 9099 9100 /* 9101 * The toe storm context of Cstorm 9102 */ 9103 struct cstorm_toe_st_context 9104 { 9105 u32_t bds_ring_page_base_addr_lo /* Base address of next page in host bds ring */; 9106 u32_t bds_ring_page_base_addr_hi /* Base address of next page in host bds ring */; 9107 u32_t free_seq /* Sequnce number of the last byte that was free including */; 9108 u32_t __last_rel_to_notify /* Accumulated release size for the next Chimney completion msg */; 9109 #if defined(__BIG_ENDIAN) 9110 u16_t __rss_params_ram_line /* The ram line containing the rss params */; 9111 u16_t bd_cons /* The bd s ring consumer */; 9112 #elif defined(__LITTLE_ENDIAN) 9113 u16_t bd_cons /* The bd s ring consumer */; 9114 u16_t __rss_params_ram_line /* The ram line containing the rss params */; 9115 #endif 9116 u32_t cpu_id /* CPU id for sending completion for TSS (only 8 bits are used) */; 9117 u32_t prev_snd_max /* last snd_max that was used for dynamic HC producer update */; 9118 u32_t __reserved4 /* reserved */; 9119 }; 9120 9121 /* 9122 * Cstorm Toe Storm Aligned Context 9123 */ 9124 struct cstorm_toe_st_aligned_context 9125 { 9126 struct cstorm_toe_st_context context /* context */; 9127 }; 9128 9129 9130 9131 /* 9132 * prefetched isle bd 9133 */ 9134 struct ustorm_toe_prefetched_isle_bd 9135 { 9136 u32_t __addr_lo /* receive payload base address - Single continuous buffer (page) pointer */; 9137 u32_t __addr_hi /* receive payload base address - Single continuous buffer (page) pointer */; 9138 #if defined(__BIG_ENDIAN) 9139 u8_t __reserved1 /* reserved */; 9140 u8_t __isle_num /* isle_number of the pre-fetched BD */; 9141 u16_t __buf_un_used /* Number of bytes left for placement in the pre fetched application/grq bd 0 size for buffer is not valid */; 9142 #elif defined(__LITTLE_ENDIAN) 9143 u16_t __buf_un_used /* Number of bytes left for placement in the pre fetched application/grq bd 0 size for buffer is not valid */; 9144 u8_t __isle_num /* isle_number of the pre-fetched BD */; 9145 u8_t __reserved1 /* reserved */; 9146 #endif 9147 }; 9148 9149 /* 9150 * ring params 9151 */ 9152 struct ustorm_toe_ring_params 9153 { 9154 u32_t rq_cons_addr_lo /* A pointer to the next to consume application bd */; 9155 u32_t rq_cons_addr_hi /* A pointer to the next to consume application bd */; 9156 #if defined(__BIG_ENDIAN) 9157 u8_t __rq_local_cons /* consumer of the local rq ring */; 9158 u8_t __rq_local_prod /* producer of the local rq ring */; 9159 u16_t rq_cons /* RQ consumer is the index of the next to consume application bd */; 9160 #elif defined(__LITTLE_ENDIAN) 9161 u16_t rq_cons /* RQ consumer is the index of the next to consume application bd */; 9162 u8_t __rq_local_prod /* producer of the local rq ring */; 9163 u8_t __rq_local_cons /* consumer of the local rq ring */; 9164 #endif 9165 }; 9166 9167 /* 9168 * prefetched bd 9169 */ 9170 struct ustorm_toe_prefetched_bd 9171 { 9172 u32_t __addr_lo /* receive payload base address - Single continuous buffer (page) pointer */; 9173 u32_t __addr_hi /* receive payload base address - Single continuous buffer (page) pointer */; 9174 #if defined(__BIG_ENDIAN) 9175 u16_t flags; 9176 #define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */ 9177 #define __USTORM_TOE_PREFETCHED_BD_START_SHIFT 0 9178 #define __USTORM_TOE_PREFETCHED_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */ 9179 #define __USTORM_TOE_PREFETCHED_BD_END_SHIFT 1 9180 #define __USTORM_TOE_PREFETCHED_BD_NO_PUSH (0x1<<2) /* BitField flagsbd command flags this application buffer must not be partially completed */ 9181 #define __USTORM_TOE_PREFETCHED_BD_NO_PUSH_SHIFT 2 9182 #define USTORM_TOE_PREFETCHED_BD_SPLIT (0x1<<3) /* BitField flagsbd command flags this application buffer is part of a bigger buffer and this buffer is not the last */ 9183 #define USTORM_TOE_PREFETCHED_BD_SPLIT_SHIFT 3 9184 #define __USTORM_TOE_PREFETCHED_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9185 #define __USTORM_TOE_PREFETCHED_BD_RESERVED1_SHIFT 4 9186 u16_t __buf_un_used /* Number of bytes left for placement in the pre fetched application/grq bd 0 size for buffer is not valid */; 9187 #elif defined(__LITTLE_ENDIAN) 9188 u16_t __buf_un_used /* Number of bytes left for placement in the pre fetched application/grq bd 0 size for buffer is not valid */; 9189 u16_t flags; 9190 #define __USTORM_TOE_PREFETCHED_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */ 9191 #define __USTORM_TOE_PREFETCHED_BD_START_SHIFT 0 9192 #define __USTORM_TOE_PREFETCHED_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */ 9193 #define __USTORM_TOE_PREFETCHED_BD_END_SHIFT 1 9194 #define __USTORM_TOE_PREFETCHED_BD_NO_PUSH (0x1<<2) /* BitField flagsbd command flags this application buffer must not be partially completed */ 9195 #define __USTORM_TOE_PREFETCHED_BD_NO_PUSH_SHIFT 2 9196 #define USTORM_TOE_PREFETCHED_BD_SPLIT (0x1<<3) /* BitField flagsbd command flags this application buffer is part of a bigger buffer and this buffer is not the last */ 9197 #define USTORM_TOE_PREFETCHED_BD_SPLIT_SHIFT 3 9198 #define __USTORM_TOE_PREFETCHED_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9199 #define __USTORM_TOE_PREFETCHED_BD_RESERVED1_SHIFT 4 9200 #endif 9201 }; 9202 9203 /* 9204 * Ustorm Toe Storm Context 9205 */ 9206 struct ustorm_toe_st_context 9207 { 9208 u32_t __pen_rq_placed /* Number of bytes that were placed in the RQ and not completed yet. */; 9209 u32_t pen_grq_placed_bytes /* The number of in-order bytes (peninsula) that were placed in the GRQ (excluding bytes that were already copied to RQ BDs or RQ dummy BDs) */; 9210 #if defined(__BIG_ENDIAN) 9211 u8_t flags2; 9212 #define USTORM_TOE_ST_CONTEXT_IGNORE_GRQ_PUSH (0x1<<0) /* BitField flags2various state flags we will ignore grq push unless it is ping pong test */ 9213 #define USTORM_TOE_ST_CONTEXT_IGNORE_GRQ_PUSH_SHIFT 0 9214 #define USTORM_TOE_ST_CONTEXT_PUSH_FLAG (0x1<<1) /* BitField flags2various state flags indicates if push timer is set */ 9215 #define USTORM_TOE_ST_CONTEXT_PUSH_FLAG_SHIFT 1 9216 #define USTORM_TOE_ST_CONTEXT_RSS_UPDATE_ENABLED (0x1<<2) /* BitField flags2various state flags indicates if RSS update is supported */ 9217 #define USTORM_TOE_ST_CONTEXT_RSS_UPDATE_ENABLED_SHIFT 2 9218 #define USTORM_TOE_ST_CONTEXT_RESERVED0 (0x1F<<3) /* BitField flags2various state flags */ 9219 #define USTORM_TOE_ST_CONTEXT_RESERVED0_SHIFT 3 9220 u8_t __indirection_shift /* Offset in bits of the cupid of this connection on the 64Bits fetched from internal memoy */; 9221 u16_t indirection_ram_offset /* address offset in internal memory from the begining of the table consisting the cpu id of this connection (Only 12 bits are used) */; 9222 #elif defined(__LITTLE_ENDIAN) 9223 u16_t indirection_ram_offset /* address offset in internal memory from the begining of the table consisting the cpu id of this connection (Only 12 bits are used) */; 9224 u8_t __indirection_shift /* Offset in bits of the cupid of this connection on the 64Bits fetched from internal memoy */; 9225 u8_t flags2; 9226 #define USTORM_TOE_ST_CONTEXT_IGNORE_GRQ_PUSH (0x1<<0) /* BitField flags2various state flags we will ignore grq push unless it is ping pong test */ 9227 #define USTORM_TOE_ST_CONTEXT_IGNORE_GRQ_PUSH_SHIFT 0 9228 #define USTORM_TOE_ST_CONTEXT_PUSH_FLAG (0x1<<1) /* BitField flags2various state flags indicates if push timer is set */ 9229 #define USTORM_TOE_ST_CONTEXT_PUSH_FLAG_SHIFT 1 9230 #define USTORM_TOE_ST_CONTEXT_RSS_UPDATE_ENABLED (0x1<<2) /* BitField flags2various state flags indicates if RSS update is supported */ 9231 #define USTORM_TOE_ST_CONTEXT_RSS_UPDATE_ENABLED_SHIFT 2 9232 #define USTORM_TOE_ST_CONTEXT_RESERVED0 (0x1F<<3) /* BitField flags2various state flags */ 9233 #define USTORM_TOE_ST_CONTEXT_RESERVED0_SHIFT 3 9234 #endif 9235 u32_t __rq_available_bytes; 9236 #if defined(__BIG_ENDIAN) 9237 u8_t isles_counter /* signals that dca is enabled */; 9238 u8_t __push_timer_state /* indicates if push timer is set */; 9239 u16_t rcv_indication_size /* The chip will release the current GRQ buffer to the driver when it knows that the driver has no knowledge of other GRQ payload that it can indicate and the current GRQ buffer has at least RcvIndicationSize bytes. */; 9240 #elif defined(__LITTLE_ENDIAN) 9241 u16_t rcv_indication_size /* The chip will release the current GRQ buffer to the driver when it knows that the driver has no knowledge of other GRQ payload that it can indicate and the current GRQ buffer has at least RcvIndicationSize bytes. */; 9242 u8_t __push_timer_state /* indicates if push timer is set */; 9243 u8_t isles_counter /* signals that dca is enabled */; 9244 #endif 9245 u32_t __min_expiration_time /* if the timer will expire before this time it will be considered as a race */; 9246 u32_t initial_rcv_wnd /* the maximal advertized window */; 9247 u32_t __bytes_cons /* the last rq_available_bytes producer that was read from host - used to know how many bytes were added */; 9248 u32_t __prev_consumed_grq_bytes /* the last rq_available_bytes producer that was read from host - used to know how many bytes were added */; 9249 u32_t prev_rcv_win_right_edge /* siquence of the last bytes that can be recieved - used to know how many bytes were added */; 9250 u32_t rcv_nxt /* Receive sequence: next expected - of the right most recieved packet */; 9251 struct ustorm_toe_prefetched_isle_bd __isle_bd /* prefetched bd for the isle */; 9252 struct ustorm_toe_ring_params pen_ring_params /* peninsula ring params */; 9253 struct ustorm_toe_prefetched_bd __pen_bd_0 /* peninsula prefetched bd for the peninsula */; 9254 struct ustorm_toe_prefetched_bd __pen_bd_1 /* peninsula prefetched bd for the peninsula */; 9255 struct ustorm_toe_prefetched_bd __pen_bd_2 /* peninsula prefetched bd for the peninsula */; 9256 struct ustorm_toe_prefetched_bd __pen_bd_3 /* peninsula prefetched bd for the peninsula */; 9257 struct ustorm_toe_prefetched_bd __pen_bd_4 /* peninsula prefetched bd for the peninsula */; 9258 struct ustorm_toe_prefetched_bd __pen_bd_5 /* peninsula prefetched bd for the peninsula */; 9259 struct ustorm_toe_prefetched_bd __pen_bd_6 /* peninsula prefetched bd for the peninsula */; 9260 struct ustorm_toe_prefetched_bd __pen_bd_7 /* peninsula prefetched bd for the peninsula */; 9261 struct ustorm_toe_prefetched_bd __pen_bd_8 /* peninsula prefetched bd for the peninsula */; 9262 struct ustorm_toe_prefetched_bd __pen_bd_9 /* peninsula prefetched bd for the peninsula */; 9263 u32_t __reserved3 /* reserved */; 9264 }; 9265 9266 /* 9267 * Ustorm Toe Storm Aligned Context 9268 */ 9269 struct ustorm_toe_st_aligned_context 9270 { 9271 struct ustorm_toe_st_context context /* context */; 9272 }; 9273 9274 /* 9275 * TOE context region, used only in TOE 9276 */ 9277 struct tstorm_toe_st_context_section 9278 { 9279 u32_t reserved0[3]; 9280 }; 9281 9282 /* 9283 * The TOE non-aggregative context of Tstorm 9284 */ 9285 struct tstorm_toe_st_context 9286 { 9287 struct tstorm_tcp_st_context_section tcp /* TCP context region, shared in TOE, RDMA and ISCSI */; 9288 struct tstorm_toe_st_context_section toe /* TOE context region, used only in TOE */; 9289 }; 9290 9291 /* 9292 * The TOE non-aggregative aligned context of Tstorm 9293 */ 9294 struct tstorm_toe_st_aligned_context 9295 { 9296 struct tstorm_toe_st_context context /* context */; 9297 u8_t padding[16] /* padding to 64 byte aligned */; 9298 }; 9299 9300 /* 9301 * TOE context section 9302 */ 9303 struct xstorm_toe_context_section 9304 { 9305 u32_t tx_bd_page_base_lo /* BD page base address at the host for TxBdCons */; 9306 u32_t tx_bd_page_base_hi /* BD page base address at the host for TxBdCons */; 9307 #if defined(__BIG_ENDIAN) 9308 u16_t tx_bd_offset /* The offset within the BD */; 9309 u16_t tx_bd_cons /* The transmit BD cons pointer to the host ring */; 9310 #elif defined(__LITTLE_ENDIAN) 9311 u16_t tx_bd_cons /* The transmit BD cons pointer to the host ring */; 9312 u16_t tx_bd_offset /* The offset within the BD */; 9313 #endif 9314 #if defined(__BIG_ENDIAN) 9315 u16_t bd_prod; 9316 u16_t seqMismatchCnt; 9317 #elif defined(__LITTLE_ENDIAN) 9318 u16_t seqMismatchCnt; 9319 u16_t bd_prod; 9320 #endif 9321 u32_t driver_doorbell_info_ptr_lo; 9322 u32_t driver_doorbell_info_ptr_hi; 9323 }; 9324 9325 /* 9326 * Xstorm Toe Storm Context 9327 */ 9328 struct xstorm_toe_st_context 9329 { 9330 struct xstorm_common_context_section common; 9331 struct xstorm_toe_context_section toe; 9332 }; 9333 9334 /* 9335 * Xstorm Toe Storm Aligned Context 9336 */ 9337 struct xstorm_toe_st_aligned_context 9338 { 9339 struct xstorm_toe_st_context context /* context */; 9340 }; 9341 9342 /* 9343 * Ethernet connection context 9344 */ 9345 struct toe_context 9346 { 9347 struct ustorm_toe_st_aligned_context ustorm_st_context /* Ustorm storm context */; 9348 struct tstorm_toe_st_aligned_context tstorm_st_context /* Tstorm storm context */; 9349 struct xstorm_toe_ag_context xstorm_ag_context /* Xstorm aggregative context */; 9350 struct tstorm_toe_ag_context tstorm_ag_context /* Tstorm aggregative context */; 9351 struct cstorm_toe_ag_context cstorm_ag_context /* Cstorm aggregative context */; 9352 struct ustorm_toe_ag_context ustorm_ag_context /* Ustorm aggregative context */; 9353 struct timers_block_context timers_context /* Timers block context */; 9354 struct xstorm_toe_st_aligned_context xstorm_st_context /* Xstorm storm context */; 9355 struct cstorm_toe_st_aligned_context cstorm_st_context /* Cstorm storm context */; 9356 }; 9357 9358 9359 /* 9360 * ramrod data for toe protocol initiate offload ramrod (CQE) 9361 */ 9362 struct toe_initiate_offload_ramrod_data 9363 { 9364 u32_t flags; 9365 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_SEARCH_CONFIG_FAILED (0x1<<0) /* BitField flags error in searcher configuration */ 9366 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_SEARCH_CONFIG_FAILED_SHIFT 0 9367 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_LICENSE_FAILURE (0x1<<1) /* BitField flags license errors */ 9368 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_LICENSE_FAILURE_SHIFT 1 9369 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_RESERVED0 (0x3FFFFFFF<<2) /* BitField flags */ 9370 #define TOE_INITIATE_OFFLOAD_RAMROD_DATA_RESERVED0_SHIFT 2 9371 u32_t reserved1; 9372 }; 9373 9374 9375 /* 9376 * union for ramrod data for TOE protocol (CQE) (force size of 16 bits) 9377 */ 9378 struct toe_init_ramrod_data 9379 { 9380 #if defined(__BIG_ENDIAN) 9381 u16_t reserved1; 9382 u8_t reserved0; 9383 u8_t rss_num /* the rss num in its rqr to complete this ramrod */; 9384 #elif defined(__LITTLE_ENDIAN) 9385 u8_t rss_num /* the rss num in its rqr to complete this ramrod */; 9386 u8_t reserved0; 9387 u16_t reserved1; 9388 #endif 9389 u32_t reserved2; 9390 }; 9391 9392 9393 /* 9394 * next page pointer bd used in toe CQs and tx/rx bd chains 9395 */ 9396 struct toe_page_addr_bd 9397 { 9398 u32_t addr_lo /* page pointer */; 9399 u32_t addr_hi /* page pointer */; 9400 u8_t reserved[8] /* resereved for driver use */; 9401 }; 9402 9403 9404 /* 9405 * union for ramrod data for TOE protocol (CQE) (force size of 16 bits) 9406 */ 9407 union toe_ramrod_data 9408 { 9409 struct ramrod_data general; 9410 struct toe_initiate_offload_ramrod_data initiate_offload; 9411 }; 9412 9413 9414 /* 9415 * TOE_RX_CQES_OPCODE_RSS_UPD results 9416 */ 9417 enum toe_rss_update_opcode 9418 { 9419 TOE_RSS_UPD_QUIET, 9420 TOE_RSS_UPD_SLEEPING, 9421 TOE_RSS_UPD_DELAYED, 9422 MAX_TOE_RSS_UPDATE_OPCODE}; 9423 9424 9425 /* 9426 * union for ramrod data for TOE protocol (CQE) (force size of 16 bits) 9427 */ 9428 struct toe_rss_update_ramrod_data 9429 { 9430 u8_t indirection_table[128] /* RSS indirection table */; 9431 #if defined(__BIG_ENDIAN) 9432 u16_t reserved0; 9433 u16_t toe_rss_bitmap /* The bitmap specifies which toe rss chains to complete the ramrod on (0 bitmap is not valid option). The port is gleaned from the CID */; 9434 #elif defined(__LITTLE_ENDIAN) 9435 u16_t toe_rss_bitmap /* The bitmap specifies which toe rss chains to complete the ramrod on (0 bitmap is not valid option). The port is gleaned from the CID */; 9436 u16_t reserved0; 9437 #endif 9438 u32_t reserved1; 9439 }; 9440 9441 9442 /* 9443 * The toe Rx Buffer Descriptor 9444 */ 9445 struct toe_rx_bd 9446 { 9447 u32_t addr_lo /* receive payload base address - Single continuous buffer (page) pointer */; 9448 u32_t addr_hi /* receive payload base address - Single continuous buffer (page) pointer */; 9449 #if defined(__BIG_ENDIAN) 9450 u16_t flags; 9451 #define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */ 9452 #define TOE_RX_BD_START_SHIFT 0 9453 #define TOE_RX_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */ 9454 #define TOE_RX_BD_END_SHIFT 1 9455 #define TOE_RX_BD_NO_PUSH (0x1<<2) /* BitField flagsbd command flags this application buffer must not be partially completed */ 9456 #define TOE_RX_BD_NO_PUSH_SHIFT 2 9457 #define TOE_RX_BD_SPLIT (0x1<<3) /* BitField flagsbd command flags this application buffer is part of a bigger buffer and this buffer is not the last */ 9458 #define TOE_RX_BD_SPLIT_SHIFT 3 9459 #define TOE_RX_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9460 #define TOE_RX_BD_RESERVED1_SHIFT 4 9461 u16_t size /* Size of the buffer pointed by the BD */; 9462 #elif defined(__LITTLE_ENDIAN) 9463 u16_t size /* Size of the buffer pointed by the BD */; 9464 u16_t flags; 9465 #define TOE_RX_BD_START (0x1<<0) /* BitField flagsbd command flags this bd is the begining of an application buffer */ 9466 #define TOE_RX_BD_START_SHIFT 0 9467 #define TOE_RX_BD_END (0x1<<1) /* BitField flagsbd command flags this bd is the end of an application buffer */ 9468 #define TOE_RX_BD_END_SHIFT 1 9469 #define TOE_RX_BD_NO_PUSH (0x1<<2) /* BitField flagsbd command flags this application buffer must not be partially completed */ 9470 #define TOE_RX_BD_NO_PUSH_SHIFT 2 9471 #define TOE_RX_BD_SPLIT (0x1<<3) /* BitField flagsbd command flags this application buffer is part of a bigger buffer and this buffer is not the last */ 9472 #define TOE_RX_BD_SPLIT_SHIFT 3 9473 #define TOE_RX_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9474 #define TOE_RX_BD_RESERVED1_SHIFT 4 9475 #endif 9476 u32_t dbg_bytes_prod /* a cyclic parameter that caounts how many byte were available for placement till no not including this bd */; 9477 }; 9478 9479 9480 /* 9481 * ramrod data for toe protocol General rx completion 9482 */ 9483 struct toe_rx_completion_ramrod_data 9484 { 9485 #if defined(__BIG_ENDIAN) 9486 u16_t reserved0; 9487 u16_t hash_value /* information for ustorm to use in completion */; 9488 #elif defined(__LITTLE_ENDIAN) 9489 u16_t hash_value /* information for ustorm to use in completion */; 9490 u16_t reserved0; 9491 #endif 9492 u32_t reserved1; 9493 }; 9494 9495 9496 /* 9497 * OOO params in union for TOE rx cqe data 9498 */ 9499 struct toe_rx_cqe_ooo_params 9500 { 9501 u32_t ooo_params; 9502 #define TOE_RX_CQE_OOO_PARAMS_NBYTES (0xFFFFFF<<0) /* BitField ooo_paramsdata params for OOO cqe connection nbytes */ 9503 #define TOE_RX_CQE_OOO_PARAMS_NBYTES_SHIFT 0 9504 #define TOE_RX_CQE_OOO_PARAMS_ISLE_NUM (0xFF<<24) /* BitField ooo_paramsdata params for OOO cqe isle number for OOO completions */ 9505 #define TOE_RX_CQE_OOO_PARAMS_ISLE_NUM_SHIFT 24 9506 }; 9507 9508 /* 9509 * in order params in union for TOE rx cqe data 9510 */ 9511 struct toe_rx_cqe_in_order_params 9512 { 9513 u32_t in_order_params; 9514 #define TOE_RX_CQE_IN_ORDER_PARAMS_NBYTES (0xFFFFFFFF<<0) /* BitField in_order_paramsdata params for in order cqe connection nbytes */ 9515 #define TOE_RX_CQE_IN_ORDER_PARAMS_NBYTES_SHIFT 0 9516 }; 9517 9518 /* 9519 * union for TOE rx cqe data 9520 */ 9521 union toe_rx_cqe_data_union 9522 { 9523 struct toe_rx_cqe_ooo_params ooo_params /* data params for OOO cqe - nbytes and isle number */; 9524 struct toe_rx_cqe_in_order_params in_order_params /* data params for in order cqe - nbytes */; 9525 u32_t raw_data /* global data param */; 9526 }; 9527 9528 /* 9529 * The toe Rx cq element 9530 */ 9531 struct toe_rx_cqe 9532 { 9533 u32_t params1; 9534 #define TOE_RX_CQE_CID (0xFFFFFF<<0) /* BitField params1completion cid and opcode connection id */ 9535 #define TOE_RX_CQE_CID_SHIFT 0 9536 #define TOE_RX_CQE_COMPLETION_OPCODE (0xFF<<24) /* BitField params1completion cid and opcode completion opcode - use enum toe_rx_cqe_type or toe_rss_update_opcode */ 9537 #define TOE_RX_CQE_COMPLETION_OPCODE_SHIFT 24 9538 union toe_rx_cqe_data_union data /* completion cid and opcode */; 9539 }; 9540 9541 9542 9543 9544 9545 /* 9546 * toe rx doorbell data in host memory 9547 */ 9548 struct toe_rx_db_data 9549 { 9550 u32_t rcv_win_right_edge /* siquence of the last bytes that can be recieved */; 9551 u32_t bytes_prod /* cyclic counter of posted bytes */; 9552 #if defined(__BIG_ENDIAN) 9553 u8_t reserved1 /* reserved */; 9554 u8_t flags; 9555 #define TOE_RX_DB_DATA_IGNORE_WND_UPDATES (0x1<<0) /* BitField flags ustorm ignores window updates when this flag is set */ 9556 #define TOE_RX_DB_DATA_IGNORE_WND_UPDATES_SHIFT 0 9557 #define TOE_RX_DB_DATA_PARTIAL_FILLED_BUF (0x1<<1) /* BitField flags indicates if to set push timer due to partially filled receive request after offload */ 9558 #define TOE_RX_DB_DATA_PARTIAL_FILLED_BUF_SHIFT 1 9559 #define TOE_RX_DB_DATA_RESERVED0 (0x3F<<2) /* BitField flags */ 9560 #define TOE_RX_DB_DATA_RESERVED0_SHIFT 2 9561 u16_t bds_prod /* cyclic counter of bds to post */; 9562 #elif defined(__LITTLE_ENDIAN) 9563 u16_t bds_prod /* cyclic counter of bds to post */; 9564 u8_t flags; 9565 #define TOE_RX_DB_DATA_IGNORE_WND_UPDATES (0x1<<0) /* BitField flags ustorm ignores window updates when this flag is set */ 9566 #define TOE_RX_DB_DATA_IGNORE_WND_UPDATES_SHIFT 0 9567 #define TOE_RX_DB_DATA_PARTIAL_FILLED_BUF (0x1<<1) /* BitField flags indicates if to set push timer due to partially filled receive request after offload */ 9568 #define TOE_RX_DB_DATA_PARTIAL_FILLED_BUF_SHIFT 1 9569 #define TOE_RX_DB_DATA_RESERVED0 (0x3F<<2) /* BitField flags */ 9570 #define TOE_RX_DB_DATA_RESERVED0_SHIFT 2 9571 u8_t reserved1 /* reserved */; 9572 #endif 9573 u32_t consumed_grq_bytes /* cyclic counter of consumed grq bytes */; 9574 }; 9575 9576 9577 /* 9578 * The toe Rx Generic Buffer Descriptor 9579 */ 9580 struct toe_rx_grq_bd 9581 { 9582 u32_t addr_lo /* receive payload base address - Single continuous buffer (page) pointer */; 9583 u32_t addr_hi /* receive payload base address - Single continuous buffer (page) pointer */; 9584 }; 9585 9586 9587 /* 9588 * toe slow path element 9589 */ 9590 union toe_spe_data 9591 { 9592 u8_t protocol_data[8] /* to fix this structure size to 8 bytes */; 9593 struct regpair_t phys_addr /* used in initiate offload ramrod */; 9594 struct toe_rx_completion_ramrod_data rx_completion /* used in all ramrods that have a general rx completion */; 9595 struct toe_init_ramrod_data toe_init /* used in toe init ramrod */; 9596 }; 9597 9598 /* 9599 * toe slow path element 9600 */ 9601 struct toe_spe 9602 { 9603 struct spe_hdr_t hdr /* common data for all protocols */; 9604 union toe_spe_data toe_data /* data specific to toe protocol */; 9605 }; 9606 9607 9608 9609 /* 9610 * TOE slow path opcodes (opcode 0 is illegal) - includes commands and completions 9611 */ 9612 enum toe_sq_opcode_type 9613 { 9614 CMP_OPCODE_TOE_GA=1, 9615 CMP_OPCODE_TOE_GR=2, 9616 CMP_OPCODE_TOE_GNI=3, 9617 CMP_OPCODE_TOE_GAIR=4, 9618 CMP_OPCODE_TOE_GAIL=5, 9619 CMP_OPCODE_TOE_GRI=6, 9620 CMP_OPCODE_TOE_GJ=7, 9621 CMP_OPCODE_TOE_DGI=8, 9622 CMP_OPCODE_TOE_CMP=9, 9623 CMP_OPCODE_TOE_REL=10, 9624 CMP_OPCODE_TOE_SKP=11, 9625 CMP_OPCODE_TOE_URG=12, 9626 CMP_OPCODE_TOE_RT_TO=13, 9627 CMP_OPCODE_TOE_KA_TO=14, 9628 CMP_OPCODE_TOE_MAX_RT=15, 9629 CMP_OPCODE_TOE_DBT_RE=16, 9630 CMP_OPCODE_TOE_SYN=17, 9631 CMP_OPCODE_TOE_OPT_ERR=18, 9632 CMP_OPCODE_TOE_FW2_TO=19, 9633 CMP_OPCODE_TOE_2WY_CLS=20, 9634 CMP_OPCODE_TOE_TX_CMP=21, 9635 RAMROD_OPCODE_TOE_INIT=32, 9636 RAMROD_OPCODE_TOE_RSS_UPDATE=33, 9637 RAMROD_OPCODE_TOE_TERMINATE_RING=34, 9638 CMP_OPCODE_TOE_RST_RCV=48, 9639 CMP_OPCODE_TOE_FIN_RCV=49, 9640 CMP_OPCODE_TOE_FIN_UPL=50, 9641 CMP_OPCODE_TOE_SRC_ERR=51, 9642 CMP_OPCODE_TOE_LCN_ERR=52, 9643 RAMROD_OPCODE_TOE_INITIATE_OFFLOAD=80, 9644 RAMROD_OPCODE_TOE_SEARCHER_DELETE=81, 9645 RAMROD_OPCODE_TOE_TERMINATE=82, 9646 RAMROD_OPCODE_TOE_QUERY=83, 9647 RAMROD_OPCODE_TOE_RESET_SEND=84, 9648 RAMROD_OPCODE_TOE_INVALIDATE=85, 9649 RAMROD_OPCODE_TOE_EMPTY_RAMROD=86, 9650 RAMROD_OPCODE_TOE_UPDATE=87, 9651 MAX_TOE_SQ_OPCODE_TYPE}; 9652 9653 9654 /* 9655 * Toe statistics collected by the Xstorm (per port) 9656 */ 9657 struct xstorm_toe_stats_section 9658 { 9659 u32_t tcp_out_segments; 9660 u32_t tcp_retransmitted_segments; 9661 struct regpair_t ip_out_octets; 9662 u32_t ip_out_requests; 9663 u32_t reserved; 9664 }; 9665 9666 /* 9667 * Toe statistics collected by the Xstorm (per port) 9668 */ 9669 struct xstorm_toe_stats 9670 { 9671 struct xstorm_toe_stats_section statistics[2] /* 0 - ipv4 , 1 - ipv6 */; 9672 u32_t reserved[2]; 9673 }; 9674 9675 /* 9676 * Toe statistics collected by the Tstorm (per port) 9677 */ 9678 struct tstorm_toe_stats_section 9679 { 9680 u32_t ip_in_receives; 9681 u32_t ip_in_delivers; 9682 struct regpair_t ip_in_octets; 9683 u32_t tcp_in_errors /* all discards except discards already counted by Ipv4 stats */; 9684 u32_t ip_in_header_errors /* IP checksum */; 9685 u32_t ip_in_discards /* no resources */; 9686 u32_t ip_in_truncated_packets; 9687 }; 9688 9689 /* 9690 * Toe statistics collected by the Tstorm (per port) 9691 */ 9692 struct tstorm_toe_stats 9693 { 9694 struct tstorm_toe_stats_section statistics[2] /* 0 - ipv4 , 1 - ipv6 */; 9695 u32_t reserved[2]; 9696 }; 9697 9698 /* 9699 * Eth statistics query structure for the eth_stats_query ramrod 9700 */ 9701 struct toe_stats_query 9702 { 9703 struct xstorm_toe_stats xstorm_toe /* Xstorm Toe statistics structure */; 9704 struct tstorm_toe_stats tstorm_toe /* Tstorm Toe statistics structure */; 9705 struct cstorm_toe_stats cstorm_toe /* Cstorm Toe statistics structure */; 9706 }; 9707 9708 9709 /* 9710 * The toe Tx Buffer Descriptor 9711 */ 9712 struct toe_tx_bd 9713 { 9714 u32_t addr_lo /* tranasmit payload base address - Single continuous buffer (page) pointer */; 9715 u32_t addr_hi /* tranasmit payload base address - Single continuous buffer (page) pointer */; 9716 #if defined(__BIG_ENDIAN) 9717 u16_t flags; 9718 #define TOE_TX_BD_PUSH (0x1<<0) /* BitField flagsbd command flags End of data flag */ 9719 #define TOE_TX_BD_PUSH_SHIFT 0 9720 #define TOE_TX_BD_NOTIFY (0x1<<1) /* BitField flagsbd command flags notify driver with released data bytes including this bd */ 9721 #define TOE_TX_BD_NOTIFY_SHIFT 1 9722 #define TOE_TX_BD_FIN (0x1<<2) /* BitField flagsbd command flags send fin request */ 9723 #define TOE_TX_BD_FIN_SHIFT 2 9724 #define TOE_TX_BD_LARGE_IO (0x1<<3) /* BitField flagsbd command flags this bd is part of an application buffer larger than mss */ 9725 #define TOE_TX_BD_LARGE_IO_SHIFT 3 9726 #define TOE_TX_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9727 #define TOE_TX_BD_RESERVED1_SHIFT 4 9728 u16_t size /* Size of the data represented by the BD */; 9729 #elif defined(__LITTLE_ENDIAN) 9730 u16_t size /* Size of the data represented by the BD */; 9731 u16_t flags; 9732 #define TOE_TX_BD_PUSH (0x1<<0) /* BitField flagsbd command flags End of data flag */ 9733 #define TOE_TX_BD_PUSH_SHIFT 0 9734 #define TOE_TX_BD_NOTIFY (0x1<<1) /* BitField flagsbd command flags notify driver with released data bytes including this bd */ 9735 #define TOE_TX_BD_NOTIFY_SHIFT 1 9736 #define TOE_TX_BD_FIN (0x1<<2) /* BitField flagsbd command flags send fin request */ 9737 #define TOE_TX_BD_FIN_SHIFT 2 9738 #define TOE_TX_BD_LARGE_IO (0x1<<3) /* BitField flagsbd command flags this bd is part of an application buffer larger than mss */ 9739 #define TOE_TX_BD_LARGE_IO_SHIFT 3 9740 #define TOE_TX_BD_RESERVED1 (0xFFF<<4) /* BitField flagsbd command flags reserved */ 9741 #define TOE_TX_BD_RESERVED1_SHIFT 4 9742 #endif 9743 u32_t nextBdStartSeq; 9744 }; 9745 9746 9747 /* 9748 * The toe Tx cqe 9749 */ 9750 struct toe_tx_cqe 9751 { 9752 u32_t params; 9753 #define TOE_TX_CQE_CID (0xFFFFFF<<0) /* BitField paramscompletion cid and opcode connection id */ 9754 #define TOE_TX_CQE_CID_SHIFT 0 9755 #define TOE_TX_CQE_COMPLETION_OPCODE (0xFF<<24) /* BitField paramscompletion cid and opcode completion opcode (use enum toe_tx_cqe_type) */ 9756 #define TOE_TX_CQE_COMPLETION_OPCODE_SHIFT 24 9757 u32_t len /* the more2release in Bytes */; 9758 }; 9759 9760 9761 /* 9762 * toe tx doorbell data in host memory 9763 */ 9764 struct toe_tx_db_data 9765 { 9766 u32_t bytes_prod_seq /* greatest sequence the chip can transmit */; 9767 #if defined(__BIG_ENDIAN) 9768 u16_t flags; 9769 #define TOE_TX_DB_DATA_FIN (0x1<<0) /* BitField flags flag for post FIN request */ 9770 #define TOE_TX_DB_DATA_FIN_SHIFT 0 9771 #define TOE_TX_DB_DATA_FLUSH (0x1<<1) /* BitField flags flag for last doorbell - flushing doorbell queue */ 9772 #define TOE_TX_DB_DATA_FLUSH_SHIFT 1 9773 #define TOE_TX_DB_DATA_RESERVE (0x3FFF<<2) /* BitField flags */ 9774 #define TOE_TX_DB_DATA_RESERVE_SHIFT 2 9775 u16_t bds_prod /* cyclic counter of posted bds */; 9776 #elif defined(__LITTLE_ENDIAN) 9777 u16_t bds_prod /* cyclic counter of posted bds */; 9778 u16_t flags; 9779 #define TOE_TX_DB_DATA_FIN (0x1<<0) /* BitField flags flag for post FIN request */ 9780 #define TOE_TX_DB_DATA_FIN_SHIFT 0 9781 #define TOE_TX_DB_DATA_FLUSH (0x1<<1) /* BitField flags flag for last doorbell - flushing doorbell queue */ 9782 #define TOE_TX_DB_DATA_FLUSH_SHIFT 1 9783 #define TOE_TX_DB_DATA_RESERVE (0x3FFF<<2) /* BitField flags */ 9784 #define TOE_TX_DB_DATA_RESERVE_SHIFT 2 9785 #endif 9786 }; 9787 9788 9789 /* 9790 * sturct used in update ramrod. Driver notifies chip which fields have changed via the bitmap $$KEEP_ENDIANNESS$$ 9791 */ 9792 struct toe_update_ramrod_cached_params 9793 { 9794 u16_t changed_fields; 9795 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_DEST_ADDR_CHANGED (0x1<<0) /* BitField changed_fieldsbitmap for indicating changed fields */ 9796 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_DEST_ADDR_CHANGED_SHIFT 0 9797 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_MSS_CHANGED (0x1<<1) /* BitField changed_fieldsbitmap for indicating changed fields */ 9798 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_MSS_CHANGED_SHIFT 1 9799 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_TIMEOUT_CHANGED (0x1<<2) /* BitField changed_fieldsbitmap for indicating changed fields */ 9800 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_TIMEOUT_CHANGED_SHIFT 2 9801 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_INTERVAL_CHANGED (0x1<<3) /* BitField changed_fieldsbitmap for indicating changed fields */ 9802 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_INTERVAL_CHANGED_SHIFT 3 9803 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_MAX_RT_CHANGED (0x1<<4) /* BitField changed_fieldsbitmap for indicating changed fields */ 9804 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_MAX_RT_CHANGED_SHIFT 4 9805 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_RCV_INDICATION_SIZE_CHANGED (0x1<<5) /* BitField changed_fieldsbitmap for indicating changed fields */ 9806 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_RCV_INDICATION_SIZE_CHANGED_SHIFT 5 9807 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_FLOW_LABEL_CHANGED (0x1<<6) /* BitField changed_fieldsbitmap for indicating changed fields */ 9808 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_FLOW_LABEL_CHANGED_SHIFT 6 9809 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_ENABLE_KEEPALIVE_CHANGED (0x1<<7) /* BitField changed_fieldsbitmap for indicating changed fields */ 9810 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_ENABLE_KEEPALIVE_CHANGED_SHIFT 7 9811 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_ENABLE_NAGLE_CHANGED (0x1<<8) /* BitField changed_fieldsbitmap for indicating changed fields */ 9812 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_ENABLE_NAGLE_CHANGED_SHIFT 8 9813 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TTL_CHANGED (0x1<<9) /* BitField changed_fieldsbitmap for indicating changed fields */ 9814 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TTL_CHANGED_SHIFT 9 9815 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_HOP_LIMIT_CHANGED (0x1<<10) /* BitField changed_fieldsbitmap for indicating changed fields */ 9816 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_HOP_LIMIT_CHANGED_SHIFT 10 9817 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TOS_CHANGED (0x1<<11) /* BitField changed_fieldsbitmap for indicating changed fields */ 9818 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TOS_CHANGED_SHIFT 11 9819 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TRAFFIC_CLASS_CHANGED (0x1<<12) /* BitField changed_fieldsbitmap for indicating changed fields */ 9820 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_TRAFFIC_CLASS_CHANGED_SHIFT 12 9821 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_MAX_PROBE_COUNT_CHANGED (0x1<<13) /* BitField changed_fieldsbitmap for indicating changed fields */ 9822 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_KA_MAX_PROBE_COUNT_CHANGED_SHIFT 13 9823 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_USER_PRIORITY_CHANGED (0x1<<14) /* BitField changed_fieldsbitmap for indicating changed fields */ 9824 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_USER_PRIORITY_CHANGED_SHIFT 14 9825 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_INITIAL_RCV_WND_CHANGED (0x1<<15) /* BitField changed_fieldsbitmap for indicating changed fields */ 9826 #define TOE_UPDATE_RAMROD_CACHED_PARAMS_INITIAL_RCV_WND_CHANGED_SHIFT 15 9827 u8_t ka_restart /* Only 1 bit is used */; 9828 u8_t retransmit_restart /* Only 1 bit is used */; 9829 u8_t dest_addr[6]; 9830 u16_t mss; 9831 u32_t ka_timeout; 9832 u32_t ka_interval; 9833 u32_t max_rt; 9834 u32_t flow_label /* Only 20 bits are used */; 9835 u16_t rcv_indication_size; 9836 u8_t enable_keepalive /* Only 1 bit is used */; 9837 u8_t enable_nagle /* Only 1 bit is used */; 9838 u8_t ttl; 9839 u8_t hop_limit; 9840 u8_t tos; 9841 u8_t traffic_class; 9842 u8_t ka_max_probe_count; 9843 u8_t user_priority /* Only 4 bits are used */; 9844 u16_t reserved2; 9845 u32_t initial_rcv_wnd; 9846 u32_t reserved1; 9847 }; 9848 9849 9850 9851 9852 9853 9854 9855 9856 9857 9858 /* 9859 * rx rings pause data for E1h only 9860 */ 9861 struct ustorm_toe_rx_pause_data_e1h 9862 { 9863 #if defined(__BIG_ENDIAN) 9864 u16_t grq_thr_low /* number of remaining grqes under which, we send pause message */; 9865 u16_t cq_thr_low /* number of remaining cqes under which, we send pause message */; 9866 #elif defined(__LITTLE_ENDIAN) 9867 u16_t cq_thr_low /* number of remaining cqes under which, we send pause message */; 9868 u16_t grq_thr_low /* number of remaining grqes under which, we send pause message */; 9869 #endif 9870 #if defined(__BIG_ENDIAN) 9871 u16_t grq_thr_high /* number of remaining grqes above which, we send un-pause message */; 9872 u16_t cq_thr_high /* number of remaining cqes above which, we send un-pause message */; 9873 #elif defined(__LITTLE_ENDIAN) 9874 u16_t cq_thr_high /* number of remaining cqes above which, we send un-pause message */; 9875 u16_t grq_thr_high /* number of remaining grqes above which, we send un-pause message */; 9876 #endif 9877 }; 9878 9879 9880 9881 9882 9883 9884 9885 9886 #endif /* __5710_HSI_VBD__ */ 9887