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Searched refs:BLC_PWM_CTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_lvds.c67 ret = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
79 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
147 REG_WRITE(BLC_PWM_CTL, in psb_lvds_pwm_set_brightness()
189 blc_pwm_ctl = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_set_backlight()
191 REG_WRITE(BLC_PWM_CTL, in psb_intel_lvds_set_backlight()
267 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_save()
308 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); in psb_intel_lvds_restore()
433 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_prepare()
H A Dcdv_device.c76 u32 max = REG_READ(BLC_PWM_CTL); in cdv_get_max_backlight()
94 u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in cdv_get_brightness()
124 blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_set_brightness()
125 REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl | in cdv_set_brightness()
255 regs->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_save_display_registers()
332 REG_WRITE(BLC_PWM_CTL, regs->saveBLC_PWM_CTL); in cdv_restore_display_registers()
H A Doaktrail_device.c53 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16; in oaktrail_set_brightness()
70 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl); in oaktrail_set_brightness()
101 REG_WRITE(BLC_PWM_CTL, value | (value << 16)); in oaktrail_backlight_init()
178 regs->saveBLC_PWM_CTL = PSB_RVDC32(BLC_PWM_CTL); in oaktrail_save_display_registers()
308 PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL); in oaktrail_restore_display_registers()
H A Dcdv_intel_lvds.c66 retval = ((REG_READ(BLC_PWM_CTL) & in cdv_intel_lvds_get_max_backlight()
91 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
92 REG_WRITE(BLC_PWM_CTL, in cdv_intel_lvds_set_backlight()
238 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_intel_lvds_prepare()
H A Doaktrail_lvds.c165 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in oaktrail_lvds_prepare()
178 ret = ((REG_READ(BLC_PWM_CTL) & in oaktrail_lvds_get_max_backlight()
H A Dpsb_device.c71 REG_WRITE(BLC_PWM_CTL, in psb_backlight_setup()
H A Dpsb_intel_reg.h80 #define BLC_PWM_CTL 0x61254 macro
/linux/drivers/gpu/drm/i915/display/
H A Dintel_backlight_regs.h47 #define BLC_PWM_CTL _MMIO(0x61254) macro
H A Dintel_backlight.c164 val = intel_de_read(i915, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()
249 tmp = intel_de_read(i915, BLC_PWM_CTL) & ~mask; in i9xx_set_backlight()
250 intel_de_write(i915, BLC_PWM_CTL, tmp | level); in i9xx_set_backlight()
565 ctl = intel_de_read(i915, BLC_PWM_CTL); in i9xx_enable_backlight()
569 intel_de_write(i915, BLC_PWM_CTL, 0); in i9xx_enable_backlight()
582 intel_de_write(i915, BLC_PWM_CTL, ctl); in i9xx_enable_backlight()
583 intel_de_posting_read(i915, BLC_PWM_CTL); in i9xx_enable_backlight()
619 intel_de_write(i915, BLC_PWM_CTL, ctl); in i965_enable_backlight()
1308 ctl = intel_de_read(i915, BLC_PWM_CTL); in i9xx_setup_backlight()
1354 ctl = intel_de_read(i915, BLC_PWM_CTL); in i965_setup_backlight()