Searched refs:CDP (Results 1 – 11 of 11) sorted by relevance
/linux/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ |
H A D | ctrl2080bios.h | 35 char CDP[6]; member
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/linux/arch/arm/mach-omap2/ |
H A D | dma.c | 76 [CDP] = { 0x00d0, 0x60, OMAP_DMA_REG_32BIT },
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/linux/include/linux/ |
H A D | omap-dma.h | 163 CDP, CNDP, CCDN, enumerator
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/linux/arch/arm/nwfpe/ |
H A D | entry.S | 138 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
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/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | charger-manager.yaml | 135 - CDP
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-msm8960-cdp.dts | 8 model = "Qualcomm MSM8960 CDP";
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/linux/drivers/mtd/maps/ |
H A D | Kconfig | 140 tristate "CFI Flash device mapped on AMD SC520 CDP" 143 The SC520 CDP board has two banks of CFI-compliant chips and one
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/linux/Documentation/arch/x86/ |
H A D | resctrl.rst | 23 CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" 53 L2 and L3 CDP are controlled separately. 549 With CDP disabled the L3 schemata format is:: 553 L3 schemata file details (CDP enabled via mount option to resctrl) 555 When CDP is enabled L3 control is split into two separate resources 563 CDP is supported at L2 using the 'cdpl2' mount option. The schemata
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/linux/drivers/dma/ti/ |
H A D | omap-dma.c | 441 omap_dma_chan_write(c, CDP, cdp); in omap_dma_start() 450 omap_dma_chan_write(c, CDP, 0); in omap_dma_start()
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-power | 598 "Unknown", "SDP", "DCP", "CDP", "ACA", "C", "PD",
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/linux/drivers/eisa/ |
H A D | eisa.ids | 71 AIR0701 "AIR 54CDP PCI/EISA System Board" 72 AIR0702 "AIR 54CDP PCI/EISA Dual-Processors System Board"
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