/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v12_0.c | 1071 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1073 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1075 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1077 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1080 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1124 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_queue_init_register() 1420 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_kiq_dequeue_sched() 1422 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_kiq_dequeue_sched()
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H A D | mes_v11_0.c | 1105 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1107 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1109 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1111 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1114 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1151 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_queue_init_register() 1433 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_kiq_dequeue() 1435 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_kiq_dequeue()
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H A D | amdgpu_amdkfd_gfx_v7.c | 183 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | amdgpu_amdkfd_gc_9_4_3.c | 308 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_gfx_v9_4_3_hqd_load()
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H A D | amdgpu_amdkfd_gfx_v8.c | 207 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | gfx_v12_0.c | 3020 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3022 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3024 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3026 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3029 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3082 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3085 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3087 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3089 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init()
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H A D | amdgpu_amdkfd_gfx_v10_3.c | 219 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in hqd_load_v10_3()
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H A D | gfx_v11_0.c | 4075 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4077 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4079 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4081 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4084 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4138 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4141 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4143 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4145 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init()
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H A D | amdgpu_amdkfd_gfx_v11.c | 204 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in hqd_load_v11()
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H A D | gfx_v9_4_3.c | 1831 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init() 1833 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init() 1835 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init() 1837 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init() 1840 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init() 1843 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_4_3_xcc_mqd_init()
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H A D | amdgpu_amdkfd_gfx_v10.c | 233 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | amdgpu_amdkfd_gfx_v9.c | 247 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_gfx_v9_hqd_load()
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H A D | gfx_v8_0.c | 4438 CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4488 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4491 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4493 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4495 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init()
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H A D | gfx_v9_0.c | 3513 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3515 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3517 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3519 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3522 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init()
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H A D | gfx_v10_0.c | 6799 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6801 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6803 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6805 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6808 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init()
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/linux/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1511 #define CP_HQD_PQ_DOORBELL_CONTROL 0xC950 macro
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H A D | cik.c | 4616 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume() 4621 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume() 4702 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume() 4713 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume()
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