Home
last modified time | relevance | path

Searched refs:DCCG_GATE_DISABLE_CNTL (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.h198 SR(DCCG_GATE_DISABLE_CNTL), \
423 SR(DCCG_GATE_DISABLE_CNTL), \
635 uint32_t DCCG_GATE_DISABLE_CNTL; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h167 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.h228 DCCG_SF(DCCG_GATE_DISABLE_CNTL, DISPCLK_DCCG_GATE_DISABLE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.h411 uint32_t DCCG_GATE_DISABLE_CNTL; member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c366 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn201_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c249 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn31_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h638 SR(DCCG_GATE_DISABLE_CNTL),\
H A Ddcn401_resource.c515 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c783 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn30_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c679 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c692 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c684 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c685 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c532 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c953 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn32_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c407 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn401_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c535 SR(DCCG_GATE_DISABLE_CNTL), \
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c1671 REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); in dcn10_init_hw()