Searched refs:MDIO_WC_REG_RX1_PCI_CTRL (Results 1 – 2 of 2) sorted by relevance
7391 #define MDIO_WC_REG_RX1_PCI_CTRL 0x80ca macro
3840 MDIO_WC_REG_RX1_PCI_CTRL + (0x10*lane), in bnx2x_warpcore_enable_AN_KR()