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Searched refs:PB0_PLL_LC0_OVRD_REG0__PLL_CFG_LC_BW_CNTRL_OVRD_VAL_0__SHIFT (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h1743 #define PB0_PLL_LC0_OVRD_REG0__PLL_CFG_LC_BW_CNTRL_OVRD_VAL_0__SHIFT 0x00000000 macro
H A Dbif_4_1_sh_mask.h4082 #define PB0_PLL_LC0_OVRD_REG0__PLL_CFG_LC_BW_CNTRL_OVRD_VAL_0__SHIFT 0x0 macro
H A Dbif_5_0_sh_mask.h4564 #define PB0_PLL_LC0_OVRD_REG0__PLL_CFG_LC_BW_CNTRL_OVRD_VAL_0__SHIFT 0x0 macro