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Searched refs:SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h545 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h546 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
H A Dsdma0_4_2_2_sh_mask.h552 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dsdma0_4_2_sh_mask.h546 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h968 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1052 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h1070 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h1576 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h237 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h233 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h222 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h232 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h254 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h255 #define SDMA0_STATUS1_REG__CE_SPLIT_IDLE__SHIFT … macro