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Searched refs:SDMA1_PHASE0_QUANTUM__UNIT__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h590 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Dsdma1_4_2_sh_mask.h590 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h594 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1530 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_2_4_sh_mask.h1700 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h2220 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h2524 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3099 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h3076 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3185 #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT … macro