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Searched refs:SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1617 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT 0x4 macro
H A Dsdma1_4_2_sh_mask.h1625 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1633 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h2922 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT 0x4 macro
H A Doss_3_0_sh_mask.h3030 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT 0x4 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4241 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4183 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4366 #define SDMA1_RLC0_MIDCMD_CNTL__SPLIT_STATE__SHIFT … macro