Searched refs:SOC_SW_RST_CONTROL_REG_CORE0 (Results 1 – 2 of 2) sorted by relevance
352 #define SOC_SW_RST_CONTROL_REG_CORE0 0x0020800 macro
570 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01)); in qlafx00_soc_cpu_reset()572 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101)); in qlafx00_soc_cpu_reset()613 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); in qlafx00_soc_cpu_reset()