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Searched refs:TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10470 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK 0x0f000000L macro
H A Dgfx_7_2_sh_mask.h14011 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK 0xf000000 macro
H A Dgfx_8_0_sh_mask.h15893 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK 0xf000000 macro
H A Dgfx_8_1_sh_mask.h16473 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK 0xf000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21972 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_9_2_1_sh_mask.h23282 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_9_1_sh_mask.h23279 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_9_4_3_sh_mask.h25467 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_9_4_2_sh_mask.h17099 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_11_5_0_sh_mask.h28341 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_11_0_0_sh_mask.h32496 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_11_0_3_sh_mask.h34994 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_10_1_0_sh_mask.h31905 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro
H A Dgc_10_3_0_sh_mask.h30331 #define TA_PERFCOUNTER0_SELECT1__PERF_MODE3_MASK … macro