/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_discovery.c | 209 [UVD_HWIP] = UVD_HWID, 2089 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks() 2099 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks() 2116 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks() 2172 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks() 2283 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks() 2305 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks() 2366 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks() 2367 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks() 2396 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks() [all …]
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H A D | amdgpu_vcn.c | 101 amdgpu_ucode_ip_version_decode(adev, UVD_HWIP, ucode_prefix, sizeof(ucode_prefix)); in amdgpu_vcn_early_init() 103 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(4, 0, 6) && in amdgpu_vcn_early_init() 143 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(3, 0, 2)) { in amdgpu_vcn_sw_init() 188 if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(5, 0, 0)) { in amdgpu_vcn_sw_init() 191 } else if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) { in amdgpu_vcn_sw_init() 288 if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) in amdgpu_vcn_using_unified_queue() 1027 if (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(4, 0, 3)) { in amdgpu_vcn_unified_ring_test_ib() 1077 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == in amdgpu_vcn_setup_ucode()
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H A D | arct_reg_init.c | 41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in arct_reg_base_init()
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H A D | vega10_reg_init.c | 41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega10_reg_base_init()
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H A D | vega20_reg_init.c | 41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega20_reg_base_init()
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H A D | jpeg_v4_0_5.c | 72 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in jpeg_v4_0_5_early_init() 82 amdgpu_ip_version(adev, UVD_HWIP, 0)); in jpeg_v4_0_5_early_init()
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H A D | amdgpu_ucode.c | 1257 } else if (block_type == UVD_HWIP) { in amdgpu_ucode_legacy_naming() 1258 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_ucode_legacy_naming() 1371 case UVD_HWIP: in amdgpu_ucode_ip_version_decode()
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H A D | vcn_v3_0.c | 103 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == in vcn_v3_0_early_init() 231 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(3, 1, 2)) in vcn_v3_0_sw_init() 233 else if (amdgpu_ip_version(adev, UVD_HWIP, 0) == in vcn_v3_0_sw_init() 1261 if (amdgpu_ip_version(adev, UVD_HWIP, 0) != in vcn_v3_0_start() 1635 if (amdgpu_ip_version(adev, UVD_HWIP, 0) != in vcn_v3_0_pause_dpg_mode()
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H A D | amdgpu_dev_coredump.c | 54 [UVD_HWIP] = "UVD/JPEG/VCN",
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H A D | jpeg_v3_0.c | 55 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in jpeg_v3_0_early_init()
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H A D | jpeg_v2_5.c | 131 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(2, 5, 0)) in jpeg_v2_5_sw_init()
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H A D | amdgpu.h | 701 UVD_HWIP, enumerator 702 VCN_HWIP = UVD_HWIP,
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H A D | vcn_v2_5.c | 190 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(2, 5, 0)) in vcn_v2_5_sw_init() 210 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == in vcn_v2_5_sw_init() 800 if (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(2, 6, 0)) in vcn_v2_6_enable_ras()
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H A D | soc21.c | 156 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc21_query_video_codecs()
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H A D | uvd_v7_0.c | 1302 reg -= p->adev->reg_offset[UVD_HWIP][0][1]; in uvd_v7_0_ring_patch_cs_in_place() 1303 reg += p->adev->reg_offset[UVD_HWIP][1][1]; in uvd_v7_0_ring_patch_cs_in_place()
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H A D | nv.c | 217 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in nv_query_video_codecs()
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H A D | amdgpu_uvd.c | 1143 offset = adev->reg_offset[UVD_HWIP][ring->me][1]; in amdgpu_uvd_send_msg()
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H A D | soc15.c | 190 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc15_query_video_codecs()
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H A D | amdgpu_kms.c | 522 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_hw_ip_info()
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